bank_offset 363 drivers/gpio/gpio-pcie-idio-24.c const unsigned long bank_offset = bit_offset/8 * 8; bank_offset 369 drivers/gpio/gpio-pcie-idio-24.c new_irq_mask = idio24gpio->irq_mask >> bank_offset; bank_offset 375 drivers/gpio/gpio-pcie-idio-24.c cos_enable_state &= ~BIT(bank_offset); bank_offset 377 drivers/gpio/gpio-pcie-idio-24.c cos_enable_state &= ~BIT(bank_offset + 4); bank_offset 392 drivers/gpio/gpio-pcie-idio-24.c const unsigned long bank_offset = bit_offset/8 * 8; bank_offset 397 drivers/gpio/gpio-pcie-idio-24.c prev_irq_mask = idio24gpio->irq_mask >> bank_offset; bank_offset 404 drivers/gpio/gpio-pcie-idio-24.c cos_enable_state |= BIT(bank_offset); bank_offset 406 drivers/gpio/gpio-pcie-idio-24.c cos_enable_state |= BIT(bank_offset + 4); bank_offset 40 drivers/gpio/gpio-xgene.c unsigned long bank_offset; bank_offset 43 drivers/gpio/gpio-xgene.c bank_offset = GPIO_DATA_OFFSET + GPIO_BANK_OFFSET(offset); bank_offset 45 drivers/gpio/gpio-xgene.c return !!(ioread32(chip->base + bank_offset) & BIT(bit_offset)); bank_offset 51 drivers/gpio/gpio-xgene.c unsigned long bank_offset; bank_offset 54 drivers/gpio/gpio-xgene.c bank_offset = GPIO_SET_DR_OFFSET + GPIO_BANK_OFFSET(offset); bank_offset 57 drivers/gpio/gpio-xgene.c setval = ioread32(chip->base + bank_offset); bank_offset 62 drivers/gpio/gpio-xgene.c iowrite32(setval, chip->base + bank_offset); bank_offset 78 drivers/gpio/gpio-xgene.c unsigned long bank_offset, bit_offset; bank_offset 80 drivers/gpio/gpio-xgene.c bank_offset = GPIO_SET_DR_OFFSET + GPIO_BANK_OFFSET(offset); bank_offset 83 drivers/gpio/gpio-xgene.c return !!(ioread32(chip->base + bank_offset) & BIT(bit_offset)); bank_offset 89 drivers/gpio/gpio-xgene.c unsigned long flags, bank_offset; bank_offset 92 drivers/gpio/gpio-xgene.c bank_offset = GPIO_SET_DR_OFFSET + GPIO_BANK_OFFSET(offset); bank_offset 97 drivers/gpio/gpio-xgene.c dirval = ioread32(chip->base + bank_offset); bank_offset 99 drivers/gpio/gpio-xgene.c iowrite32(dirval, chip->base + bank_offset); bank_offset 110 drivers/gpio/gpio-xgene.c unsigned long flags, bank_offset; bank_offset 113 drivers/gpio/gpio-xgene.c bank_offset = GPIO_SET_DR_OFFSET + GPIO_BANK_OFFSET(offset); bank_offset 118 drivers/gpio/gpio-xgene.c dirval = ioread32(chip->base + bank_offset); bank_offset 120 drivers/gpio/gpio-xgene.c iowrite32(dirval, chip->base + bank_offset); bank_offset 131 drivers/gpio/gpio-xgene.c unsigned long bank_offset; bank_offset 135 drivers/gpio/gpio-xgene.c bank_offset = GPIO_SET_DR_OFFSET + bank * GPIO_BANK_STRIDE; bank_offset 136 drivers/gpio/gpio-xgene.c gpio->set_dr_val[bank] = ioread32(gpio->base + bank_offset); bank_offset 144 drivers/gpio/gpio-xgene.c unsigned long bank_offset; bank_offset 148 drivers/gpio/gpio-xgene.c bank_offset = GPIO_SET_DR_OFFSET + bank * GPIO_BANK_STRIDE; bank_offset 149 drivers/gpio/gpio-xgene.c iowrite32(gpio->set_dr_val[bank], gpio->base + bank_offset); bank_offset 606 drivers/gpio/gpio-zynq.c unsigned int bank_offset = gpio->p_data->bank_min[bank_num]; bank_offset 616 drivers/gpio/gpio-zynq.c gpio_irq = irq_find_mapping(irqdomain, offset + bank_offset); bank_offset 728 drivers/pinctrl/pinctrl-oxnas.c unsigned int bank_offset = (bank->id ? PINMUX_820_BANK_OFFSET : 0); bank_offset 735 drivers/pinctrl/pinctrl-oxnas.c bank_offset + PINMUX_820_SECONDARY_SEL, bank_offset 738 drivers/pinctrl/pinctrl-oxnas.c bank_offset + PINMUX_820_TERTIARY_SEL, bank_offset 741 drivers/pinctrl/pinctrl-oxnas.c bank_offset + PINMUX_820_QUATERNARY_SEL, bank_offset 744 drivers/pinctrl/pinctrl-oxnas.c bank_offset + PINMUX_820_DEBUG_SEL, bank_offset 747 drivers/pinctrl/pinctrl-oxnas.c bank_offset + PINMUX_820_ALTERNATIVE_SEL, bank_offset 874 drivers/pinctrl/pinctrl-oxnas.c unsigned int bank_offset = (bank->id ? PINMUX_820_BANK_OFFSET : 0); bank_offset 882 drivers/pinctrl/pinctrl-oxnas.c bank_offset + PINMUX_820_PULLUP_CTRL, bank_offset 940 drivers/pinctrl/pinctrl-oxnas.c unsigned int bank_offset = (bank->id ? PINMUX_820_BANK_OFFSET : 0); bank_offset 956 drivers/pinctrl/pinctrl-oxnas.c bank_offset + PINMUX_820_PULLUP_CTRL, bank_offset 765 drivers/pinctrl/sunxi/pinctrl-sunxi.c unsigned short bank_offset = bank - pctl->desc->pin_base / bank_offset 767 drivers/pinctrl/sunxi/pinctrl-sunxi.c struct sunxi_pinctrl_regulator *s_reg = &pctl->regulators[bank_offset]; bank_offset 809 drivers/pinctrl/sunxi/pinctrl-sunxi.c unsigned short bank_offset = bank - pctl->desc->pin_base / bank_offset 811 drivers/pinctrl/sunxi/pinctrl-sunxi.c struct sunxi_pinctrl_regulator *s_reg = &pctl->regulators[bank_offset];