b_rrb_map         172 arch/mips/include/asm/pci/bridge.h 	} b_rrb_map[2];					/* 0x000280 */
b_rrb_map         173 arch/mips/include/asm/pci/bridge.h #define b_even_resp	b_rrb_map[0].reg		/* 0x000284 */
b_rrb_map         174 arch/mips/include/asm/pci/bridge.h #define b_odd_resp	b_rrb_map[1].reg		/* 0x00028C */