axi_id            162 arch/arm/mach-imx/mmdc.c PMU_FORMAT_ATTR(axi_id, "config1:0-63");
axi_id            556 drivers/gpu/drm/imx/ipuv3-plane.c 	unsigned int axi_id = 0;
axi_id            591 drivers/gpu/drm/imx/ipuv3-plane.c 		axi_id = ipu_chan_assign_axi_id(ipu_plane->dma);
axi_id            592 drivers/gpu/drm/imx/ipuv3-plane.c 		ipu_prg_channel_configure(ipu_plane->ipu_ch, axi_id,
axi_id            642 drivers/gpu/drm/imx/ipuv3-plane.c 	ipu_cpmem_set_axi_id(ipu_plane->ipu_ch, axi_id);
axi_id            166 drivers/gpu/drm/v3d/v3d_irq.c 		u32 axi_id = V3D_READ(V3D_MMU_VIO_ID);
axi_id            187 drivers/gpu/drm/v3d/v3d_irq.c 			axi_id = axi_id >> 5;
axi_id            188 drivers/gpu/drm/v3d/v3d_irq.c 			if (axi_id < ARRAY_SIZE(v3d41_axi_ids))
axi_id            189 drivers/gpu/drm/v3d/v3d_irq.c 				client = v3d41_axi_ids[axi_id];
axi_id            193 drivers/gpu/drm/v3d/v3d_irq.c 			client, axi_id, (long long)vio_addr,
axi_id            274 drivers/gpu/ipu-v3/ipu-prg.c 			      unsigned int axi_id, unsigned int width,
axi_id            321 drivers/gpu/ipu-v3/ipu-prg.c 	val |= IPU_PRG_CTL_SOFT_ARID(prg_chan, axi_id);
axi_id            160 drivers/perf/fsl_imx8_ddr_perf.c PMU_FORMAT_ATTR(axi_id, "config1:0-15");
axi_id            349 include/video/imx-ipu-v3.h 			      unsigned int axi_id,  unsigned int width,