avail_rs         1189 drivers/gpu/drm/i915/gvt/handlers.c 	case _vgtif_reg(avail_rs.mappable_gmadr.base) ...
avail_rs         1190 drivers/gpu/drm/i915/gvt/handlers.c 		_vgtif_reg(avail_rs.fence_num):
avail_rs         1192 drivers/gpu/drm/i915/gvt/handlers.c 			_vgtif_reg(avail_rs.fence_num) + 4)
avail_rs           51 drivers/gpu/drm/i915/gvt/vgpu.c 	vgpu_vreg_t(vgpu, vgtif_reg(avail_rs.mappable_gmadr.base)) =
avail_rs           53 drivers/gpu/drm/i915/gvt/vgpu.c 	vgpu_vreg_t(vgpu, vgtif_reg(avail_rs.mappable_gmadr.size)) =
avail_rs           55 drivers/gpu/drm/i915/gvt/vgpu.c 	vgpu_vreg_t(vgpu, vgtif_reg(avail_rs.nonmappable_gmadr.base)) =
avail_rs           57 drivers/gpu/drm/i915/gvt/vgpu.c 	vgpu_vreg_t(vgpu, vgtif_reg(avail_rs.nonmappable_gmadr.size)) =
avail_rs           60 drivers/gpu/drm/i915/gvt/vgpu.c 	vgpu_vreg_t(vgpu, vgtif_reg(avail_rs.fence_num)) = vgpu_fence_sz(vgpu);
avail_rs          843 drivers/gpu/drm/i915/i915_gem_fence_reg.c 					       vgtif_reg(avail_rs.fence_num));
avail_rs           88 drivers/gpu/drm/i915/i915_pvinfo.h 	} avail_rs;		/* available/assigned resource */
avail_rs          233 drivers/gpu/drm/i915/i915_vgpu.c 	  intel_uncore_read(uncore, vgtif_reg(avail_rs.mappable_gmadr.base));
avail_rs          235 drivers/gpu/drm/i915/i915_vgpu.c 	  intel_uncore_read(uncore, vgtif_reg(avail_rs.mappable_gmadr.size));
avail_rs          237 drivers/gpu/drm/i915/i915_vgpu.c 	  intel_uncore_read(uncore, vgtif_reg(avail_rs.nonmappable_gmadr.base));
avail_rs          239 drivers/gpu/drm/i915/i915_vgpu.c 	  intel_uncore_read(uncore, vgtif_reg(avail_rs.nonmappable_gmadr.size));