arch/x86/include/asm/kvm

/* [<][>][^][v][top][bottom][index][help] */
This source file includes following definitions.
gfn_to_index
kvm_arch_alloc_vm
kvm_arch_free_vm
kvm_arch_flush_remote_tlb
__kvm_irq_line_state
translate_gpa
page_header
kvm_read_ldt
kvm_load_ldt
read_msr
get_rdx_init_val
kvm_inject_gp
kvm_irq_is_postable
kvm_arch_vcpu_blocking
kvm_arch_vcpu_unblocking
kvm_arch_vcpu_block_finish
kvm_cpu_get_apicid
   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * This header defines architecture specific interfaces, x86 version
   6  */
   7 
   8 #ifndef _ASM_X86_KVM_HOST_H
   9 #define _ASM_X86_KVM_HOST_H
  10 
  11 #include <linux/types.h>
  12 #include <linux/mm.h>
  13 #include <linux/mmu_notifier.h>
  14 #include <linux/tracepoint.h>
  15 #include <linux/cpumask.h>
  16 #include <linux/irq_work.h>
  17 #include <linux/irq.h>
  18 
  19 #include <linux/kvm.h>
  20 #include <linux/kvm_para.h>
  21 #include <linux/kvm_types.h>
  22 #include <linux/perf_event.h>
  23 #include <linux/pvclock_gtod.h>
  24 #include <linux/clocksource.h>
  25 #include <linux/irqbypass.h>
  26 #include <linux/hyperv.h>
  27 
  28 #include <asm/apic.h>
  29 #include <asm/pvclock-abi.h>
  30 #include <asm/desc.h>
  31 #include <asm/mtrr.h>
  32 #include <asm/msr-index.h>
  33 #include <asm/asm.h>
  34 #include <asm/kvm_page_track.h>
  35 #include <asm/kvm_vcpu_regs.h>
  36 #include <asm/hyperv-tlfs.h>
  37 
  38 #define __KVM_HAVE_ARCH_VCPU_DEBUGFS
  39 
  40 #define KVM_MAX_VCPUS 288
  41 #define KVM_SOFT_MAX_VCPUS 240
  42 #define KVM_MAX_VCPU_ID 1023
  43 #define KVM_USER_MEM_SLOTS 509
  44 /* memory slots that are not exposed to userspace */
  45 #define KVM_PRIVATE_MEM_SLOTS 3
  46 #define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS)
  47 
  48 #define KVM_HALT_POLL_NS_DEFAULT 200000
  49 
  50 #define KVM_IRQCHIP_NUM_PINS  KVM_IOAPIC_NUM_PINS
  51 
  52 /* x86-specific vcpu->requests bit members */
  53 #define KVM_REQ_MIGRATE_TIMER           KVM_ARCH_REQ(0)
  54 #define KVM_REQ_REPORT_TPR_ACCESS       KVM_ARCH_REQ(1)
  55 #define KVM_REQ_TRIPLE_FAULT            KVM_ARCH_REQ(2)
  56 #define KVM_REQ_MMU_SYNC                KVM_ARCH_REQ(3)
  57 #define KVM_REQ_CLOCK_UPDATE            KVM_ARCH_REQ(4)
  58 #define KVM_REQ_LOAD_CR3                KVM_ARCH_REQ(5)
  59 #define KVM_REQ_EVENT                   KVM_ARCH_REQ(6)
  60 #define KVM_REQ_APF_HALT                KVM_ARCH_REQ(7)
  61 #define KVM_REQ_STEAL_UPDATE            KVM_ARCH_REQ(8)
  62 #define KVM_REQ_NMI                     KVM_ARCH_REQ(9)
  63 #define KVM_REQ_PMU                     KVM_ARCH_REQ(10)
  64 #define KVM_REQ_PMI                     KVM_ARCH_REQ(11)
  65 #define KVM_REQ_SMI                     KVM_ARCH_REQ(12)
  66 #define KVM_REQ_MASTERCLOCK_UPDATE      KVM_ARCH_REQ(13)
  67 #define KVM_REQ_MCLOCK_INPROGRESS \
  68         KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
  69 #define KVM_REQ_SCAN_IOAPIC \
  70         KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
  71 #define KVM_REQ_GLOBAL_CLOCK_UPDATE     KVM_ARCH_REQ(16)
  72 #define KVM_REQ_APIC_PAGE_RELOAD \
  73         KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
  74 #define KVM_REQ_HV_CRASH                KVM_ARCH_REQ(18)
  75 #define KVM_REQ_IOAPIC_EOI_EXIT         KVM_ARCH_REQ(19)
  76 #define KVM_REQ_HV_RESET                KVM_ARCH_REQ(20)
  77 #define KVM_REQ_HV_EXIT                 KVM_ARCH_REQ(21)
  78 #define KVM_REQ_HV_STIMER               KVM_ARCH_REQ(22)
  79 #define KVM_REQ_LOAD_EOI_EXITMAP        KVM_ARCH_REQ(23)
  80 #define KVM_REQ_GET_VMCS12_PAGES        KVM_ARCH_REQ(24)
  81 
  82 #define CR0_RESERVED_BITS                                               \
  83         (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  84                           | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  85                           | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  86 
  87 #define CR4_RESERVED_BITS                                               \
  88         (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  89                           | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
  90                           | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
  91                           | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \
  92                           | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \
  93                           | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP))
  94 
  95 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  96 
  97 
  98 
  99 #define INVALID_PAGE (~(hpa_t)0)
 100 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
 101 
 102 #define UNMAPPED_GVA (~(gpa_t)0)
 103 
 104 /* KVM Hugepage definitions for x86 */
 105 enum {
 106         PT_PAGE_TABLE_LEVEL   = 1,
 107         PT_DIRECTORY_LEVEL    = 2,
 108         PT_PDPE_LEVEL         = 3,
 109         /* set max level to the biggest one */
 110         PT_MAX_HUGEPAGE_LEVEL = PT_PDPE_LEVEL,
 111 };
 112 #define KVM_NR_PAGE_SIZES       (PT_MAX_HUGEPAGE_LEVEL - \
 113                                  PT_PAGE_TABLE_LEVEL + 1)
 114 #define KVM_HPAGE_GFN_SHIFT(x)  (((x) - 1) * 9)
 115 #define KVM_HPAGE_SHIFT(x)      (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x))
 116 #define KVM_HPAGE_SIZE(x)       (1UL << KVM_HPAGE_SHIFT(x))
 117 #define KVM_HPAGE_MASK(x)       (~(KVM_HPAGE_SIZE(x) - 1))
 118 #define KVM_PAGES_PER_HPAGE(x)  (KVM_HPAGE_SIZE(x) / PAGE_SIZE)
 119 
 120 static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level)
 121 {
 122         /* KVM_HPAGE_GFN_SHIFT(PT_PAGE_TABLE_LEVEL) must be 0. */
 123         return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
 124                 (base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
 125 }
 126 
 127 #define KVM_PERMILLE_MMU_PAGES 20
 128 #define KVM_MIN_ALLOC_MMU_PAGES 64UL
 129 #define KVM_MMU_HASH_SHIFT 12
 130 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
 131 #define KVM_MIN_FREE_MMU_PAGES 5
 132 #define KVM_REFILL_PAGES 25
 133 #define KVM_MAX_CPUID_ENTRIES 80
 134 #define KVM_NR_FIXED_MTRR_REGION 88
 135 #define KVM_NR_VAR_MTRR 8
 136 
 137 #define ASYNC_PF_PER_VCPU 64
 138 
 139 enum kvm_reg {
 140         VCPU_REGS_RAX = __VCPU_REGS_RAX,
 141         VCPU_REGS_RCX = __VCPU_REGS_RCX,
 142         VCPU_REGS_RDX = __VCPU_REGS_RDX,
 143         VCPU_REGS_RBX = __VCPU_REGS_RBX,
 144         VCPU_REGS_RSP = __VCPU_REGS_RSP,
 145         VCPU_REGS_RBP = __VCPU_REGS_RBP,
 146         VCPU_REGS_RSI = __VCPU_REGS_RSI,
 147         VCPU_REGS_RDI = __VCPU_REGS_RDI,
 148 #ifdef CONFIG_X86_64
 149         VCPU_REGS_R8  = __VCPU_REGS_R8,
 150         VCPU_REGS_R9  = __VCPU_REGS_R9,
 151         VCPU_REGS_R10 = __VCPU_REGS_R10,
 152         VCPU_REGS_R11 = __VCPU_REGS_R11,
 153         VCPU_REGS_R12 = __VCPU_REGS_R12,
 154         VCPU_REGS_R13 = __VCPU_REGS_R13,
 155         VCPU_REGS_R14 = __VCPU_REGS_R14,
 156         VCPU_REGS_R15 = __VCPU_REGS_R15,
 157 #endif
 158         VCPU_REGS_RIP,
 159         NR_VCPU_REGS
 160 };
 161 
 162 enum kvm_reg_ex {
 163         VCPU_EXREG_PDPTR = NR_VCPU_REGS,
 164         VCPU_EXREG_CR3,
 165         VCPU_EXREG_RFLAGS,
 166         VCPU_EXREG_SEGMENTS,
 167 };
 168 
 169 enum {
 170         VCPU_SREG_ES,
 171         VCPU_SREG_CS,
 172         VCPU_SREG_SS,
 173         VCPU_SREG_DS,
 174         VCPU_SREG_FS,
 175         VCPU_SREG_GS,
 176         VCPU_SREG_TR,
 177         VCPU_SREG_LDTR,
 178 };
 179 
 180 #include <asm/kvm_emulate.h>
 181 
 182 #define KVM_NR_MEM_OBJS 40
 183 
 184 #define KVM_NR_DB_REGS  4
 185 
 186 #define DR6_BD          (1 << 13)
 187 #define DR6_BS          (1 << 14)
 188 #define DR6_BT          (1 << 15)
 189 #define DR6_RTM         (1 << 16)
 190 #define DR6_FIXED_1     0xfffe0ff0
 191 #define DR6_INIT        0xffff0ff0
 192 #define DR6_VOLATILE    0x0001e00f
 193 
 194 #define DR7_BP_EN_MASK  0x000000ff
 195 #define DR7_GE          (1 << 9)
 196 #define DR7_GD          (1 << 13)
 197 #define DR7_FIXED_1     0x00000400
 198 #define DR7_VOLATILE    0xffff2bff
 199 
 200 #define PFERR_PRESENT_BIT 0
 201 #define PFERR_WRITE_BIT 1
 202 #define PFERR_USER_BIT 2
 203 #define PFERR_RSVD_BIT 3
 204 #define PFERR_FETCH_BIT 4
 205 #define PFERR_PK_BIT 5
 206 #define PFERR_GUEST_FINAL_BIT 32
 207 #define PFERR_GUEST_PAGE_BIT 33
 208 
 209 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT)
 210 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT)
 211 #define PFERR_USER_MASK (1U << PFERR_USER_BIT)
 212 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT)
 213 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT)
 214 #define PFERR_PK_MASK (1U << PFERR_PK_BIT)
 215 #define PFERR_GUEST_FINAL_MASK (1ULL << PFERR_GUEST_FINAL_BIT)
 216 #define PFERR_GUEST_PAGE_MASK (1ULL << PFERR_GUEST_PAGE_BIT)
 217 
 218 #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK |        \
 219                                  PFERR_WRITE_MASK |             \
 220                                  PFERR_PRESENT_MASK)
 221 
 222 /* apic attention bits */
 223 #define KVM_APIC_CHECK_VAPIC    0
 224 /*
 225  * The following bit is set with PV-EOI, unset on EOI.
 226  * We detect PV-EOI changes by guest by comparing
 227  * this bit with PV-EOI in guest memory.
 228  * See the implementation in apic_update_pv_eoi.
 229  */
 230 #define KVM_APIC_PV_EOI_PENDING 1
 231 
 232 struct kvm_kernel_irq_routing_entry;
 233 
 234 /*
 235  * We don't want allocation failures within the mmu code, so we preallocate
 236  * enough memory for a single page fault in a cache.
 237  */
 238 struct kvm_mmu_memory_cache {
 239         int nobjs;
 240         void *objects[KVM_NR_MEM_OBJS];
 241 };
 242 
 243 /*
 244  * the pages used as guest page table on soft mmu are tracked by
 245  * kvm_memory_slot.arch.gfn_track which is 16 bits, so the role bits used
 246  * by indirect shadow page can not be more than 15 bits.
 247  *
 248  * Currently, we used 14 bits that are @level, @gpte_is_8_bytes, @quadrant, @access,
 249  * @nxe, @cr0_wp, @smep_andnot_wp and @smap_andnot_wp.
 250  */
 251 union kvm_mmu_page_role {
 252         u32 word;
 253         struct {
 254                 unsigned level:4;
 255                 unsigned gpte_is_8_bytes:1;
 256                 unsigned quadrant:2;
 257                 unsigned direct:1;
 258                 unsigned access:3;
 259                 unsigned invalid:1;
 260                 unsigned nxe:1;
 261                 unsigned cr0_wp:1;
 262                 unsigned smep_andnot_wp:1;
 263                 unsigned smap_andnot_wp:1;
 264                 unsigned ad_disabled:1;
 265                 unsigned guest_mode:1;
 266                 unsigned :6;
 267 
 268                 /*
 269                  * This is left at the top of the word so that
 270                  * kvm_memslots_for_spte_role can extract it with a
 271                  * simple shift.  While there is room, give it a whole
 272                  * byte so it is also faster to load it from memory.
 273                  */
 274                 unsigned smm:8;
 275         };
 276 };
 277 
 278 union kvm_mmu_extended_role {
 279 /*
 280  * This structure complements kvm_mmu_page_role caching everything needed for
 281  * MMU configuration. If nothing in both these structures changed, MMU
 282  * re-configuration can be skipped. @valid bit is set on first usage so we don't
 283  * treat all-zero structure as valid data.
 284  */
 285         u32 word;
 286         struct {
 287                 unsigned int valid:1;
 288                 unsigned int execonly:1;
 289                 unsigned int cr0_pg:1;
 290                 unsigned int cr4_pae:1;
 291                 unsigned int cr4_pse:1;
 292                 unsigned int cr4_pke:1;
 293                 unsigned int cr4_smap:1;
 294                 unsigned int cr4_smep:1;
 295                 unsigned int cr4_la57:1;
 296                 unsigned int maxphyaddr:6;
 297         };
 298 };
 299 
 300 union kvm_mmu_role {
 301         u64 as_u64;
 302         struct {
 303                 union kvm_mmu_page_role base;
 304                 union kvm_mmu_extended_role ext;
 305         };
 306 };
 307 
 308 struct kvm_rmap_head {
 309         unsigned long val;
 310 };
 311 
 312 struct kvm_mmu_page {
 313         struct list_head link;
 314         struct hlist_node hash_link;
 315         struct list_head lpage_disallowed_link;
 316 
 317         bool unsync;
 318         u8 mmu_valid_gen;
 319         bool mmio_cached;
 320         bool lpage_disallowed; /* Can't be replaced by an equiv large page */
 321 
 322         /*
 323          * The following two entries are used to key the shadow page in the
 324          * hash table.
 325          */
 326         union kvm_mmu_page_role role;
 327         gfn_t gfn;
 328 
 329         u64 *spt;
 330         /* hold the gfn of each spte inside spt */
 331         gfn_t *gfns;
 332         int root_count;          /* Currently serving as active root */
 333         unsigned int unsync_children;
 334         struct kvm_rmap_head parent_ptes; /* rmap pointers to parent sptes */
 335         DECLARE_BITMAP(unsync_child_bitmap, 512);
 336 
 337 #ifdef CONFIG_X86_32
 338         /*
 339          * Used out of the mmu-lock to avoid reading spte values while an
 340          * update is in progress; see the comments in __get_spte_lockless().
 341          */
 342         int clear_spte_count;
 343 #endif
 344 
 345         /* Number of writes since the last time traversal visited this page.  */
 346         atomic_t write_flooding_count;
 347 };
 348 
 349 struct kvm_pio_request {
 350         unsigned long linear_rip;
 351         unsigned long count;
 352         int in;
 353         int port;
 354         int size;
 355 };
 356 
 357 #define PT64_ROOT_MAX_LEVEL 5
 358 
 359 struct rsvd_bits_validate {
 360         u64 rsvd_bits_mask[2][PT64_ROOT_MAX_LEVEL];
 361         u64 bad_mt_xwr;
 362 };
 363 
 364 struct kvm_mmu_root_info {
 365         gpa_t cr3;
 366         hpa_t hpa;
 367 };
 368 
 369 #define KVM_MMU_ROOT_INFO_INVALID \
 370         ((struct kvm_mmu_root_info) { .cr3 = INVALID_PAGE, .hpa = INVALID_PAGE })
 371 
 372 #define KVM_MMU_NUM_PREV_ROOTS 3
 373 
 374 /*
 375  * x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit,
 376  * and 2-level 32-bit).  The kvm_mmu structure abstracts the details of the
 377  * current mmu mode.
 378  */
 379 struct kvm_mmu {
 380         void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root);
 381         unsigned long (*get_cr3)(struct kvm_vcpu *vcpu);
 382         u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index);
 383         int (*page_fault)(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u32 err,
 384                           bool prefault);
 385         void (*inject_page_fault)(struct kvm_vcpu *vcpu,
 386                                   struct x86_exception *fault);
 387         gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gpa_t gva_or_gpa,
 388                             u32 access, struct x86_exception *exception);
 389         gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
 390                                struct x86_exception *exception);
 391         int (*sync_page)(struct kvm_vcpu *vcpu,
 392                          struct kvm_mmu_page *sp);
 393         void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva, hpa_t root_hpa);
 394         void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
 395                            u64 *spte, const void *pte);
 396         hpa_t root_hpa;
 397         gpa_t root_cr3;
 398         union kvm_mmu_role mmu_role;
 399         u8 root_level;
 400         u8 shadow_root_level;
 401         u8 ept_ad;
 402         bool direct_map;
 403         struct kvm_mmu_root_info prev_roots[KVM_MMU_NUM_PREV_ROOTS];
 404 
 405         /*
 406          * Bitmap; bit set = permission fault
 407          * Byte index: page fault error code [4:1]
 408          * Bit index: pte permissions in ACC_* format
 409          */
 410         u8 permissions[16];
 411 
 412         /*
 413         * The pkru_mask indicates if protection key checks are needed.  It
 414         * consists of 16 domains indexed by page fault error code bits [4:1],
 415         * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables.
 416         * Each domain has 2 bits which are ANDed with AD and WD from PKRU.
 417         */
 418         u32 pkru_mask;
 419 
 420         u64 *pae_root;
 421         u64 *lm_root;
 422 
 423         /*
 424          * check zero bits on shadow page table entries, these
 425          * bits include not only hardware reserved bits but also
 426          * the bits spte never used.
 427          */
 428         struct rsvd_bits_validate shadow_zero_check;
 429 
 430         struct rsvd_bits_validate guest_rsvd_check;
 431 
 432         /* Can have large pages at levels 2..last_nonleaf_level-1. */
 433         u8 last_nonleaf_level;
 434 
 435         bool nx;
 436 
 437         u64 pdptrs[4]; /* pae */
 438 };
 439 
 440 struct kvm_tlb_range {
 441         u64 start_gfn;
 442         u64 pages;
 443 };
 444 
 445 enum pmc_type {
 446         KVM_PMC_GP = 0,
 447         KVM_PMC_FIXED,
 448 };
 449 
 450 struct kvm_pmc {
 451         enum pmc_type type;
 452         u8 idx;
 453         u64 counter;
 454         u64 eventsel;
 455         struct perf_event *perf_event;
 456         struct kvm_vcpu *vcpu;
 457 };
 458 
 459 struct kvm_pmu {
 460         unsigned nr_arch_gp_counters;
 461         unsigned nr_arch_fixed_counters;
 462         unsigned available_event_types;
 463         u64 fixed_ctr_ctrl;
 464         u64 global_ctrl;
 465         u64 global_status;
 466         u64 global_ovf_ctrl;
 467         u64 counter_bitmask[2];
 468         u64 global_ctrl_mask;
 469         u64 global_ovf_ctrl_mask;
 470         u64 reserved_bits;
 471         u8 version;
 472         struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC];
 473         struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED];
 474         struct irq_work irq_work;
 475         u64 reprogram_pmi;
 476 };
 477 
 478 struct kvm_pmu_ops;
 479 
 480 enum {
 481         KVM_DEBUGREG_BP_ENABLED = 1,
 482         KVM_DEBUGREG_WONT_EXIT = 2,
 483         KVM_DEBUGREG_RELOAD = 4,
 484 };
 485 
 486 struct kvm_mtrr_range {
 487         u64 base;
 488         u64 mask;
 489         struct list_head node;
 490 };
 491 
 492 struct kvm_mtrr {
 493         struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR];
 494         mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION];
 495         u64 deftype;
 496 
 497         struct list_head head;
 498 };
 499 
 500 /* Hyper-V SynIC timer */
 501 struct kvm_vcpu_hv_stimer {
 502         struct hrtimer timer;
 503         int index;
 504         union hv_stimer_config config;
 505         u64 count;
 506         u64 exp_time;
 507         struct hv_message msg;
 508         bool msg_pending;
 509 };
 510 
 511 /* Hyper-V synthetic interrupt controller (SynIC)*/
 512 struct kvm_vcpu_hv_synic {
 513         u64 version;
 514         u64 control;
 515         u64 msg_page;
 516         u64 evt_page;
 517         atomic64_t sint[HV_SYNIC_SINT_COUNT];
 518         atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT];
 519         DECLARE_BITMAP(auto_eoi_bitmap, 256);
 520         DECLARE_BITMAP(vec_bitmap, 256);
 521         bool active;
 522         bool dont_zero_synic_pages;
 523 };
 524 
 525 /* Hyper-V per vcpu emulation context */
 526 struct kvm_vcpu_hv {
 527         u32 vp_index;
 528         u64 hv_vapic;
 529         s64 runtime_offset;
 530         struct kvm_vcpu_hv_synic synic;
 531         struct kvm_hyperv_exit exit;
 532         struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT];
 533         DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT);
 534         cpumask_t tlb_flush;
 535 };
 536 
 537 struct kvm_vcpu_arch {
 538         /*
 539          * rip and regs accesses must go through
 540          * kvm_{register,rip}_{read,write} functions.
 541          */
 542         unsigned long regs[NR_VCPU_REGS];
 543         u32 regs_avail;
 544         u32 regs_dirty;
 545 
 546         unsigned long cr0;
 547         unsigned long cr0_guest_owned_bits;
 548         unsigned long cr2;
 549         unsigned long cr3;
 550         unsigned long cr4;
 551         unsigned long cr4_guest_owned_bits;
 552         unsigned long cr8;
 553         u32 host_pkru;
 554         u32 pkru;
 555         u32 hflags;
 556         u64 efer;
 557         u64 apic_base;
 558         struct kvm_lapic *apic;    /* kernel irqchip context */
 559         bool apicv_active;
 560         bool load_eoi_exitmap_pending;
 561         DECLARE_BITMAP(ioapic_handled_vectors, 256);
 562         unsigned long apic_attention;
 563         int32_t apic_arb_prio;
 564         int mp_state;
 565         u64 ia32_misc_enable_msr;
 566         u64 smbase;
 567         u64 smi_count;
 568         bool tpr_access_reporting;
 569         u64 ia32_xss;
 570         u64 microcode_version;
 571         u64 arch_capabilities;
 572 
 573         /*
 574          * Paging state of the vcpu
 575          *
 576          * If the vcpu runs in guest mode with two level paging this still saves
 577          * the paging mode of the l1 guest. This context is always used to
 578          * handle faults.
 579          */
 580         struct kvm_mmu *mmu;
 581 
 582         /* Non-nested MMU for L1 */
 583         struct kvm_mmu root_mmu;
 584 
 585         /* L1 MMU when running nested */
 586         struct kvm_mmu guest_mmu;
 587 
 588         /*
 589          * Paging state of an L2 guest (used for nested npt)
 590          *
 591          * This context will save all necessary information to walk page tables
 592          * of the an L2 guest. This context is only initialized for page table
 593          * walking and not for faulting since we never handle l2 page faults on
 594          * the host.
 595          */
 596         struct kvm_mmu nested_mmu;
 597 
 598         /*
 599          * Pointer to the mmu context currently used for
 600          * gva_to_gpa translations.
 601          */
 602         struct kvm_mmu *walk_mmu;
 603 
 604         struct kvm_mmu_memory_cache mmu_pte_list_desc_cache;
 605         struct kvm_mmu_memory_cache mmu_page_cache;
 606         struct kvm_mmu_memory_cache mmu_page_header_cache;
 607 
 608         /*
 609          * QEMU userspace and the guest each have their own FPU state.
 610          * In vcpu_run, we switch between the user and guest FPU contexts.
 611          * While running a VCPU, the VCPU thread will have the guest FPU
 612          * context.
 613          *
 614          * Note that while the PKRU state lives inside the fpu registers,
 615          * it is switched out separately at VMENTER and VMEXIT time. The
 616          * "guest_fpu" state here contains the guest FPU context, with the
 617          * host PRKU bits.
 618          */
 619         struct fpu *user_fpu;
 620         struct fpu *guest_fpu;
 621 
 622         u64 xcr0;
 623         u64 guest_supported_xcr0;
 624         u32 guest_xstate_size;
 625 
 626         struct kvm_pio_request pio;
 627         void *pio_data;
 628 
 629         u8 event_exit_inst_len;
 630 
 631         struct kvm_queued_exception {
 632                 bool pending;
 633                 bool injected;
 634                 bool has_error_code;
 635                 u8 nr;
 636                 u32 error_code;
 637                 unsigned long payload;
 638                 bool has_payload;
 639                 u8 nested_apf;
 640         } exception;
 641 
 642         struct kvm_queued_interrupt {
 643                 bool injected;
 644                 bool soft;
 645                 u8 nr;
 646         } interrupt;
 647 
 648         int halt_request; /* real mode on Intel only */
 649 
 650         int cpuid_nent;
 651         struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
 652 
 653         int maxphyaddr;
 654 
 655         /* emulate context */
 656 
 657         struct x86_emulate_ctxt emulate_ctxt;
 658         bool emulate_regs_need_sync_to_vcpu;
 659         bool emulate_regs_need_sync_from_vcpu;
 660         int (*complete_userspace_io)(struct kvm_vcpu *vcpu);
 661 
 662         gpa_t time;
 663         struct pvclock_vcpu_time_info hv_clock;
 664         unsigned int hw_tsc_khz;
 665         struct gfn_to_hva_cache pv_time;
 666         bool pv_time_enabled;
 667         /* set guest stopped flag in pvclock flags field */
 668         bool pvclock_set_guest_stopped_request;
 669 
 670         struct {
 671                 u8 preempted;
 672                 u64 msr_val;
 673                 u64 last_steal;
 674                 struct gfn_to_pfn_cache cache;
 675         } st;
 676 
 677         u64 tsc_offset;
 678         u64 last_guest_tsc;
 679         u64 last_host_tsc;
 680         u64 tsc_offset_adjustment;
 681         u64 this_tsc_nsec;
 682         u64 this_tsc_write;
 683         u64 this_tsc_generation;
 684         bool tsc_catchup;
 685         bool tsc_always_catchup;
 686         s8 virtual_tsc_shift;
 687         u32 virtual_tsc_mult;
 688         u32 virtual_tsc_khz;
 689         s64 ia32_tsc_adjust_msr;
 690         u64 msr_ia32_power_ctl;
 691         u64 tsc_scaling_ratio;
 692 
 693         atomic_t nmi_queued;  /* unprocessed asynchronous NMIs */
 694         unsigned nmi_pending; /* NMI queued after currently running handler */
 695         bool nmi_injected;    /* Trying to inject an NMI this entry */
 696         bool smi_pending;    /* SMI queued after currently running handler */
 697 
 698         struct kvm_mtrr mtrr_state;
 699         u64 pat;
 700 
 701         unsigned switch_db_regs;
 702         unsigned long db[KVM_NR_DB_REGS];
 703         unsigned long dr6;
 704         unsigned long dr7;
 705         unsigned long eff_db[KVM_NR_DB_REGS];
 706         unsigned long guest_debug_dr7;
 707         u64 msr_platform_info;
 708         u64 msr_misc_features_enables;
 709 
 710         u64 mcg_cap;
 711         u64 mcg_status;
 712         u64 mcg_ctl;
 713         u64 mcg_ext_ctl;
 714         u64 *mce_banks;
 715 
 716         /* Cache MMIO info */
 717         u64 mmio_gva;
 718         unsigned mmio_access;
 719         gfn_t mmio_gfn;
 720         u64 mmio_gen;
 721 
 722         struct kvm_pmu pmu;
 723 
 724         /* used for guest single stepping over the given code position */
 725         unsigned long singlestep_rip;
 726 
 727         struct kvm_vcpu_hv hyperv;
 728 
 729         cpumask_var_t wbinvd_dirty_mask;
 730 
 731         unsigned long last_retry_eip;
 732         unsigned long last_retry_addr;
 733 
 734         struct {
 735                 bool halted;
 736                 gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)];
 737                 struct gfn_to_hva_cache data;
 738                 u64 msr_val;
 739                 u32 id;
 740                 bool send_user_only;
 741                 u32 host_apf_reason;
 742                 unsigned long nested_apf_token;
 743                 bool delivery_as_pf_vmexit;
 744         } apf;
 745 
 746         /* OSVW MSRs (AMD only) */
 747         struct {
 748                 u64 length;
 749                 u64 status;
 750         } osvw;
 751 
 752         struct {
 753                 u64 msr_val;
 754                 struct gfn_to_hva_cache data;
 755         } pv_eoi;
 756 
 757         u64 msr_kvm_poll_control;
 758 
 759         /*
 760          * Indicate whether the access faults on its page table in guest
 761          * which is set when fix page fault and used to detect unhandeable
 762          * instruction.
 763          */
 764         bool write_fault_to_shadow_pgtable;
 765 
 766         /* set at EPT violation at this point */
 767         unsigned long exit_qualification;
 768 
 769         /* pv related host specific info */
 770         struct {
 771                 bool pv_unhalted;
 772         } pv;
 773 
 774         int pending_ioapic_eoi;
 775         int pending_external_vector;
 776 
 777         /* GPA available */
 778         bool gpa_available;
 779         gpa_t gpa_val;
 780 
 781         /* be preempted when it's in kernel-mode(cpl=0) */
 782         bool preempted_in_kernel;
 783 
 784         /* Flush the L1 Data cache for L1TF mitigation on VMENTER */
 785         bool l1tf_flush_l1d;
 786 
 787         /* AMD MSRC001_0015 Hardware Configuration */
 788         u64 msr_hwcr;
 789 };
 790 
 791 struct kvm_lpage_info {
 792         int disallow_lpage;
 793 };
 794 
 795 struct kvm_arch_memory_slot {
 796         struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES];
 797         struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1];
 798         unsigned short *gfn_track[KVM_PAGE_TRACK_MAX];
 799 };
 800 
 801 /*
 802  * We use as the mode the number of bits allocated in the LDR for the
 803  * logical processor ID.  It happens that these are all powers of two.
 804  * This makes it is very easy to detect cases where the APICs are
 805  * configured for multiple modes; in that case, we cannot use the map and
 806  * hence cannot use kvm_irq_delivery_to_apic_fast either.
 807  */
 808 #define KVM_APIC_MODE_XAPIC_CLUSTER          4
 809 #define KVM_APIC_MODE_XAPIC_FLAT             8
 810 #define KVM_APIC_MODE_X2APIC                16
 811 
 812 struct kvm_apic_map {
 813         struct rcu_head rcu;
 814         u8 mode;
 815         u32 max_apic_id;
 816         union {
 817                 struct kvm_lapic *xapic_flat_map[8];
 818                 struct kvm_lapic *xapic_cluster_map[16][4];
 819         };
 820         struct kvm_lapic *phys_map[];
 821 };
 822 
 823 /* Hyper-V emulation context */
 824 struct kvm_hv {
 825         struct mutex hv_lock;
 826         u64 hv_guest_os_id;
 827         u64 hv_hypercall;
 828         u64 hv_tsc_page;
 829 
 830         /* Hyper-v based guest crash (NT kernel bugcheck) parameters */
 831         u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS];
 832         u64 hv_crash_ctl;
 833 
 834         HV_REFERENCE_TSC_PAGE tsc_ref;
 835 
 836         struct idr conn_to_evt;
 837 
 838         u64 hv_reenlightenment_control;
 839         u64 hv_tsc_emulation_control;
 840         u64 hv_tsc_emulation_status;
 841 
 842         /* How many vCPUs have VP index != vCPU index */
 843         atomic_t num_mismatched_vp_indexes;
 844 
 845         struct hv_partition_assist_pg *hv_pa_pg;
 846 };
 847 
 848 enum kvm_irqchip_mode {
 849         KVM_IRQCHIP_NONE,
 850         KVM_IRQCHIP_KERNEL,       /* created with KVM_CREATE_IRQCHIP */
 851         KVM_IRQCHIP_SPLIT,        /* created with KVM_CAP_SPLIT_IRQCHIP */
 852 };
 853 
 854 struct kvm_arch {
 855         unsigned long n_used_mmu_pages;
 856         unsigned long n_requested_mmu_pages;
 857         unsigned long n_max_mmu_pages;
 858         unsigned int indirect_shadow_pages;
 859         u8 mmu_valid_gen;
 860         struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
 861         /*
 862          * Hash table of struct kvm_mmu_page.
 863          */
 864         struct list_head active_mmu_pages;
 865         struct list_head zapped_obsolete_pages;
 866         struct list_head lpage_disallowed_mmu_pages;
 867         struct kvm_page_track_notifier_node mmu_sp_tracker;
 868         struct kvm_page_track_notifier_head track_notifier_head;
 869 
 870         struct list_head assigned_dev_head;
 871         struct iommu_domain *iommu_domain;
 872         bool iommu_noncoherent;
 873 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA
 874         atomic_t noncoherent_dma_count;
 875 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE
 876         atomic_t assigned_device_count;
 877         struct kvm_pic *vpic;
 878         struct kvm_ioapic *vioapic;
 879         struct kvm_pit *vpit;
 880         atomic_t vapics_in_nmi_mode;
 881         struct mutex apic_map_lock;
 882         struct kvm_apic_map *apic_map;
 883 
 884         bool apic_access_page_done;
 885 
 886         gpa_t wall_clock;
 887 
 888         bool mwait_in_guest;
 889         bool hlt_in_guest;
 890         bool pause_in_guest;
 891         bool cstate_in_guest;
 892 
 893         unsigned long irq_sources_bitmap;
 894         s64 kvmclock_offset;
 895         raw_spinlock_t tsc_write_lock;
 896         u64 last_tsc_nsec;
 897         u64 last_tsc_write;
 898         u32 last_tsc_khz;
 899         u64 cur_tsc_nsec;
 900         u64 cur_tsc_write;
 901         u64 cur_tsc_offset;
 902         u64 cur_tsc_generation;
 903         int nr_vcpus_matched_tsc;
 904 
 905         spinlock_t pvclock_gtod_sync_lock;
 906         bool use_master_clock;
 907         u64 master_kernel_ns;
 908         u64 master_cycle_now;
 909         struct delayed_work kvmclock_update_work;
 910         struct delayed_work kvmclock_sync_work;
 911 
 912         struct kvm_xen_hvm_config xen_hvm_config;
 913 
 914         /* reads protected by irq_srcu, writes by irq_lock */
 915         struct hlist_head mask_notifier_list;
 916 
 917         struct kvm_hv hyperv;
 918 
 919         #ifdef CONFIG_KVM_MMU_AUDIT
 920         int audit_point;
 921         #endif
 922 
 923         bool backwards_tsc_observed;
 924         bool boot_vcpu_runs_old_kvmclock;
 925         u32 bsp_vcpu_id;
 926 
 927         u64 disabled_quirks;
 928 
 929         enum kvm_irqchip_mode irqchip_mode;
 930         u8 nr_reserved_ioapic_pins;
 931 
 932         bool disabled_lapic_found;
 933 
 934         bool x2apic_format;
 935         bool x2apic_broadcast_quirk_disabled;
 936 
 937         bool guest_can_read_msr_platform_info;
 938         bool exception_payload_enabled;
 939 
 940         struct kvm_pmu_event_filter *pmu_event_filter;
 941         struct task_struct *nx_lpage_recovery_thread;
 942 };
 943 
 944 struct kvm_vm_stat {
 945         ulong mmu_shadow_zapped;
 946         ulong mmu_pte_write;
 947         ulong mmu_pte_updated;
 948         ulong mmu_pde_zapped;
 949         ulong mmu_flooded;
 950         ulong mmu_recycled;
 951         ulong mmu_cache_miss;
 952         ulong mmu_unsync;
 953         ulong remote_tlb_flush;
 954         ulong lpages;
 955         ulong nx_lpage_splits;
 956         ulong max_mmu_page_hash_collisions;
 957 };
 958 
 959 struct kvm_vcpu_stat {
 960         u64 pf_fixed;
 961         u64 pf_guest;
 962         u64 tlb_flush;
 963         u64 invlpg;
 964 
 965         u64 exits;
 966         u64 io_exits;
 967         u64 mmio_exits;
 968         u64 signal_exits;
 969         u64 irq_window_exits;
 970         u64 nmi_window_exits;
 971         u64 l1d_flush;
 972         u64 halt_exits;
 973         u64 halt_successful_poll;
 974         u64 halt_attempted_poll;
 975         u64 halt_poll_invalid;
 976         u64 halt_wakeup;
 977         u64 request_irq_exits;
 978         u64 irq_exits;
 979         u64 host_state_reload;
 980         u64 fpu_reload;
 981         u64 insn_emulation;
 982         u64 insn_emulation_fail;
 983         u64 hypercalls;
 984         u64 irq_injections;
 985         u64 nmi_injections;
 986         u64 req_event;
 987 };
 988 
 989 struct x86_instruction_info;
 990 
 991 struct msr_data {
 992         bool host_initiated;
 993         u32 index;
 994         u64 data;
 995 };
 996 
 997 struct kvm_lapic_irq {
 998         u32 vector;
 999         u16 delivery_mode;
1000         u16 dest_mode;
1001         bool level;
1002         u16 trig_mode;
1003         u32 shorthand;
1004         u32 dest_id;
1005         bool msi_redir_hint;
1006 };
1007 
1008 struct kvm_x86_ops {
1009         int (*cpu_has_kvm_support)(void);          /* __init */
1010         int (*disabled_by_bios)(void);             /* __init */
1011         int (*hardware_enable)(void);
1012         void (*hardware_disable)(void);
1013         int (*check_processor_compatibility)(void);/* __init */
1014         int (*hardware_setup)(void);               /* __init */
1015         void (*hardware_unsetup)(void);            /* __exit */
1016         bool (*cpu_has_accelerated_tpr)(void);
1017         bool (*has_emulated_msr)(int index);
1018         void (*cpuid_update)(struct kvm_vcpu *vcpu);
1019 
1020         struct kvm *(*vm_alloc)(void);
1021         void (*vm_free)(struct kvm *);
1022         int (*vm_init)(struct kvm *kvm);
1023         void (*vm_destroy)(struct kvm *kvm);
1024 
1025         /* Create, but do not attach this VCPU */
1026         struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
1027         void (*vcpu_free)(struct kvm_vcpu *vcpu);
1028         void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event);
1029 
1030         void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
1031         void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
1032         void (*vcpu_put)(struct kvm_vcpu *vcpu);
1033 
1034         void (*update_bp_intercept)(struct kvm_vcpu *vcpu);
1035         int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
1036         int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
1037         u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
1038         void (*get_segment)(struct kvm_vcpu *vcpu,
1039                             struct kvm_segment *var, int seg);
1040         int (*get_cpl)(struct kvm_vcpu *vcpu);
1041         void (*set_segment)(struct kvm_vcpu *vcpu,
1042                             struct kvm_segment *var, int seg);
1043         void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
1044         void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu);
1045         void (*decache_cr3)(struct kvm_vcpu *vcpu);
1046         void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
1047         void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
1048         void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
1049         int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
1050         void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
1051         void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1052         void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1053         void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1054         void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1055         u64 (*get_dr6)(struct kvm_vcpu *vcpu);
1056         void (*set_dr6)(struct kvm_vcpu *vcpu, unsigned long value);
1057         void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu);
1058         void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value);
1059         void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
1060         unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
1061         void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
1062 
1063         void (*tlb_flush)(struct kvm_vcpu *vcpu, bool invalidate_gpa);
1064         int  (*tlb_remote_flush)(struct kvm *kvm);
1065         int  (*tlb_remote_flush_with_range)(struct kvm *kvm,
1066                         struct kvm_tlb_range *range);
1067 
1068         /*
1069          * Flush any TLB entries associated with the given GVA.
1070          * Does not need to flush GPA->HPA mappings.
1071          * Can potentially get non-canonical addresses through INVLPGs, which
1072          * the implementation may choose to ignore if appropriate.
1073          */
1074         void (*tlb_flush_gva)(struct kvm_vcpu *vcpu, gva_t addr);
1075 
1076         void (*run)(struct kvm_vcpu *vcpu);
1077         int (*handle_exit)(struct kvm_vcpu *vcpu);
1078         int (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
1079         void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
1080         u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu);
1081         void (*patch_hypercall)(struct kvm_vcpu *vcpu,
1082                                 unsigned char *hypercall_addr);
1083         void (*set_irq)(struct kvm_vcpu *vcpu);
1084         void (*set_nmi)(struct kvm_vcpu *vcpu);
1085         void (*queue_exception)(struct kvm_vcpu *vcpu);
1086         void (*cancel_injection)(struct kvm_vcpu *vcpu);
1087         int (*interrupt_allowed)(struct kvm_vcpu *vcpu);
1088         int (*nmi_allowed)(struct kvm_vcpu *vcpu);
1089         bool (*get_nmi_mask)(struct kvm_vcpu *vcpu);
1090         void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked);
1091         void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
1092         void (*enable_irq_window)(struct kvm_vcpu *vcpu);
1093         void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
1094         bool (*get_enable_apicv)(struct kvm_vcpu *vcpu);
1095         void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu);
1096         void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr);
1097         void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr);
1098         bool (*guest_apic_has_interrupt)(struct kvm_vcpu *vcpu);
1099         void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);
1100         void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu);
1101         void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu, hpa_t hpa);
1102         int (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector);
1103         int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu);
1104         int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
1105         int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr);
1106         int (*get_tdp_level)(struct kvm_vcpu *vcpu);
1107         u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
1108         int (*get_lpage_level)(void);
1109         bool (*rdtscp_supported)(void);
1110         bool (*invpcid_supported)(void);
1111 
1112         void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
1113 
1114         void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry);
1115 
1116         bool (*has_wbinvd_exit)(void);
1117 
1118         u64 (*read_l1_tsc_offset)(struct kvm_vcpu *vcpu);
1119         /* Returns actual tsc_offset set in active VMCS */
1120         u64 (*write_l1_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset);
1121 
1122         void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2);
1123 
1124         int (*check_intercept)(struct kvm_vcpu *vcpu,
1125                                struct x86_instruction_info *info,
1126                                enum x86_intercept_stage stage);
1127         void (*handle_exit_irqoff)(struct kvm_vcpu *vcpu);
1128         bool (*mpx_supported)(void);
1129         bool (*xsaves_supported)(void);
1130         bool (*umip_emulated)(void);
1131         bool (*pt_supported)(void);
1132         bool (*pku_supported)(void);
1133 
1134         int (*check_nested_events)(struct kvm_vcpu *vcpu);
1135         void (*request_immediate_exit)(struct kvm_vcpu *vcpu);
1136 
1137         void (*sched_in)(struct kvm_vcpu *kvm, int cpu);
1138 
1139         /*
1140          * Arch-specific dirty logging hooks. These hooks are only supposed to
1141          * be valid if the specific arch has hardware-accelerated dirty logging
1142          * mechanism. Currently only for PML on VMX.
1143          *
1144          *  - slot_enable_log_dirty:
1145          *      called when enabling log dirty mode for the slot.
1146          *  - slot_disable_log_dirty:
1147          *      called when disabling log dirty mode for the slot.
1148          *      also called when slot is created with log dirty disabled.
1149          *  - flush_log_dirty:
1150          *      called before reporting dirty_bitmap to userspace.
1151          *  - enable_log_dirty_pt_masked:
1152          *      called when reenabling log dirty for the GFNs in the mask after
1153          *      corresponding bits are cleared in slot->dirty_bitmap.
1154          */
1155         void (*slot_enable_log_dirty)(struct kvm *kvm,
1156                                       struct kvm_memory_slot *slot);
1157         void (*slot_disable_log_dirty)(struct kvm *kvm,
1158                                        struct kvm_memory_slot *slot);
1159         void (*flush_log_dirty)(struct kvm *kvm);
1160         void (*enable_log_dirty_pt_masked)(struct kvm *kvm,
1161                                            struct kvm_memory_slot *slot,
1162                                            gfn_t offset, unsigned long mask);
1163         int (*write_log_dirty)(struct kvm_vcpu *vcpu);
1164 
1165         /* pmu operations of sub-arch */
1166         const struct kvm_pmu_ops *pmu_ops;
1167 
1168         /*
1169          * Architecture specific hooks for vCPU blocking due to
1170          * HLT instruction.
1171          * Returns for .pre_block():
1172          *    - 0 means continue to block the vCPU.
1173          *    - 1 means we cannot block the vCPU since some event
1174          *        happens during this period, such as, 'ON' bit in
1175          *        posted-interrupts descriptor is set.
1176          */
1177         int (*pre_block)(struct kvm_vcpu *vcpu);
1178         void (*post_block)(struct kvm_vcpu *vcpu);
1179 
1180         void (*vcpu_blocking)(struct kvm_vcpu *vcpu);
1181         void (*vcpu_unblocking)(struct kvm_vcpu *vcpu);
1182 
1183         int (*update_pi_irte)(struct kvm *kvm, unsigned int host_irq,
1184                               uint32_t guest_irq, bool set);
1185         void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu);
1186         bool (*dy_apicv_has_pending_interrupt)(struct kvm_vcpu *vcpu);
1187 
1188         int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc,
1189                             bool *expired);
1190         void (*cancel_hv_timer)(struct kvm_vcpu *vcpu);
1191 
1192         void (*setup_mce)(struct kvm_vcpu *vcpu);
1193 
1194         int (*get_nested_state)(struct kvm_vcpu *vcpu,
1195                                 struct kvm_nested_state __user *user_kvm_nested_state,
1196                                 unsigned user_data_size);
1197         int (*set_nested_state)(struct kvm_vcpu *vcpu,
1198                                 struct kvm_nested_state __user *user_kvm_nested_state,
1199                                 struct kvm_nested_state *kvm_state);
1200         bool (*get_vmcs12_pages)(struct kvm_vcpu *vcpu);
1201 
1202         int (*smi_allowed)(struct kvm_vcpu *vcpu);
1203         int (*pre_enter_smm)(struct kvm_vcpu *vcpu, char *smstate);
1204         int (*pre_leave_smm)(struct kvm_vcpu *vcpu, const char *smstate);
1205         int (*enable_smi_window)(struct kvm_vcpu *vcpu);
1206 
1207         int (*mem_enc_op)(struct kvm *kvm, void __user *argp);
1208         int (*mem_enc_reg_region)(struct kvm *kvm, struct kvm_enc_region *argp);
1209         int (*mem_enc_unreg_region)(struct kvm *kvm, struct kvm_enc_region *argp);
1210 
1211         int (*get_msr_feature)(struct kvm_msr_entry *entry);
1212 
1213         int (*nested_enable_evmcs)(struct kvm_vcpu *vcpu,
1214                                    uint16_t *vmcs_version);
1215         uint16_t (*nested_get_evmcs_version)(struct kvm_vcpu *vcpu);
1216 
1217         bool (*need_emulation_on_page_fault)(struct kvm_vcpu *vcpu);
1218 
1219         bool (*apic_init_signal_blocked)(struct kvm_vcpu *vcpu);
1220         int (*enable_direct_tlbflush)(struct kvm_vcpu *vcpu);
1221 };
1222 
1223 struct kvm_arch_async_pf {
1224         u32 token;
1225         gfn_t gfn;
1226         unsigned long cr3;
1227         bool direct_map;
1228 };
1229 
1230 extern struct kvm_x86_ops *kvm_x86_ops;
1231 extern struct kmem_cache *x86_fpu_cache;
1232 
1233 #define __KVM_HAVE_ARCH_VM_ALLOC
1234 static inline struct kvm *kvm_arch_alloc_vm(void)
1235 {
1236         return kvm_x86_ops->vm_alloc();
1237 }
1238 
1239 static inline void kvm_arch_free_vm(struct kvm *kvm)
1240 {
1241         return kvm_x86_ops->vm_free(kvm);
1242 }
1243 
1244 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLB
1245 static inline int kvm_arch_flush_remote_tlb(struct kvm *kvm)
1246 {
1247         if (kvm_x86_ops->tlb_remote_flush &&
1248             !kvm_x86_ops->tlb_remote_flush(kvm))
1249                 return 0;
1250         else
1251                 return -ENOTSUPP;
1252 }
1253 
1254 int kvm_mmu_module_init(void);
1255 void kvm_mmu_module_exit(void);
1256 
1257 void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
1258 int kvm_mmu_create(struct kvm_vcpu *vcpu);
1259 void kvm_mmu_init_vm(struct kvm *kvm);
1260 void kvm_mmu_uninit_vm(struct kvm *kvm);
1261 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
1262                 u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 p_mask,
1263                 u64 acc_track_mask, u64 me_mask);
1264 
1265 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
1266 void kvm_mmu_slot_remove_write_access(struct kvm *kvm,
1267                                       struct kvm_memory_slot *memslot);
1268 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm,
1269                                    const struct kvm_memory_slot *memslot);
1270 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm,
1271                                    struct kvm_memory_slot *memslot);
1272 void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm,
1273                                         struct kvm_memory_slot *memslot);
1274 void kvm_mmu_slot_set_dirty(struct kvm *kvm,
1275                             struct kvm_memory_slot *memslot);
1276 void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm,
1277                                    struct kvm_memory_slot *slot,
1278                                    gfn_t gfn_offset, unsigned long mask);
1279 void kvm_mmu_zap_all(struct kvm *kvm);
1280 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen);
1281 unsigned long kvm_mmu_calculate_default_mmu_pages(struct kvm *kvm);
1282 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long kvm_nr_mmu_pages);
1283 
1284 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3);
1285 bool pdptrs_changed(struct kvm_vcpu *vcpu);
1286 
1287 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
1288                           const void *val, int bytes);
1289 
1290 struct kvm_irq_mask_notifier {
1291         void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked);
1292         int irq;
1293         struct hlist_node link;
1294 };
1295 
1296 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
1297                                     struct kvm_irq_mask_notifier *kimn);
1298 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
1299                                       struct kvm_irq_mask_notifier *kimn);
1300 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
1301                              bool mask);
1302 
1303 extern bool tdp_enabled;
1304 
1305 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu);
1306 
1307 /* control of guest tsc rate supported? */
1308 extern bool kvm_has_tsc_control;
1309 /* maximum supported tsc_khz for guests */
1310 extern u32  kvm_max_guest_tsc_khz;
1311 /* number of bits of the fractional part of the TSC scaling ratio */
1312 extern u8   kvm_tsc_scaling_ratio_frac_bits;
1313 /* maximum allowed value of TSC scaling ratio */
1314 extern u64  kvm_max_tsc_scaling_ratio;
1315 /* 1ull << kvm_tsc_scaling_ratio_frac_bits */
1316 extern u64  kvm_default_tsc_scaling_ratio;
1317 
1318 extern u64 kvm_mce_cap_supported;
1319 
1320 /*
1321  * EMULTYPE_NO_DECODE - Set when re-emulating an instruction (after completing
1322  *                      userspace I/O) to indicate that the emulation context
1323  *                      should be resued as is, i.e. skip initialization of
1324  *                      emulation context, instruction fetch and decode.
1325  *
1326  * EMULTYPE_TRAP_UD - Set when emulating an intercepted #UD from hardware.
1327  *                    Indicates that only select instructions (tagged with
1328  *                    EmulateOnUD) should be emulated (to minimize the emulator
1329  *                    attack surface).  See also EMULTYPE_TRAP_UD_FORCED.
1330  *
1331  * EMULTYPE_SKIP - Set when emulating solely to skip an instruction, i.e. to
1332  *                 decode the instruction length.  For use *only* by
1333  *                 kvm_x86_ops->skip_emulated_instruction() implementations.
1334  *
1335  * EMULTYPE_ALLOW_RETRY - Set when the emulator should resume the guest to
1336  *                        retry native execution under certain conditions.
1337  *
1338  * EMULTYPE_TRAP_UD_FORCED - Set when emulating an intercepted #UD that was
1339  *                           triggered by KVM's magic "force emulation" prefix,
1340  *                           which is opt in via module param (off by default).
1341  *                           Bypasses EmulateOnUD restriction despite emulating
1342  *                           due to an intercepted #UD (see EMULTYPE_TRAP_UD).
1343  *                           Used to test the full emulator from userspace.
1344  *
1345  * EMULTYPE_VMWARE_GP - Set when emulating an intercepted #GP for VMware
1346  *                      backdoor emulation, which is opt in via module param.
1347  *                      VMware backoor emulation handles select instructions
1348  *                      and reinjects the #GP for all other cases.
1349  */
1350 #define EMULTYPE_NO_DECODE          (1 << 0)
1351 #define EMULTYPE_TRAP_UD            (1 << 1)
1352 #define EMULTYPE_SKIP               (1 << 2)
1353 #define EMULTYPE_ALLOW_RETRY        (1 << 3)
1354 #define EMULTYPE_TRAP_UD_FORCED     (1 << 4)
1355 #define EMULTYPE_VMWARE_GP          (1 << 5)
1356 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type);
1357 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
1358                                         void *insn, int insn_len);
1359 
1360 void kvm_enable_efer_bits(u64);
1361 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer);
1362 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data);
1363 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data);
1364 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu);
1365 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu);
1366 
1367 struct x86_emulate_ctxt;
1368 
1369 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in);
1370 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
1371 int kvm_emulate_halt(struct kvm_vcpu *vcpu);
1372 int kvm_vcpu_halt(struct kvm_vcpu *vcpu);
1373 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu);
1374 
1375 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
1376 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg);
1377 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector);
1378 
1379 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
1380                     int reason, bool has_error_code, u32 error_code);
1381 
1382 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
1383 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
1384 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
1385 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
1386 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val);
1387 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val);
1388 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
1389 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
1390 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
1391 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr);
1392 
1393 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
1394 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
1395 
1396 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu);
1397 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
1398 bool kvm_rdpmc(struct kvm_vcpu *vcpu);
1399 
1400 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
1401 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
1402 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr);
1403 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
1404 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
1405 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
1406                             gfn_t gfn, void *data, int offset, int len,
1407                             u32 access);
1408 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl);
1409 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr);
1410 
1411 static inline int __kvm_irq_line_state(unsigned long *irq_state,
1412                                        int irq_source_id, int level)
1413 {
1414         /* Logical OR for level trig interrupt */
1415         if (level)
1416                 __set_bit(irq_source_id, irq_state);
1417         else
1418                 __clear_bit(irq_source_id, irq_state);
1419 
1420         return !!(*irq_state);
1421 }
1422 
1423 #define KVM_MMU_ROOT_CURRENT            BIT(0)
1424 #define KVM_MMU_ROOT_PREVIOUS(i)        BIT(1+i)
1425 #define KVM_MMU_ROOTS_ALL               (~0UL)
1426 
1427 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level);
1428 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id);
1429 
1430 void kvm_inject_nmi(struct kvm_vcpu *vcpu);
1431 
1432 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn);
1433 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
1434 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
1435 int kvm_mmu_load(struct kvm_vcpu *vcpu);
1436 void kvm_mmu_unload(struct kvm_vcpu *vcpu);
1437 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
1438 void kvm_mmu_free_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
1439                         ulong roots_to_free);
1440 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
1441                            struct x86_exception *exception);
1442 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
1443                               struct x86_exception *exception);
1444 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
1445                                struct x86_exception *exception);
1446 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
1447                                struct x86_exception *exception);
1448 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
1449                                 struct x86_exception *exception);
1450 
1451 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu);
1452 
1453 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
1454 
1455 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code,
1456                        void *insn, int insn_len);
1457 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
1458 void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid);
1459 void kvm_mmu_new_cr3(struct kvm_vcpu *vcpu, gpa_t new_cr3, bool skip_tlb_flush);
1460 
1461 void kvm_enable_tdp(void);
1462 void kvm_disable_tdp(void);
1463 
1464 static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
1465                                   struct x86_exception *exception)
1466 {
1467         return gpa;
1468 }
1469 
1470 static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
1471 {
1472         struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
1473 
1474         return (struct kvm_mmu_page *)page_private(page);
1475 }
1476 
1477 static inline u16 kvm_read_ldt(void)
1478 {
1479         u16 ldt;
1480         asm("sldt %0" : "=g"(ldt));
1481         return ldt;
1482 }
1483 
1484 static inline void kvm_load_ldt(u16 sel)
1485 {
1486         asm("lldt %0" : : "rm"(sel));
1487 }
1488 
1489 #ifdef CONFIG_X86_64
1490 static inline unsigned long read_msr(unsigned long msr)
1491 {
1492         u64 value;
1493 
1494         rdmsrl(msr, value);
1495         return value;
1496 }
1497 #endif
1498 
1499 static inline u32 get_rdx_init_val(void)
1500 {
1501         return 0x600; /* P6 family */
1502 }
1503 
1504 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
1505 {
1506         kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
1507 }
1508 
1509 #define TSS_IOPB_BASE_OFFSET 0x66
1510 #define TSS_BASE_SIZE 0x68
1511 #define TSS_IOPB_SIZE (65536 / 8)
1512 #define TSS_REDIRECTION_SIZE (256 / 8)
1513 #define RMODE_TSS_SIZE                                                  \
1514         (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
1515 
1516 enum {
1517         TASK_SWITCH_CALL = 0,
1518         TASK_SWITCH_IRET = 1,
1519         TASK_SWITCH_JMP = 2,
1520         TASK_SWITCH_GATE = 3,
1521 };
1522 
1523 #define HF_GIF_MASK             (1 << 0)
1524 #define HF_HIF_MASK             (1 << 1)
1525 #define HF_VINTR_MASK           (1 << 2)
1526 #define HF_NMI_MASK             (1 << 3)
1527 #define HF_IRET_MASK            (1 << 4)
1528 #define HF_GUEST_MASK           (1 << 5) /* VCPU is in guest-mode */
1529 #define HF_SMM_MASK             (1 << 6)
1530 #define HF_SMM_INSIDE_NMI_MASK  (1 << 7)
1531 
1532 #define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE
1533 #define KVM_ADDRESS_SPACE_NUM 2
1534 
1535 #define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0)
1536 #define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm)
1537 
1538 asmlinkage void kvm_spurious_fault(void);
1539 
1540 /*
1541  * Hardware virtualization extension instructions may fault if a
1542  * reboot turns off virtualization while processes are running.
1543  * Usually after catching the fault we just panic; during reboot
1544  * instead the instruction is ignored.
1545  */
1546 #define __kvm_handle_fault_on_reboot(insn)                              \
1547         "666: \n\t"                                                     \
1548         insn "\n\t"                                                     \
1549         "jmp    668f \n\t"                                              \
1550         "667: \n\t"                                                     \
1551         "call   kvm_spurious_fault \n\t"                                \
1552         "668: \n\t"                                                     \
1553         _ASM_EXTABLE(666b, 667b)
1554 
1555 #define KVM_ARCH_WANT_MMU_NOTIFIER
1556 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end);
1557 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);
1558 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
1559 int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
1560 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v);
1561 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);
1562 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
1563 int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
1564 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event);
1565 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu);
1566 
1567 int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low,
1568                     unsigned long ipi_bitmap_high, u32 min,
1569                     unsigned long icr, int op_64_bit);
1570 
1571 void kvm_define_shared_msr(unsigned index, u32 msr);
1572 int kvm_set_shared_msr(unsigned index, u64 val, u64 mask);
1573 
1574 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc);
1575 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc);
1576 
1577 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu);
1578 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip);
1579 
1580 void kvm_make_mclock_inprogress_request(struct kvm *kvm);
1581 void kvm_make_scan_ioapic_request(struct kvm *kvm);
1582 
1583 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
1584                                      struct kvm_async_pf *work);
1585 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
1586                                  struct kvm_async_pf *work);
1587 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu,
1588                                struct kvm_async_pf *work);
1589 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu);
1590 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn);
1591 
1592 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu);
1593 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err);
1594 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu);
1595 
1596 int kvm_is_in_guest(void);
1597 
1598 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size);
1599 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size);
1600 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu);
1601 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu);
1602 
1603 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq,
1604                              struct kvm_vcpu **dest_vcpu);
1605 
1606 void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e,
1607                      struct kvm_lapic_irq *irq);
1608 
1609 static inline bool kvm_irq_is_postable(struct kvm_lapic_irq *irq)
1610 {
1611         /* We can only post Fixed and LowPrio IRQs */
1612         return (irq->delivery_mode == APIC_DM_FIXED ||
1613                 irq->delivery_mode == APIC_DM_LOWEST);
1614 }
1615 
1616 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu)
1617 {
1618         if (kvm_x86_ops->vcpu_blocking)
1619                 kvm_x86_ops->vcpu_blocking(vcpu);
1620 }
1621 
1622 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu)
1623 {
1624         if (kvm_x86_ops->vcpu_unblocking)
1625                 kvm_x86_ops->vcpu_unblocking(vcpu);
1626 }
1627 
1628 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {}
1629 
1630 static inline int kvm_cpu_get_apicid(int mps_cpu)
1631 {
1632 #ifdef CONFIG_X86_LOCAL_APIC
1633         return default_cpu_present_to_apicid(mps_cpu);
1634 #else
1635         WARN_ON_ONCE(1);
1636         return BAD_APICID;
1637 #endif
1638 }
1639 
1640 #define put_smstate(type, buf, offset, val)                      \
1641         *(type *)((buf) + (offset) - 0x7e00) = val
1642 
1643 #define GET_SMSTATE(type, buf, offset)          \
1644         (*(type *)((buf) + (offset) - 0x7e00))
1645 
1646 #endif /* _ASM_X86_KVM_HOST_H */
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root/arch/x86/include/asm/kvm_host.h

INCLUDED FROM

DEFINITIONS
