arch/x86/include/asm/pgtable

/* [<][>][^][v][top][bottom][index][help] */
This source file includes following definitions.
native_make_pgd
native_pgd_val
pgd_flags
native_make_p4d
native_p4d_val
native_make_p4d
native_p4d_val
native_make_pud
native_pud_val
native_make_pud
native_pud_val
native_make_pmd
native_pmd_val
native_make_pmd
native_pmd_val
p4d_pfn_mask
p4d_flags_mask
p4d_flags
pud_pfn_mask
pud_flags_mask
pud_flags
pmd_pfn_mask
pmd_flags_mask
pmd_flags
native_make_pte
native_pte_val
pte_flags
cachemode2protval
cachemode2pgprot
pgprot2cachemode
pgprot_4k_2_large
pgprot_large_2_4k
update_page_count
   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef _ASM_X86_PGTABLE_DEFS_H
   3 #define _ASM_X86_PGTABLE_DEFS_H
   4 
   5 #include <linux/const.h>
   6 #include <linux/mem_encrypt.h>
   7 
   8 #include <asm/page_types.h>
   9 
  10 #define FIRST_USER_ADDRESS      0UL
  11 
  12 #define _PAGE_BIT_PRESENT       0       /* is present */
  13 #define _PAGE_BIT_RW            1       /* writeable */
  14 #define _PAGE_BIT_USER          2       /* userspace addressable */
  15 #define _PAGE_BIT_PWT           3       /* page write through */
  16 #define _PAGE_BIT_PCD           4       /* page cache disabled */
  17 #define _PAGE_BIT_ACCESSED      5       /* was accessed (raised by CPU) */
  18 #define _PAGE_BIT_DIRTY         6       /* was written to (raised by CPU) */
  19 #define _PAGE_BIT_PSE           7       /* 4 MB (or 2MB) page */
  20 #define _PAGE_BIT_PAT           7       /* on 4KB pages */
  21 #define _PAGE_BIT_GLOBAL        8       /* Global TLB entry PPro+ */
  22 #define _PAGE_BIT_SOFTW1        9       /* available for programmer */
  23 #define _PAGE_BIT_SOFTW2        10      /* " */
  24 #define _PAGE_BIT_SOFTW3        11      /* " */
  25 #define _PAGE_BIT_PAT_LARGE     12      /* On 2MB or 1GB pages */
  26 #define _PAGE_BIT_SOFTW4        58      /* available for programmer */
  27 #define _PAGE_BIT_PKEY_BIT0     59      /* Protection Keys, bit 1/4 */
  28 #define _PAGE_BIT_PKEY_BIT1     60      /* Protection Keys, bit 2/4 */
  29 #define _PAGE_BIT_PKEY_BIT2     61      /* Protection Keys, bit 3/4 */
  30 #define _PAGE_BIT_PKEY_BIT3     62      /* Protection Keys, bit 4/4 */
  31 #define _PAGE_BIT_NX            63      /* No execute: only valid after cpuid check */
  32 
  33 #define _PAGE_BIT_SPECIAL       _PAGE_BIT_SOFTW1
  34 #define _PAGE_BIT_CPA_TEST      _PAGE_BIT_SOFTW1
  35 #define _PAGE_BIT_SOFT_DIRTY    _PAGE_BIT_SOFTW3 /* software dirty tracking */
  36 #define _PAGE_BIT_DEVMAP        _PAGE_BIT_SOFTW4
  37 
  38 /* If _PAGE_BIT_PRESENT is clear, we use these: */
  39 /* - if the user mapped it with PROT_NONE; pte_present gives true */
  40 #define _PAGE_BIT_PROTNONE      _PAGE_BIT_GLOBAL
  41 
  42 #define _PAGE_PRESENT   (_AT(pteval_t, 1) << _PAGE_BIT_PRESENT)
  43 #define _PAGE_RW        (_AT(pteval_t, 1) << _PAGE_BIT_RW)
  44 #define _PAGE_USER      (_AT(pteval_t, 1) << _PAGE_BIT_USER)
  45 #define _PAGE_PWT       (_AT(pteval_t, 1) << _PAGE_BIT_PWT)
  46 #define _PAGE_PCD       (_AT(pteval_t, 1) << _PAGE_BIT_PCD)
  47 #define _PAGE_ACCESSED  (_AT(pteval_t, 1) << _PAGE_BIT_ACCESSED)
  48 #define _PAGE_DIRTY     (_AT(pteval_t, 1) << _PAGE_BIT_DIRTY)
  49 #define _PAGE_PSE       (_AT(pteval_t, 1) << _PAGE_BIT_PSE)
  50 #define _PAGE_GLOBAL    (_AT(pteval_t, 1) << _PAGE_BIT_GLOBAL)
  51 #define _PAGE_SOFTW1    (_AT(pteval_t, 1) << _PAGE_BIT_SOFTW1)
  52 #define _PAGE_SOFTW2    (_AT(pteval_t, 1) << _PAGE_BIT_SOFTW2)
  53 #define _PAGE_SOFTW3    (_AT(pteval_t, 1) << _PAGE_BIT_SOFTW3)
  54 #define _PAGE_PAT       (_AT(pteval_t, 1) << _PAGE_BIT_PAT)
  55 #define _PAGE_PAT_LARGE (_AT(pteval_t, 1) << _PAGE_BIT_PAT_LARGE)
  56 #define _PAGE_SPECIAL   (_AT(pteval_t, 1) << _PAGE_BIT_SPECIAL)
  57 #define _PAGE_CPA_TEST  (_AT(pteval_t, 1) << _PAGE_BIT_CPA_TEST)
  58 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
  59 #define _PAGE_PKEY_BIT0 (_AT(pteval_t, 1) << _PAGE_BIT_PKEY_BIT0)
  60 #define _PAGE_PKEY_BIT1 (_AT(pteval_t, 1) << _PAGE_BIT_PKEY_BIT1)
  61 #define _PAGE_PKEY_BIT2 (_AT(pteval_t, 1) << _PAGE_BIT_PKEY_BIT2)
  62 #define _PAGE_PKEY_BIT3 (_AT(pteval_t, 1) << _PAGE_BIT_PKEY_BIT3)
  63 #else
  64 #define _PAGE_PKEY_BIT0 (_AT(pteval_t, 0))
  65 #define _PAGE_PKEY_BIT1 (_AT(pteval_t, 0))
  66 #define _PAGE_PKEY_BIT2 (_AT(pteval_t, 0))
  67 #define _PAGE_PKEY_BIT3 (_AT(pteval_t, 0))
  68 #endif
  69 
  70 #define _PAGE_PKEY_MASK (_PAGE_PKEY_BIT0 | \
  71                          _PAGE_PKEY_BIT1 | \
  72                          _PAGE_PKEY_BIT2 | \
  73                          _PAGE_PKEY_BIT3)
  74 
  75 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
  76 #define _PAGE_KNL_ERRATUM_MASK (_PAGE_DIRTY | _PAGE_ACCESSED)
  77 #else
  78 #define _PAGE_KNL_ERRATUM_MASK 0
  79 #endif
  80 
  81 #ifdef CONFIG_MEM_SOFT_DIRTY
  82 #define _PAGE_SOFT_DIRTY        (_AT(pteval_t, 1) << _PAGE_BIT_SOFT_DIRTY)
  83 #else
  84 #define _PAGE_SOFT_DIRTY        (_AT(pteval_t, 0))
  85 #endif
  86 
  87 /*
  88  * Tracking soft dirty bit when a page goes to a swap is tricky.
  89  * We need a bit which can be stored in pte _and_ not conflict
  90  * with swap entry format. On x86 bits 1-4 are *not* involved
  91  * into swap entry computation, but bit 7 is used for thp migration,
  92  * so we borrow bit 1 for soft dirty tracking.
  93  *
  94  * Please note that this bit must be treated as swap dirty page
  95  * mark if and only if the PTE/PMD has present bit clear!
  96  */
  97 #ifdef CONFIG_MEM_SOFT_DIRTY
  98 #define _PAGE_SWP_SOFT_DIRTY    _PAGE_RW
  99 #else
 100 #define _PAGE_SWP_SOFT_DIRTY    (_AT(pteval_t, 0))
 101 #endif
 102 
 103 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
 104 #define _PAGE_NX        (_AT(pteval_t, 1) << _PAGE_BIT_NX)
 105 #define _PAGE_DEVMAP    (_AT(u64, 1) << _PAGE_BIT_DEVMAP)
 106 #else
 107 #define _PAGE_NX        (_AT(pteval_t, 0))
 108 #define _PAGE_DEVMAP    (_AT(pteval_t, 0))
 109 #endif
 110 
 111 #define _PAGE_PROTNONE  (_AT(pteval_t, 1) << _PAGE_BIT_PROTNONE)
 112 
 113 #define _PAGE_TABLE_NOENC       (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER |\
 114                                  _PAGE_ACCESSED | _PAGE_DIRTY)
 115 #define _KERNPG_TABLE_NOENC     (_PAGE_PRESENT | _PAGE_RW |             \
 116                                  _PAGE_ACCESSED | _PAGE_DIRTY)
 117 
 118 /*
 119  * Set of bits not changed in pte_modify.  The pte's
 120  * protection key is treated like _PAGE_RW, for
 121  * instance, and is *not* included in this mask since
 122  * pte_modify() does modify it.
 123  */
 124 #define _PAGE_CHG_MASK  (PTE_PFN_MASK | _PAGE_PCD | _PAGE_PWT |         \
 125                          _PAGE_SPECIAL | _PAGE_ACCESSED | _PAGE_DIRTY | \
 126                          _PAGE_SOFT_DIRTY | _PAGE_DEVMAP | _PAGE_ENC)
 127 #define _HPAGE_CHG_MASK (_PAGE_CHG_MASK | _PAGE_PSE)
 128 
 129 /*
 130  * The cache modes defined here are used to translate between pure SW usage
 131  * and the HW defined cache mode bits and/or PAT entries.
 132  *
 133  * The resulting bits for PWT, PCD and PAT should be chosen in a way
 134  * to have the WB mode at index 0 (all bits clear). This is the default
 135  * right now and likely would break too much if changed.
 136  */
 137 #ifndef __ASSEMBLY__
 138 enum page_cache_mode {
 139         _PAGE_CACHE_MODE_WB = 0,
 140         _PAGE_CACHE_MODE_WC = 1,
 141         _PAGE_CACHE_MODE_UC_MINUS = 2,
 142         _PAGE_CACHE_MODE_UC = 3,
 143         _PAGE_CACHE_MODE_WT = 4,
 144         _PAGE_CACHE_MODE_WP = 5,
 145         _PAGE_CACHE_MODE_NUM = 8
 146 };
 147 #endif
 148 
 149 #define _PAGE_CACHE_MASK        (_PAGE_PAT | _PAGE_PCD | _PAGE_PWT)
 150 #define _PAGE_NOCACHE           (cachemode2protval(_PAGE_CACHE_MODE_UC))
 151 #define _PAGE_CACHE_WP          (cachemode2protval(_PAGE_CACHE_MODE_WP))
 152 
 153 #define PAGE_NONE       __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
 154 #define PAGE_SHARED     __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \
 155                                  _PAGE_ACCESSED | _PAGE_NX)
 156 
 157 #define PAGE_SHARED_EXEC        __pgprot(_PAGE_PRESENT | _PAGE_RW |     \
 158                                          _PAGE_USER | _PAGE_ACCESSED)
 159 #define PAGE_COPY_NOEXEC        __pgprot(_PAGE_PRESENT | _PAGE_USER |   \
 160                                          _PAGE_ACCESSED | _PAGE_NX)
 161 #define PAGE_COPY_EXEC          __pgprot(_PAGE_PRESENT | _PAGE_USER |   \
 162                                          _PAGE_ACCESSED)
 163 #define PAGE_COPY               PAGE_COPY_NOEXEC
 164 #define PAGE_READONLY           __pgprot(_PAGE_PRESENT | _PAGE_USER |   \
 165                                          _PAGE_ACCESSED | _PAGE_NX)
 166 #define PAGE_READONLY_EXEC      __pgprot(_PAGE_PRESENT | _PAGE_USER |   \
 167                                          _PAGE_ACCESSED)
 168 
 169 #define __PAGE_KERNEL_EXEC                                              \
 170         (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_GLOBAL)
 171 #define __PAGE_KERNEL           (__PAGE_KERNEL_EXEC | _PAGE_NX)
 172 
 173 #define __PAGE_KERNEL_RO                (__PAGE_KERNEL & ~_PAGE_RW)
 174 #define __PAGE_KERNEL_RX                (__PAGE_KERNEL_EXEC & ~_PAGE_RW)
 175 #define __PAGE_KERNEL_NOCACHE           (__PAGE_KERNEL | _PAGE_NOCACHE)
 176 #define __PAGE_KERNEL_VVAR              (__PAGE_KERNEL_RO | _PAGE_USER)
 177 #define __PAGE_KERNEL_LARGE             (__PAGE_KERNEL | _PAGE_PSE)
 178 #define __PAGE_KERNEL_LARGE_EXEC        (__PAGE_KERNEL_EXEC | _PAGE_PSE)
 179 #define __PAGE_KERNEL_WP                (__PAGE_KERNEL | _PAGE_CACHE_WP)
 180 
 181 #define __PAGE_KERNEL_IO                (__PAGE_KERNEL)
 182 #define __PAGE_KERNEL_IO_NOCACHE        (__PAGE_KERNEL_NOCACHE)
 183 
 184 #ifndef __ASSEMBLY__
 185 
 186 #define _PAGE_ENC       (_AT(pteval_t, sme_me_mask))
 187 
 188 #define _KERNPG_TABLE   (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED |    \
 189                          _PAGE_DIRTY | _PAGE_ENC)
 190 #define _PAGE_TABLE     (_KERNPG_TABLE | _PAGE_USER)
 191 
 192 #define __PAGE_KERNEL_ENC       (__PAGE_KERNEL | _PAGE_ENC)
 193 #define __PAGE_KERNEL_ENC_WP    (__PAGE_KERNEL_WP | _PAGE_ENC)
 194 
 195 #define __PAGE_KERNEL_NOENC     (__PAGE_KERNEL)
 196 #define __PAGE_KERNEL_NOENC_WP  (__PAGE_KERNEL_WP)
 197 
 198 #define default_pgprot(x)       __pgprot((x) & __default_kernel_pte_mask)
 199 
 200 #define PAGE_KERNEL             default_pgprot(__PAGE_KERNEL | _PAGE_ENC)
 201 #define PAGE_KERNEL_NOENC       default_pgprot(__PAGE_KERNEL)
 202 #define PAGE_KERNEL_RO          default_pgprot(__PAGE_KERNEL_RO | _PAGE_ENC)
 203 #define PAGE_KERNEL_EXEC        default_pgprot(__PAGE_KERNEL_EXEC | _PAGE_ENC)
 204 #define PAGE_KERNEL_EXEC_NOENC  default_pgprot(__PAGE_KERNEL_EXEC)
 205 #define PAGE_KERNEL_RX          default_pgprot(__PAGE_KERNEL_RX | _PAGE_ENC)
 206 #define PAGE_KERNEL_NOCACHE     default_pgprot(__PAGE_KERNEL_NOCACHE | _PAGE_ENC)
 207 #define PAGE_KERNEL_LARGE       default_pgprot(__PAGE_KERNEL_LARGE | _PAGE_ENC)
 208 #define PAGE_KERNEL_LARGE_EXEC  default_pgprot(__PAGE_KERNEL_LARGE_EXEC | _PAGE_ENC)
 209 #define PAGE_KERNEL_VVAR        default_pgprot(__PAGE_KERNEL_VVAR | _PAGE_ENC)
 210 
 211 #define PAGE_KERNEL_IO          default_pgprot(__PAGE_KERNEL_IO)
 212 #define PAGE_KERNEL_IO_NOCACHE  default_pgprot(__PAGE_KERNEL_IO_NOCACHE)
 213 
 214 #endif  /* __ASSEMBLY__ */
 215 
 216 /*         xwr */
 217 #define __P000  PAGE_NONE
 218 #define __P001  PAGE_READONLY
 219 #define __P010  PAGE_COPY
 220 #define __P011  PAGE_COPY
 221 #define __P100  PAGE_READONLY_EXEC
 222 #define __P101  PAGE_READONLY_EXEC
 223 #define __P110  PAGE_COPY_EXEC
 224 #define __P111  PAGE_COPY_EXEC
 225 
 226 #define __S000  PAGE_NONE
 227 #define __S001  PAGE_READONLY
 228 #define __S010  PAGE_SHARED
 229 #define __S011  PAGE_SHARED
 230 #define __S100  PAGE_READONLY_EXEC
 231 #define __S101  PAGE_READONLY_EXEC
 232 #define __S110  PAGE_SHARED_EXEC
 233 #define __S111  PAGE_SHARED_EXEC
 234 
 235 /*
 236  * early identity mapping  pte attrib macros.
 237  */
 238 #ifdef CONFIG_X86_64
 239 #define __PAGE_KERNEL_IDENT_LARGE_EXEC  __PAGE_KERNEL_LARGE_EXEC
 240 #else
 241 #define PTE_IDENT_ATTR   0x003          /* PRESENT+RW */
 242 #define PDE_IDENT_ATTR   0x063          /* PRESENT+RW+DIRTY+ACCESSED */
 243 #define PGD_IDENT_ATTR   0x001          /* PRESENT (no other attributes) */
 244 #endif
 245 
 246 #ifdef CONFIG_X86_32
 247 # include <asm/pgtable_32_types.h>
 248 #else
 249 # include <asm/pgtable_64_types.h>
 250 #endif
 251 
 252 #ifndef __ASSEMBLY__
 253 
 254 #include <linux/types.h>
 255 
 256 /* Extracts the PFN from a (pte|pmd|pud|pgd)val_t of a 4KB page */
 257 #define PTE_PFN_MASK            ((pteval_t)PHYSICAL_PAGE_MASK)
 258 
 259 /*
 260  *  Extracts the flags from a (pte|pmd|pud|pgd)val_t
 261  *  This includes the protection key value.
 262  */
 263 #define PTE_FLAGS_MASK          (~PTE_PFN_MASK)
 264 
 265 typedef struct pgprot { pgprotval_t pgprot; } pgprot_t;
 266 
 267 typedef struct { pgdval_t pgd; } pgd_t;
 268 
 269 #ifdef CONFIG_X86_PAE
 270 
 271 /*
 272  * PHYSICAL_PAGE_MASK might be non-constant when SME is compiled in, so we can't
 273  * use it here.
 274  */
 275 
 276 #define PGD_PAE_PAGE_MASK       ((signed long)PAGE_MASK)
 277 #define PGD_PAE_PHYS_MASK       (((1ULL << __PHYSICAL_MASK_SHIFT)-1) & PGD_PAE_PAGE_MASK)
 278 
 279 /*
 280  * PAE allows Base Address, P, PWT, PCD and AVL bits to be set in PGD entries.
 281  * All other bits are Reserved MBZ
 282  */
 283 #define PGD_ALLOWED_BITS        (PGD_PAE_PHYS_MASK | _PAGE_PRESENT | \
 284                                  _PAGE_PWT | _PAGE_PCD | \
 285                                  _PAGE_SOFTW1 | _PAGE_SOFTW2 | _PAGE_SOFTW3)
 286 
 287 #else
 288 /* No need to mask any bits for !PAE */
 289 #define PGD_ALLOWED_BITS        (~0ULL)
 290 #endif
 291 
 292 static inline pgd_t native_make_pgd(pgdval_t val)
 293 {
 294         return (pgd_t) { val & PGD_ALLOWED_BITS };
 295 }
 296 
 297 static inline pgdval_t native_pgd_val(pgd_t pgd)
 298 {
 299         return pgd.pgd & PGD_ALLOWED_BITS;
 300 }
 301 
 302 static inline pgdval_t pgd_flags(pgd_t pgd)
 303 {
 304         return native_pgd_val(pgd) & PTE_FLAGS_MASK;
 305 }
 306 
 307 #if CONFIG_PGTABLE_LEVELS > 4
 308 typedef struct { p4dval_t p4d; } p4d_t;
 309 
 310 static inline p4d_t native_make_p4d(pudval_t val)
 311 {
 312         return (p4d_t) { val };
 313 }
 314 
 315 static inline p4dval_t native_p4d_val(p4d_t p4d)
 316 {
 317         return p4d.p4d;
 318 }
 319 #else
 320 #include <asm-generic/pgtable-nop4d.h>
 321 
 322 static inline p4d_t native_make_p4d(pudval_t val)
 323 {
 324         return (p4d_t) { .pgd = native_make_pgd((pgdval_t)val) };
 325 }
 326 
 327 static inline p4dval_t native_p4d_val(p4d_t p4d)
 328 {
 329         return native_pgd_val(p4d.pgd);
 330 }
 331 #endif
 332 
 333 #if CONFIG_PGTABLE_LEVELS > 3
 334 typedef struct { pudval_t pud; } pud_t;
 335 
 336 static inline pud_t native_make_pud(pmdval_t val)
 337 {
 338         return (pud_t) { val };
 339 }
 340 
 341 static inline pudval_t native_pud_val(pud_t pud)
 342 {
 343         return pud.pud;
 344 }
 345 #else
 346 #include <asm-generic/pgtable-nopud.h>
 347 
 348 static inline pud_t native_make_pud(pudval_t val)
 349 {
 350         return (pud_t) { .p4d.pgd = native_make_pgd(val) };
 351 }
 352 
 353 static inline pudval_t native_pud_val(pud_t pud)
 354 {
 355         return native_pgd_val(pud.p4d.pgd);
 356 }
 357 #endif
 358 
 359 #if CONFIG_PGTABLE_LEVELS > 2
 360 typedef struct { pmdval_t pmd; } pmd_t;
 361 
 362 static inline pmd_t native_make_pmd(pmdval_t val)
 363 {
 364         return (pmd_t) { val };
 365 }
 366 
 367 static inline pmdval_t native_pmd_val(pmd_t pmd)
 368 {
 369         return pmd.pmd;
 370 }
 371 #else
 372 #include <asm-generic/pgtable-nopmd.h>
 373 
 374 static inline pmd_t native_make_pmd(pmdval_t val)
 375 {
 376         return (pmd_t) { .pud.p4d.pgd = native_make_pgd(val) };
 377 }
 378 
 379 static inline pmdval_t native_pmd_val(pmd_t pmd)
 380 {
 381         return native_pgd_val(pmd.pud.p4d.pgd);
 382 }
 383 #endif
 384 
 385 static inline p4dval_t p4d_pfn_mask(p4d_t p4d)
 386 {
 387         /* No 512 GiB huge pages yet */
 388         return PTE_PFN_MASK;
 389 }
 390 
 391 static inline p4dval_t p4d_flags_mask(p4d_t p4d)
 392 {
 393         return ~p4d_pfn_mask(p4d);
 394 }
 395 
 396 static inline p4dval_t p4d_flags(p4d_t p4d)
 397 {
 398         return native_p4d_val(p4d) & p4d_flags_mask(p4d);
 399 }
 400 
 401 static inline pudval_t pud_pfn_mask(pud_t pud)
 402 {
 403         if (native_pud_val(pud) & _PAGE_PSE)
 404                 return PHYSICAL_PUD_PAGE_MASK;
 405         else
 406                 return PTE_PFN_MASK;
 407 }
 408 
 409 static inline pudval_t pud_flags_mask(pud_t pud)
 410 {
 411         return ~pud_pfn_mask(pud);
 412 }
 413 
 414 static inline pudval_t pud_flags(pud_t pud)
 415 {
 416         return native_pud_val(pud) & pud_flags_mask(pud);
 417 }
 418 
 419 static inline pmdval_t pmd_pfn_mask(pmd_t pmd)
 420 {
 421         if (native_pmd_val(pmd) & _PAGE_PSE)
 422                 return PHYSICAL_PMD_PAGE_MASK;
 423         else
 424                 return PTE_PFN_MASK;
 425 }
 426 
 427 static inline pmdval_t pmd_flags_mask(pmd_t pmd)
 428 {
 429         return ~pmd_pfn_mask(pmd);
 430 }
 431 
 432 static inline pmdval_t pmd_flags(pmd_t pmd)
 433 {
 434         return native_pmd_val(pmd) & pmd_flags_mask(pmd);
 435 }
 436 
 437 static inline pte_t native_make_pte(pteval_t val)
 438 {
 439         return (pte_t) { .pte = val };
 440 }
 441 
 442 static inline pteval_t native_pte_val(pte_t pte)
 443 {
 444         return pte.pte;
 445 }
 446 
 447 static inline pteval_t pte_flags(pte_t pte)
 448 {
 449         return native_pte_val(pte) & PTE_FLAGS_MASK;
 450 }
 451 
 452 #define pgprot_val(x)   ((x).pgprot)
 453 #define __pgprot(x)     ((pgprot_t) { (x) } )
 454 
 455 extern uint16_t __cachemode2pte_tbl[_PAGE_CACHE_MODE_NUM];
 456 extern uint8_t __pte2cachemode_tbl[8];
 457 
 458 #define __pte2cm_idx(cb)                                \
 459         ((((cb) >> (_PAGE_BIT_PAT - 2)) & 4) |          \
 460          (((cb) >> (_PAGE_BIT_PCD - 1)) & 2) |          \
 461          (((cb) >> _PAGE_BIT_PWT) & 1))
 462 #define __cm_idx2pte(i)                                 \
 463         ((((i) & 4) << (_PAGE_BIT_PAT - 2)) |           \
 464          (((i) & 2) << (_PAGE_BIT_PCD - 1)) |           \
 465          (((i) & 1) << _PAGE_BIT_PWT))
 466 
 467 static inline unsigned long cachemode2protval(enum page_cache_mode pcm)
 468 {
 469         if (likely(pcm == 0))
 470                 return 0;
 471         return __cachemode2pte_tbl[pcm];
 472 }
 473 static inline pgprot_t cachemode2pgprot(enum page_cache_mode pcm)
 474 {
 475         return __pgprot(cachemode2protval(pcm));
 476 }
 477 static inline enum page_cache_mode pgprot2cachemode(pgprot_t pgprot)
 478 {
 479         unsigned long masked;
 480 
 481         masked = pgprot_val(pgprot) & _PAGE_CACHE_MASK;
 482         if (likely(masked == 0))
 483                 return 0;
 484         return __pte2cachemode_tbl[__pte2cm_idx(masked)];
 485 }
 486 static inline pgprot_t pgprot_4k_2_large(pgprot_t pgprot)
 487 {
 488         pgprotval_t val = pgprot_val(pgprot);
 489         pgprot_t new;
 490 
 491         pgprot_val(new) = (val & ~(_PAGE_PAT | _PAGE_PAT_LARGE)) |
 492                 ((val & _PAGE_PAT) << (_PAGE_BIT_PAT_LARGE - _PAGE_BIT_PAT));
 493         return new;
 494 }
 495 static inline pgprot_t pgprot_large_2_4k(pgprot_t pgprot)
 496 {
 497         pgprotval_t val = pgprot_val(pgprot);
 498         pgprot_t new;
 499 
 500         pgprot_val(new) = (val & ~(_PAGE_PAT | _PAGE_PAT_LARGE)) |
 501                           ((val & _PAGE_PAT_LARGE) >>
 502                            (_PAGE_BIT_PAT_LARGE - _PAGE_BIT_PAT));
 503         return new;
 504 }
 505 
 506 
 507 typedef struct page *pgtable_t;
 508 
 509 extern pteval_t __supported_pte_mask;
 510 extern pteval_t __default_kernel_pte_mask;
 511 extern void set_nx(void);
 512 extern int nx_enabled;
 513 
 514 #define pgprot_writecombine     pgprot_writecombine
 515 extern pgprot_t pgprot_writecombine(pgprot_t prot);
 516 
 517 #define pgprot_writethrough     pgprot_writethrough
 518 extern pgprot_t pgprot_writethrough(pgprot_t prot);
 519 
 520 /* Indicate that x86 has its own track and untrack pfn vma functions */
 521 #define __HAVE_PFNMAP_TRACKING
 522 
 523 #define __HAVE_PHYS_MEM_ACCESS_PROT
 524 struct file;
 525 pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
 526                               unsigned long size, pgprot_t vma_prot);
 527 
 528 /* Install a pte for a particular vaddr in kernel space. */
 529 void set_pte_vaddr(unsigned long vaddr, pte_t pte);
 530 
 531 #ifdef CONFIG_X86_32
 532 extern void native_pagetable_init(void);
 533 #else
 534 #define native_pagetable_init        paging_init
 535 #endif
 536 
 537 struct seq_file;
 538 extern void arch_report_meminfo(struct seq_file *m);
 539 
 540 enum pg_level {
 541         PG_LEVEL_NONE,
 542         PG_LEVEL_4K,
 543         PG_LEVEL_2M,
 544         PG_LEVEL_1G,
 545         PG_LEVEL_512G,
 546         PG_LEVEL_NUM
 547 };
 548 
 549 #ifdef CONFIG_PROC_FS
 550 extern void update_page_count(int level, unsigned long pages);
 551 #else
 552 static inline void update_page_count(int level, unsigned long pages) { }
 553 #endif
 554 
 555 /*
 556  * Helper function that returns the kernel pagetable entry controlling
 557  * the virtual address 'address'. NULL means no pagetable entry present.
 558  * NOTE: the return type is pte_t but if the pmd is PSE then we return it
 559  * as a pte too.
 560  */
 561 extern pte_t *lookup_address(unsigned long address, unsigned int *level);
 562 extern pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address,
 563                                     unsigned int *level);
 564 extern pmd_t *lookup_pmd_address(unsigned long address);
 565 extern phys_addr_t slow_virt_to_phys(void *__address);
 566 extern int __init kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn,
 567                                           unsigned long address,
 568                                           unsigned numpages,
 569                                           unsigned long page_flags);
 570 extern int __init kernel_unmap_pages_in_pgd(pgd_t *pgd, unsigned long address,
 571                                             unsigned long numpages);
 572 #endif  /* !__ASSEMBLY__ */
 573 
 574 #endif /* _ASM_X86_PGTABLE_DEFS_H */
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root/arch/x86/include/asm/pgtable_types.h

INCLUDED FROM

DEFINITIONS
