arch/x86/include/asm/pgtable.h

/* [<][>][^][v][top][bottom][index][help] */
This source file includes following definitions.
pte_dirty
read_pkru
write_pkru
pte_young
pmd_dirty
pmd_young
pud_dirty
pud_young
pte_write
pte_huge
pte_global
pte_exec
pte_special
pte_pfn
pmd_pfn
pud_pfn
p4d_pfn
pgd_pfn
p4d_large
pmd_large
pmd_trans_huge
pud_trans_huge
has_transparent_hugepage
pmd_devmap
pud_devmap
pud_devmap
pgd_devmap
pte_set_flags
pte_clear_flags
pte_mkclean
pte_mkold
pte_wrprotect
pte_mkexec
pte_mkdirty
pte_mkyoung
pte_mkwrite
pte_mkhuge
pte_clrhuge
pte_mkglobal
pte_clrglobal
pte_mkspecial
pte_mkdevmap
pmd_set_flags
pmd_clear_flags
pmd_mkold
pmd_mkclean
pmd_wrprotect
pmd_mkdirty
pmd_mkdevmap
pmd_mkhuge
pmd_mkyoung
pmd_mkwrite
pud_set_flags
pud_clear_flags
pud_mkold
pud_mkclean
pud_wrprotect
pud_mkdirty
pud_mkdevmap
pud_mkhuge
pud_mkyoung
pud_mkwrite
pte_soft_dirty
pmd_soft_dirty
pud_soft_dirty
pte_mksoft_dirty
pmd_mksoft_dirty
pud_mksoft_dirty
pte_clear_soft_dirty
pmd_clear_soft_dirty
pud_clear_soft_dirty
massage_pgprot
check_pgprot
pfn_pte
pfn_pmd
pfn_pud
pmd_mknotpresent
pud_mknotpresent
pte_modify
pmd_modify
pgprot_modify
arch_filter_pgprot
is_new_memtype_allowed
pti_set_user_pgtbl
pti_set_user_pgtbl
pte_none
pte_same
pte_present
pte_devmap
pte_accessible
pmd_present
pte_protnone
pmd_protnone
pmd_none
pmd_page_vaddr
pmd_index
pte_index
pte_offset_kernel
pmd_bad
pages_to_mb
pud_none
pud_present
pud_page_vaddr
pmd_offset
pud_large
pud_bad
pud_large
pud_index
p4d_none
p4d_present
p4d_page_vaddr
pud_offset
p4d_bad
p4d_index
pgd_present
pgd_page_vaddr
p4d_offset
pgd_bad
pgd_none
init_trampoline_default
init_trampoline
native_local_ptep_get_and_clear
native_local_pmdp_get_and_clear
native_local_pudp_get_and_clear
native_set_pte_at
set_pmd_at
set_pud_at
ptep_get_and_clear
ptep_get_and_clear_full
ptep_set_wrprotect
pmd_write
pmdp_huge_get_and_clear
pudp_huge_get_and_clear
pmdp_set_wrprotect
pud_write
pmdp_establish
pgdp_maps_userspace
pgd_large
ptr_set_bit
ptr_clear_bit
kernel_to_user_pgdp
user_to_kernel_pgdp
kernel_to_user_p4dp
user_to_kernel_p4dp
clone_pgd_range
page_level_shift
page_level_size
page_level_mask
update_mmu_cache
update_mmu_cache_pmd
update_mmu_cache_pud
pte_swp_mksoft_dirty
pte_swp_soft_dirty
pte_swp_clear_soft_dirty
pmd_swp_mksoft_dirty
pmd_swp_soft_dirty
pmd_swp_clear_soft_dirty
__pkru_allows_read
__pkru_allows_write
pte_flags_pkey
__pkru_allows_pkey
__pte_access_permitted
pte_access_permitted
pmd_access_permitted
pud_access_permitted
arch_has_pfn_modify_check
   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef _ASM_X86_PGTABLE_H
   3 #define _ASM_X86_PGTABLE_H
   4 
   5 #include <linux/mem_encrypt.h>
   6 #include <asm/page.h>
   7 #include <asm/pgtable_types.h>
   8 
   9 /*
  10  * Macro to mark a page protection value as UC-
  11  */
  12 #define pgprot_noncached(prot)                                          \
  13         ((boot_cpu_data.x86 > 3)                                        \
  14          ? (__pgprot(pgprot_val(prot) |                                 \
  15                      cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS)))     \
  16          : (prot))
  17 
  18 /*
  19  * Macros to add or remove encryption attribute
  20  */
  21 #define pgprot_encrypted(prot)  __pgprot(__sme_set(pgprot_val(prot)))
  22 #define pgprot_decrypted(prot)  __pgprot(__sme_clr(pgprot_val(prot)))
  23 
  24 #ifndef __ASSEMBLY__
  25 #include <asm/x86_init.h>
  26 #include <asm/fpu/xstate.h>
  27 #include <asm/fpu/api.h>
  28 
  29 extern pgd_t early_top_pgt[PTRS_PER_PGD];
  30 int __init __early_make_pgtable(unsigned long address, pmdval_t pmd);
  31 
  32 void ptdump_walk_pgd_level(struct seq_file *m, pgd_t *pgd);
  33 void ptdump_walk_pgd_level_debugfs(struct seq_file *m, pgd_t *pgd, bool user);
  34 void ptdump_walk_pgd_level_checkwx(void);
  35 void ptdump_walk_user_pgd_level_checkwx(void);
  36 
  37 #ifdef CONFIG_DEBUG_WX
  38 #define debug_checkwx()         ptdump_walk_pgd_level_checkwx()
  39 #define debug_checkwx_user()    ptdump_walk_user_pgd_level_checkwx()
  40 #else
  41 #define debug_checkwx()         do { } while (0)
  42 #define debug_checkwx_user()    do { } while (0)
  43 #endif
  44 
  45 /*
  46  * ZERO_PAGE is a global shared page that is always zero: used
  47  * for zero-mapped memory areas etc..
  48  */
  49 extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]
  50         __visible;
  51 #define ZERO_PAGE(vaddr) ((void)(vaddr),virt_to_page(empty_zero_page))
  52 
  53 extern spinlock_t pgd_lock;
  54 extern struct list_head pgd_list;
  55 
  56 extern struct mm_struct *pgd_page_get_mm(struct page *page);
  57 
  58 extern pmdval_t early_pmd_flags;
  59 
  60 #ifdef CONFIG_PARAVIRT_XXL
  61 #include <asm/paravirt.h>
  62 #else  /* !CONFIG_PARAVIRT_XXL */
  63 #define set_pte(ptep, pte)              native_set_pte(ptep, pte)
  64 #define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte)
  65 
  66 #define set_pte_atomic(ptep, pte)                                       \
  67         native_set_pte_atomic(ptep, pte)
  68 
  69 #define set_pmd(pmdp, pmd)              native_set_pmd(pmdp, pmd)
  70 
  71 #ifndef __PAGETABLE_P4D_FOLDED
  72 #define set_pgd(pgdp, pgd)              native_set_pgd(pgdp, pgd)
  73 #define pgd_clear(pgd)                  (pgtable_l5_enabled() ? native_pgd_clear(pgd) : 0)
  74 #endif
  75 
  76 #ifndef set_p4d
  77 # define set_p4d(p4dp, p4d)             native_set_p4d(p4dp, p4d)
  78 #endif
  79 
  80 #ifndef __PAGETABLE_PUD_FOLDED
  81 #define p4d_clear(p4d)                  native_p4d_clear(p4d)
  82 #endif
  83 
  84 #ifndef set_pud
  85 # define set_pud(pudp, pud)             native_set_pud(pudp, pud)
  86 #endif
  87 
  88 #ifndef __PAGETABLE_PUD_FOLDED
  89 #define pud_clear(pud)                  native_pud_clear(pud)
  90 #endif
  91 
  92 #define pte_clear(mm, addr, ptep)       native_pte_clear(mm, addr, ptep)
  93 #define pmd_clear(pmd)                  native_pmd_clear(pmd)
  94 
  95 #define pgd_val(x)      native_pgd_val(x)
  96 #define __pgd(x)        native_make_pgd(x)
  97 
  98 #ifndef __PAGETABLE_P4D_FOLDED
  99 #define p4d_val(x)      native_p4d_val(x)
 100 #define __p4d(x)        native_make_p4d(x)
 101 #endif
 102 
 103 #ifndef __PAGETABLE_PUD_FOLDED
 104 #define pud_val(x)      native_pud_val(x)
 105 #define __pud(x)        native_make_pud(x)
 106 #endif
 107 
 108 #ifndef __PAGETABLE_PMD_FOLDED
 109 #define pmd_val(x)      native_pmd_val(x)
 110 #define __pmd(x)        native_make_pmd(x)
 111 #endif
 112 
 113 #define pte_val(x)      native_pte_val(x)
 114 #define __pte(x)        native_make_pte(x)
 115 
 116 #define arch_end_context_switch(prev)   do {} while(0)
 117 #endif  /* CONFIG_PARAVIRT_XXL */
 118 
 119 /*
 120  * The following only work if pte_present() is true.
 121  * Undefined behaviour if not..
 122  */
 123 static inline int pte_dirty(pte_t pte)
 124 {
 125         return pte_flags(pte) & _PAGE_DIRTY;
 126 }
 127 
 128 
 129 static inline u32 read_pkru(void)
 130 {
 131         if (boot_cpu_has(X86_FEATURE_OSPKE))
 132                 return rdpkru();
 133         return 0;
 134 }
 135 
 136 static inline void write_pkru(u32 pkru)
 137 {
 138         struct pkru_state *pk;
 139 
 140         if (!boot_cpu_has(X86_FEATURE_OSPKE))
 141                 return;
 142 
 143         pk = get_xsave_addr(&current->thread.fpu.state.xsave, XFEATURE_PKRU);
 144 
 145         /*
 146          * The PKRU value in xstate needs to be in sync with the value that is
 147          * written to the CPU. The FPU restore on return to userland would
 148          * otherwise load the previous value again.
 149          */
 150         fpregs_lock();
 151         if (pk)
 152                 pk->pkru = pkru;
 153         __write_pkru(pkru);
 154         fpregs_unlock();
 155 }
 156 
 157 static inline int pte_young(pte_t pte)
 158 {
 159         return pte_flags(pte) & _PAGE_ACCESSED;
 160 }
 161 
 162 static inline int pmd_dirty(pmd_t pmd)
 163 {
 164         return pmd_flags(pmd) & _PAGE_DIRTY;
 165 }
 166 
 167 static inline int pmd_young(pmd_t pmd)
 168 {
 169         return pmd_flags(pmd) & _PAGE_ACCESSED;
 170 }
 171 
 172 static inline int pud_dirty(pud_t pud)
 173 {
 174         return pud_flags(pud) & _PAGE_DIRTY;
 175 }
 176 
 177 static inline int pud_young(pud_t pud)
 178 {
 179         return pud_flags(pud) & _PAGE_ACCESSED;
 180 }
 181 
 182 static inline int pte_write(pte_t pte)
 183 {
 184         return pte_flags(pte) & _PAGE_RW;
 185 }
 186 
 187 static inline int pte_huge(pte_t pte)
 188 {
 189         return pte_flags(pte) & _PAGE_PSE;
 190 }
 191 
 192 static inline int pte_global(pte_t pte)
 193 {
 194         return pte_flags(pte) & _PAGE_GLOBAL;
 195 }
 196 
 197 static inline int pte_exec(pte_t pte)
 198 {
 199         return !(pte_flags(pte) & _PAGE_NX);
 200 }
 201 
 202 static inline int pte_special(pte_t pte)
 203 {
 204         return pte_flags(pte) & _PAGE_SPECIAL;
 205 }
 206 
 207 /* Entries that were set to PROT_NONE are inverted */
 208 
 209 static inline u64 protnone_mask(u64 val);
 210 
 211 static inline unsigned long pte_pfn(pte_t pte)
 212 {
 213         phys_addr_t pfn = pte_val(pte);
 214         pfn ^= protnone_mask(pfn);
 215         return (pfn & PTE_PFN_MASK) >> PAGE_SHIFT;
 216 }
 217 
 218 static inline unsigned long pmd_pfn(pmd_t pmd)
 219 {
 220         phys_addr_t pfn = pmd_val(pmd);
 221         pfn ^= protnone_mask(pfn);
 222         return (pfn & pmd_pfn_mask(pmd)) >> PAGE_SHIFT;
 223 }
 224 
 225 static inline unsigned long pud_pfn(pud_t pud)
 226 {
 227         phys_addr_t pfn = pud_val(pud);
 228         pfn ^= protnone_mask(pfn);
 229         return (pfn & pud_pfn_mask(pud)) >> PAGE_SHIFT;
 230 }
 231 
 232 static inline unsigned long p4d_pfn(p4d_t p4d)
 233 {
 234         return (p4d_val(p4d) & p4d_pfn_mask(p4d)) >> PAGE_SHIFT;
 235 }
 236 
 237 static inline unsigned long pgd_pfn(pgd_t pgd)
 238 {
 239         return (pgd_val(pgd) & PTE_PFN_MASK) >> PAGE_SHIFT;
 240 }
 241 
 242 static inline int p4d_large(p4d_t p4d)
 243 {
 244         /* No 512 GiB pages yet */
 245         return 0;
 246 }
 247 
 248 #define pte_page(pte)   pfn_to_page(pte_pfn(pte))
 249 
 250 static inline int pmd_large(pmd_t pte)
 251 {
 252         return pmd_flags(pte) & _PAGE_PSE;
 253 }
 254 
 255 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
 256 /* NOTE: when predicate huge page, consider also pmd_devmap, or use pmd_large */
 257 static inline int pmd_trans_huge(pmd_t pmd)
 258 {
 259         return (pmd_val(pmd) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE;
 260 }
 261 
 262 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD
 263 static inline int pud_trans_huge(pud_t pud)
 264 {
 265         return (pud_val(pud) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE;
 266 }
 267 #endif
 268 
 269 #define has_transparent_hugepage has_transparent_hugepage
 270 static inline int has_transparent_hugepage(void)
 271 {
 272         return boot_cpu_has(X86_FEATURE_PSE);
 273 }
 274 
 275 #ifdef CONFIG_ARCH_HAS_PTE_DEVMAP
 276 static inline int pmd_devmap(pmd_t pmd)
 277 {
 278         return !!(pmd_val(pmd) & _PAGE_DEVMAP);
 279 }
 280 
 281 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD
 282 static inline int pud_devmap(pud_t pud)
 283 {
 284         return !!(pud_val(pud) & _PAGE_DEVMAP);
 285 }
 286 #else
 287 static inline int pud_devmap(pud_t pud)
 288 {
 289         return 0;
 290 }
 291 #endif
 292 
 293 static inline int pgd_devmap(pgd_t pgd)
 294 {
 295         return 0;
 296 }
 297 #endif
 298 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
 299 
 300 static inline pte_t pte_set_flags(pte_t pte, pteval_t set)
 301 {
 302         pteval_t v = native_pte_val(pte);
 303 
 304         return native_make_pte(v | set);
 305 }
 306 
 307 static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear)
 308 {
 309         pteval_t v = native_pte_val(pte);
 310 
 311         return native_make_pte(v & ~clear);
 312 }
 313 
 314 static inline pte_t pte_mkclean(pte_t pte)
 315 {
 316         return pte_clear_flags(pte, _PAGE_DIRTY);
 317 }
 318 
 319 static inline pte_t pte_mkold(pte_t pte)
 320 {
 321         return pte_clear_flags(pte, _PAGE_ACCESSED);
 322 }
 323 
 324 static inline pte_t pte_wrprotect(pte_t pte)
 325 {
 326         return pte_clear_flags(pte, _PAGE_RW);
 327 }
 328 
 329 static inline pte_t pte_mkexec(pte_t pte)
 330 {
 331         return pte_clear_flags(pte, _PAGE_NX);
 332 }
 333 
 334 static inline pte_t pte_mkdirty(pte_t pte)
 335 {
 336         return pte_set_flags(pte, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
 337 }
 338 
 339 static inline pte_t pte_mkyoung(pte_t pte)
 340 {
 341         return pte_set_flags(pte, _PAGE_ACCESSED);
 342 }
 343 
 344 static inline pte_t pte_mkwrite(pte_t pte)
 345 {
 346         return pte_set_flags(pte, _PAGE_RW);
 347 }
 348 
 349 static inline pte_t pte_mkhuge(pte_t pte)
 350 {
 351         return pte_set_flags(pte, _PAGE_PSE);
 352 }
 353 
 354 static inline pte_t pte_clrhuge(pte_t pte)
 355 {
 356         return pte_clear_flags(pte, _PAGE_PSE);
 357 }
 358 
 359 static inline pte_t pte_mkglobal(pte_t pte)
 360 {
 361         return pte_set_flags(pte, _PAGE_GLOBAL);
 362 }
 363 
 364 static inline pte_t pte_clrglobal(pte_t pte)
 365 {
 366         return pte_clear_flags(pte, _PAGE_GLOBAL);
 367 }
 368 
 369 static inline pte_t pte_mkspecial(pte_t pte)
 370 {
 371         return pte_set_flags(pte, _PAGE_SPECIAL);
 372 }
 373 
 374 static inline pte_t pte_mkdevmap(pte_t pte)
 375 {
 376         return pte_set_flags(pte, _PAGE_SPECIAL|_PAGE_DEVMAP);
 377 }
 378 
 379 static inline pmd_t pmd_set_flags(pmd_t pmd, pmdval_t set)
 380 {
 381         pmdval_t v = native_pmd_val(pmd);
 382 
 383         return native_make_pmd(v | set);
 384 }
 385 
 386 static inline pmd_t pmd_clear_flags(pmd_t pmd, pmdval_t clear)
 387 {
 388         pmdval_t v = native_pmd_val(pmd);
 389 
 390         return native_make_pmd(v & ~clear);
 391 }
 392 
 393 static inline pmd_t pmd_mkold(pmd_t pmd)
 394 {
 395         return pmd_clear_flags(pmd, _PAGE_ACCESSED);
 396 }
 397 
 398 static inline pmd_t pmd_mkclean(pmd_t pmd)
 399 {
 400         return pmd_clear_flags(pmd, _PAGE_DIRTY);
 401 }
 402 
 403 static inline pmd_t pmd_wrprotect(pmd_t pmd)
 404 {
 405         return pmd_clear_flags(pmd, _PAGE_RW);
 406 }
 407 
 408 static inline pmd_t pmd_mkdirty(pmd_t pmd)
 409 {
 410         return pmd_set_flags(pmd, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
 411 }
 412 
 413 static inline pmd_t pmd_mkdevmap(pmd_t pmd)
 414 {
 415         return pmd_set_flags(pmd, _PAGE_DEVMAP);
 416 }
 417 
 418 static inline pmd_t pmd_mkhuge(pmd_t pmd)
 419 {
 420         return pmd_set_flags(pmd, _PAGE_PSE);
 421 }
 422 
 423 static inline pmd_t pmd_mkyoung(pmd_t pmd)
 424 {
 425         return pmd_set_flags(pmd, _PAGE_ACCESSED);
 426 }
 427 
 428 static inline pmd_t pmd_mkwrite(pmd_t pmd)
 429 {
 430         return pmd_set_flags(pmd, _PAGE_RW);
 431 }
 432 
 433 static inline pud_t pud_set_flags(pud_t pud, pudval_t set)
 434 {
 435         pudval_t v = native_pud_val(pud);
 436 
 437         return native_make_pud(v | set);
 438 }
 439 
 440 static inline pud_t pud_clear_flags(pud_t pud, pudval_t clear)
 441 {
 442         pudval_t v = native_pud_val(pud);
 443 
 444         return native_make_pud(v & ~clear);
 445 }
 446 
 447 static inline pud_t pud_mkold(pud_t pud)
 448 {
 449         return pud_clear_flags(pud, _PAGE_ACCESSED);
 450 }
 451 
 452 static inline pud_t pud_mkclean(pud_t pud)
 453 {
 454         return pud_clear_flags(pud, _PAGE_DIRTY);
 455 }
 456 
 457 static inline pud_t pud_wrprotect(pud_t pud)
 458 {
 459         return pud_clear_flags(pud, _PAGE_RW);
 460 }
 461 
 462 static inline pud_t pud_mkdirty(pud_t pud)
 463 {
 464         return pud_set_flags(pud, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
 465 }
 466 
 467 static inline pud_t pud_mkdevmap(pud_t pud)
 468 {
 469         return pud_set_flags(pud, _PAGE_DEVMAP);
 470 }
 471 
 472 static inline pud_t pud_mkhuge(pud_t pud)
 473 {
 474         return pud_set_flags(pud, _PAGE_PSE);
 475 }
 476 
 477 static inline pud_t pud_mkyoung(pud_t pud)
 478 {
 479         return pud_set_flags(pud, _PAGE_ACCESSED);
 480 }
 481 
 482 static inline pud_t pud_mkwrite(pud_t pud)
 483 {
 484         return pud_set_flags(pud, _PAGE_RW);
 485 }
 486 
 487 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
 488 static inline int pte_soft_dirty(pte_t pte)
 489 {
 490         return pte_flags(pte) & _PAGE_SOFT_DIRTY;
 491 }
 492 
 493 static inline int pmd_soft_dirty(pmd_t pmd)
 494 {
 495         return pmd_flags(pmd) & _PAGE_SOFT_DIRTY;
 496 }
 497 
 498 static inline int pud_soft_dirty(pud_t pud)
 499 {
 500         return pud_flags(pud) & _PAGE_SOFT_DIRTY;
 501 }
 502 
 503 static inline pte_t pte_mksoft_dirty(pte_t pte)
 504 {
 505         return pte_set_flags(pte, _PAGE_SOFT_DIRTY);
 506 }
 507 
 508 static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
 509 {
 510         return pmd_set_flags(pmd, _PAGE_SOFT_DIRTY);
 511 }
 512 
 513 static inline pud_t pud_mksoft_dirty(pud_t pud)
 514 {
 515         return pud_set_flags(pud, _PAGE_SOFT_DIRTY);
 516 }
 517 
 518 static inline pte_t pte_clear_soft_dirty(pte_t pte)
 519 {
 520         return pte_clear_flags(pte, _PAGE_SOFT_DIRTY);
 521 }
 522 
 523 static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd)
 524 {
 525         return pmd_clear_flags(pmd, _PAGE_SOFT_DIRTY);
 526 }
 527 
 528 static inline pud_t pud_clear_soft_dirty(pud_t pud)
 529 {
 530         return pud_clear_flags(pud, _PAGE_SOFT_DIRTY);
 531 }
 532 
 533 #endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
 534 
 535 /*
 536  * Mask out unsupported bits in a present pgprot.  Non-present pgprots
 537  * can use those bits for other purposes, so leave them be.
 538  */
 539 static inline pgprotval_t massage_pgprot(pgprot_t pgprot)
 540 {
 541         pgprotval_t protval = pgprot_val(pgprot);
 542 
 543         if (protval & _PAGE_PRESENT)
 544                 protval &= __supported_pte_mask;
 545 
 546         return protval;
 547 }
 548 
 549 static inline pgprotval_t check_pgprot(pgprot_t pgprot)
 550 {
 551         pgprotval_t massaged_val = massage_pgprot(pgprot);
 552 
 553         /* mmdebug.h can not be included here because of dependencies */
 554 #ifdef CONFIG_DEBUG_VM
 555         WARN_ONCE(pgprot_val(pgprot) != massaged_val,
 556                   "attempted to set unsupported pgprot: %016llx "
 557                   "bits: %016llx supported: %016llx\n",
 558                   (u64)pgprot_val(pgprot),
 559                   (u64)pgprot_val(pgprot) ^ massaged_val,
 560                   (u64)__supported_pte_mask);
 561 #endif
 562 
 563         return massaged_val;
 564 }
 565 
 566 static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
 567 {
 568         phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT;
 569         pfn ^= protnone_mask(pgprot_val(pgprot));
 570         pfn &= PTE_PFN_MASK;
 571         return __pte(pfn | check_pgprot(pgprot));
 572 }
 573 
 574 static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
 575 {
 576         phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT;
 577         pfn ^= protnone_mask(pgprot_val(pgprot));
 578         pfn &= PHYSICAL_PMD_PAGE_MASK;
 579         return __pmd(pfn | check_pgprot(pgprot));
 580 }
 581 
 582 static inline pud_t pfn_pud(unsigned long page_nr, pgprot_t pgprot)
 583 {
 584         phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT;
 585         pfn ^= protnone_mask(pgprot_val(pgprot));
 586         pfn &= PHYSICAL_PUD_PAGE_MASK;
 587         return __pud(pfn | check_pgprot(pgprot));
 588 }
 589 
 590 static inline pmd_t pmd_mknotpresent(pmd_t pmd)
 591 {
 592         return pfn_pmd(pmd_pfn(pmd),
 593                       __pgprot(pmd_flags(pmd) & ~(_PAGE_PRESENT|_PAGE_PROTNONE)));
 594 }
 595 
 596 static inline pud_t pud_mknotpresent(pud_t pud)
 597 {
 598         return pfn_pud(pud_pfn(pud),
 599               __pgprot(pud_flags(pud) & ~(_PAGE_PRESENT|_PAGE_PROTNONE)));
 600 }
 601 
 602 static inline u64 flip_protnone_guard(u64 oldval, u64 val, u64 mask);
 603 
 604 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
 605 {
 606         pteval_t val = pte_val(pte), oldval = val;
 607 
 608         /*
 609          * Chop off the NX bit (if present), and add the NX portion of
 610          * the newprot (if present):
 611          */
 612         val &= _PAGE_CHG_MASK;
 613         val |= check_pgprot(newprot) & ~_PAGE_CHG_MASK;
 614         val = flip_protnone_guard(oldval, val, PTE_PFN_MASK);
 615         return __pte(val);
 616 }
 617 
 618 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
 619 {
 620         pmdval_t val = pmd_val(pmd), oldval = val;
 621 
 622         val &= _HPAGE_CHG_MASK;
 623         val |= check_pgprot(newprot) & ~_HPAGE_CHG_MASK;
 624         val = flip_protnone_guard(oldval, val, PHYSICAL_PMD_PAGE_MASK);
 625         return __pmd(val);
 626 }
 627 
 628 /*
 629  * mprotect needs to preserve PAT and encryption bits when updating
 630  * vm_page_prot
 631  */
 632 #define pgprot_modify pgprot_modify
 633 static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
 634 {
 635         pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK;
 636         pgprotval_t addbits = pgprot_val(newprot) & ~_PAGE_CHG_MASK;
 637         return __pgprot(preservebits | addbits);
 638 }
 639 
 640 #define pte_pgprot(x) __pgprot(pte_flags(x))
 641 #define pmd_pgprot(x) __pgprot(pmd_flags(x))
 642 #define pud_pgprot(x) __pgprot(pud_flags(x))
 643 #define p4d_pgprot(x) __pgprot(p4d_flags(x))
 644 
 645 #define canon_pgprot(p) __pgprot(massage_pgprot(p))
 646 
 647 static inline pgprot_t arch_filter_pgprot(pgprot_t prot)
 648 {
 649         return canon_pgprot(prot);
 650 }
 651 
 652 static inline int is_new_memtype_allowed(u64 paddr, unsigned long size,
 653                                          enum page_cache_mode pcm,
 654                                          enum page_cache_mode new_pcm)
 655 {
 656         /*
 657          * PAT type is always WB for untracked ranges, so no need to check.
 658          */
 659         if (x86_platform.is_untracked_pat_range(paddr, paddr + size))
 660                 return 1;
 661 
 662         /*
 663          * Certain new memtypes are not allowed with certain
 664          * requested memtype:
 665          * - request is uncached, return cannot be write-back
 666          * - request is write-combine, return cannot be write-back
 667          * - request is write-through, return cannot be write-back
 668          * - request is write-through, return cannot be write-combine
 669          */
 670         if ((pcm == _PAGE_CACHE_MODE_UC_MINUS &&
 671              new_pcm == _PAGE_CACHE_MODE_WB) ||
 672             (pcm == _PAGE_CACHE_MODE_WC &&
 673              new_pcm == _PAGE_CACHE_MODE_WB) ||
 674             (pcm == _PAGE_CACHE_MODE_WT &&
 675              new_pcm == _PAGE_CACHE_MODE_WB) ||
 676             (pcm == _PAGE_CACHE_MODE_WT &&
 677              new_pcm == _PAGE_CACHE_MODE_WC)) {
 678                 return 0;
 679         }
 680 
 681         return 1;
 682 }
 683 
 684 pmd_t *populate_extra_pmd(unsigned long vaddr);
 685 pte_t *populate_extra_pte(unsigned long vaddr);
 686 
 687 #ifdef CONFIG_PAGE_TABLE_ISOLATION
 688 pgd_t __pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd);
 689 
 690 /*
 691  * Take a PGD location (pgdp) and a pgd value that needs to be set there.
 692  * Populates the user and returns the resulting PGD that must be set in
 693  * the kernel copy of the page tables.
 694  */
 695 static inline pgd_t pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd)
 696 {
 697         if (!static_cpu_has(X86_FEATURE_PTI))
 698                 return pgd;
 699         return __pti_set_user_pgtbl(pgdp, pgd);
 700 }
 701 #else   /* CONFIG_PAGE_TABLE_ISOLATION */
 702 static inline pgd_t pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd)
 703 {
 704         return pgd;
 705 }
 706 #endif  /* CONFIG_PAGE_TABLE_ISOLATION */
 707 
 708 #endif  /* __ASSEMBLY__ */
 709 
 710 
 711 #ifdef CONFIG_X86_32
 712 # include <asm/pgtable_32.h>
 713 #else
 714 # include <asm/pgtable_64.h>
 715 #endif
 716 
 717 #ifndef __ASSEMBLY__
 718 #include <linux/mm_types.h>
 719 #include <linux/mmdebug.h>
 720 #include <linux/log2.h>
 721 #include <asm/fixmap.h>
 722 
 723 static inline int pte_none(pte_t pte)
 724 {
 725         return !(pte.pte & ~(_PAGE_KNL_ERRATUM_MASK));
 726 }
 727 
 728 #define __HAVE_ARCH_PTE_SAME
 729 static inline int pte_same(pte_t a, pte_t b)
 730 {
 731         return a.pte == b.pte;
 732 }
 733 
 734 static inline int pte_present(pte_t a)
 735 {
 736         return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE);
 737 }
 738 
 739 #ifdef CONFIG_ARCH_HAS_PTE_DEVMAP
 740 static inline int pte_devmap(pte_t a)
 741 {
 742         return (pte_flags(a) & _PAGE_DEVMAP) == _PAGE_DEVMAP;
 743 }
 744 #endif
 745 
 746 #define pte_accessible pte_accessible
 747 static inline bool pte_accessible(struct mm_struct *mm, pte_t a)
 748 {
 749         if (pte_flags(a) & _PAGE_PRESENT)
 750                 return true;
 751 
 752         if ((pte_flags(a) & _PAGE_PROTNONE) &&
 753                         mm_tlb_flush_pending(mm))
 754                 return true;
 755 
 756         return false;
 757 }
 758 
 759 static inline int pmd_present(pmd_t pmd)
 760 {
 761         /*
 762          * Checking for _PAGE_PSE is needed too because
 763          * split_huge_page will temporarily clear the present bit (but
 764          * the _PAGE_PSE flag will remain set at all times while the
 765          * _PAGE_PRESENT bit is clear).
 766          */
 767         return pmd_flags(pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE | _PAGE_PSE);
 768 }
 769 
 770 #ifdef CONFIG_NUMA_BALANCING
 771 /*
 772  * These work without NUMA balancing but the kernel does not care. See the
 773  * comment in include/asm-generic/pgtable.h
 774  */
 775 static inline int pte_protnone(pte_t pte)
 776 {
 777         return (pte_flags(pte) & (_PAGE_PROTNONE | _PAGE_PRESENT))
 778                 == _PAGE_PROTNONE;
 779 }
 780 
 781 static inline int pmd_protnone(pmd_t pmd)
 782 {
 783         return (pmd_flags(pmd) & (_PAGE_PROTNONE | _PAGE_PRESENT))
 784                 == _PAGE_PROTNONE;
 785 }
 786 #endif /* CONFIG_NUMA_BALANCING */
 787 
 788 static inline int pmd_none(pmd_t pmd)
 789 {
 790         /* Only check low word on 32-bit platforms, since it might be
 791            out of sync with upper half. */
 792         unsigned long val = native_pmd_val(pmd);
 793         return (val & ~_PAGE_KNL_ERRATUM_MASK) == 0;
 794 }
 795 
 796 static inline unsigned long pmd_page_vaddr(pmd_t pmd)
 797 {
 798         return (unsigned long)__va(pmd_val(pmd) & pmd_pfn_mask(pmd));
 799 }
 800 
 801 /*
 802  * Currently stuck as a macro due to indirect forward reference to
 803  * linux/mmzone.h's __section_mem_map_addr() definition:
 804  */
 805 #define pmd_page(pmd)   pfn_to_page(pmd_pfn(pmd))
 806 
 807 /*
 808  * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
 809  *
 810  * this macro returns the index of the entry in the pmd page which would
 811  * control the given virtual address
 812  */
 813 static inline unsigned long pmd_index(unsigned long address)
 814 {
 815         return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
 816 }
 817 
 818 /*
 819  * Conversion functions: convert a page and protection to a page entry,
 820  * and a page entry and page directory to the page they refer to.
 821  *
 822  * (Currently stuck as a macro because of indirect forward reference
 823  * to linux/mm.h:page_to_nid())
 824  */
 825 #define mk_pte(page, pgprot)   pfn_pte(page_to_pfn(page), (pgprot))
 826 
 827 /*
 828  * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
 829  *
 830  * this function returns the index of the entry in the pte page which would
 831  * control the given virtual address
 832  */
 833 static inline unsigned long pte_index(unsigned long address)
 834 {
 835         return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
 836 }
 837 
 838 static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address)
 839 {
 840         return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address);
 841 }
 842 
 843 static inline int pmd_bad(pmd_t pmd)
 844 {
 845         return (pmd_flags(pmd) & ~_PAGE_USER) != _KERNPG_TABLE;
 846 }
 847 
 848 static inline unsigned long pages_to_mb(unsigned long npg)
 849 {
 850         return npg >> (20 - PAGE_SHIFT);
 851 }
 852 
 853 #if CONFIG_PGTABLE_LEVELS > 2
 854 static inline int pud_none(pud_t pud)
 855 {
 856         return (native_pud_val(pud) & ~(_PAGE_KNL_ERRATUM_MASK)) == 0;
 857 }
 858 
 859 static inline int pud_present(pud_t pud)
 860 {
 861         return pud_flags(pud) & _PAGE_PRESENT;
 862 }
 863 
 864 static inline unsigned long pud_page_vaddr(pud_t pud)
 865 {
 866         return (unsigned long)__va(pud_val(pud) & pud_pfn_mask(pud));
 867 }
 868 
 869 /*
 870  * Currently stuck as a macro due to indirect forward reference to
 871  * linux/mmzone.h's __section_mem_map_addr() definition:
 872  */
 873 #define pud_page(pud)   pfn_to_page(pud_pfn(pud))
 874 
 875 /* Find an entry in the second-level page table.. */
 876 static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
 877 {
 878         return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address);
 879 }
 880 
 881 static inline int pud_large(pud_t pud)
 882 {
 883         return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) ==
 884                 (_PAGE_PSE | _PAGE_PRESENT);
 885 }
 886 
 887 static inline int pud_bad(pud_t pud)
 888 {
 889         return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0;
 890 }
 891 #else
 892 static inline int pud_large(pud_t pud)
 893 {
 894         return 0;
 895 }
 896 #endif  /* CONFIG_PGTABLE_LEVELS > 2 */
 897 
 898 static inline unsigned long pud_index(unsigned long address)
 899 {
 900         return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1);
 901 }
 902 
 903 #if CONFIG_PGTABLE_LEVELS > 3
 904 static inline int p4d_none(p4d_t p4d)
 905 {
 906         return (native_p4d_val(p4d) & ~(_PAGE_KNL_ERRATUM_MASK)) == 0;
 907 }
 908 
 909 static inline int p4d_present(p4d_t p4d)
 910 {
 911         return p4d_flags(p4d) & _PAGE_PRESENT;
 912 }
 913 
 914 static inline unsigned long p4d_page_vaddr(p4d_t p4d)
 915 {
 916         return (unsigned long)__va(p4d_val(p4d) & p4d_pfn_mask(p4d));
 917 }
 918 
 919 /*
 920  * Currently stuck as a macro due to indirect forward reference to
 921  * linux/mmzone.h's __section_mem_map_addr() definition:
 922  */
 923 #define p4d_page(p4d)   pfn_to_page(p4d_pfn(p4d))
 924 
 925 /* Find an entry in the third-level page table.. */
 926 static inline pud_t *pud_offset(p4d_t *p4d, unsigned long address)
 927 {
 928         return (pud_t *)p4d_page_vaddr(*p4d) + pud_index(address);
 929 }
 930 
 931 static inline int p4d_bad(p4d_t p4d)
 932 {
 933         unsigned long ignore_flags = _KERNPG_TABLE | _PAGE_USER;
 934 
 935         if (IS_ENABLED(CONFIG_PAGE_TABLE_ISOLATION))
 936                 ignore_flags |= _PAGE_NX;
 937 
 938         return (p4d_flags(p4d) & ~ignore_flags) != 0;
 939 }
 940 #endif  /* CONFIG_PGTABLE_LEVELS > 3 */
 941 
 942 static inline unsigned long p4d_index(unsigned long address)
 943 {
 944         return (address >> P4D_SHIFT) & (PTRS_PER_P4D - 1);
 945 }
 946 
 947 #if CONFIG_PGTABLE_LEVELS > 4
 948 static inline int pgd_present(pgd_t pgd)
 949 {
 950         if (!pgtable_l5_enabled())
 951                 return 1;
 952         return pgd_flags(pgd) & _PAGE_PRESENT;
 953 }
 954 
 955 static inline unsigned long pgd_page_vaddr(pgd_t pgd)
 956 {
 957         return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK);
 958 }
 959 
 960 /*
 961  * Currently stuck as a macro due to indirect forward reference to
 962  * linux/mmzone.h's __section_mem_map_addr() definition:
 963  */
 964 #define pgd_page(pgd)   pfn_to_page(pgd_pfn(pgd))
 965 
 966 /* to find an entry in a page-table-directory. */
 967 static inline p4d_t *p4d_offset(pgd_t *pgd, unsigned long address)
 968 {
 969         if (!pgtable_l5_enabled())
 970                 return (p4d_t *)pgd;
 971         return (p4d_t *)pgd_page_vaddr(*pgd) + p4d_index(address);
 972 }
 973 
 974 static inline int pgd_bad(pgd_t pgd)
 975 {
 976         unsigned long ignore_flags = _PAGE_USER;
 977 
 978         if (!pgtable_l5_enabled())
 979                 return 0;
 980 
 981         if (IS_ENABLED(CONFIG_PAGE_TABLE_ISOLATION))
 982                 ignore_flags |= _PAGE_NX;
 983 
 984         return (pgd_flags(pgd) & ~ignore_flags) != _KERNPG_TABLE;
 985 }
 986 
 987 static inline int pgd_none(pgd_t pgd)
 988 {
 989         if (!pgtable_l5_enabled())
 990                 return 0;
 991         /*
 992          * There is no need to do a workaround for the KNL stray
 993          * A/D bit erratum here.  PGDs only point to page tables
 994          * except on 32-bit non-PAE which is not supported on
 995          * KNL.
 996          */
 997         return !native_pgd_val(pgd);
 998 }
 999 #endif  /* CONFIG_PGTABLE_LEVELS > 4 */
1000 
1001 #endif  /* __ASSEMBLY__ */
1002 
1003 /*
1004  * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
1005  *
1006  * this macro returns the index of the entry in the pgd page which would
1007  * control the given virtual address
1008  */
1009 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
1010 
1011 /*
1012  * pgd_offset() returns a (pgd_t *)
1013  * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
1014  */
1015 #define pgd_offset_pgd(pgd, address) (pgd + pgd_index((address)))
1016 /*
1017  * a shortcut to get a pgd_t in a given mm
1018  */
1019 #define pgd_offset(mm, address) pgd_offset_pgd((mm)->pgd, (address))
1020 /*
1021  * a shortcut which implies the use of the kernel's pgd, instead
1022  * of a process's
1023  */
1024 #define pgd_offset_k(address) pgd_offset(&init_mm, (address))
1025 
1026 
1027 #define KERNEL_PGD_BOUNDARY     pgd_index(PAGE_OFFSET)
1028 #define KERNEL_PGD_PTRS         (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY)
1029 
1030 #ifndef __ASSEMBLY__
1031 
1032 extern int direct_gbpages;
1033 void init_mem_mapping(void);
1034 void early_alloc_pgt_buf(void);
1035 extern void memblock_find_dma_reserve(void);
1036 
1037 #ifdef CONFIG_X86_64
1038 /* Realmode trampoline initialization. */
1039 extern pgd_t trampoline_pgd_entry;
1040 static inline void __meminit init_trampoline_default(void)
1041 {
1042         /* Default trampoline pgd value */
1043         trampoline_pgd_entry = init_top_pgt[pgd_index(__PAGE_OFFSET)];
1044 }
1045 
1046 void __init poking_init(void);
1047 
1048 # ifdef CONFIG_RANDOMIZE_MEMORY
1049 void __meminit init_trampoline(void);
1050 # else
1051 #  define init_trampoline init_trampoline_default
1052 # endif
1053 #else
1054 static inline void init_trampoline(void) { }
1055 #endif
1056 
1057 /* local pte updates need not use xchg for locking */
1058 static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
1059 {
1060         pte_t res = *ptep;
1061 
1062         /* Pure native function needs no input for mm, addr */
1063         native_pte_clear(NULL, 0, ptep);
1064         return res;
1065 }
1066 
1067 static inline pmd_t native_local_pmdp_get_and_clear(pmd_t *pmdp)
1068 {
1069         pmd_t res = *pmdp;
1070 
1071         native_pmd_clear(pmdp);
1072         return res;
1073 }
1074 
1075 static inline pud_t native_local_pudp_get_and_clear(pud_t *pudp)
1076 {
1077         pud_t res = *pudp;
1078 
1079         native_pud_clear(pudp);
1080         return res;
1081 }
1082 
1083 static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr,
1084                                      pte_t *ptep , pte_t pte)
1085 {
1086         native_set_pte(ptep, pte);
1087 }
1088 
1089 static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
1090                               pmd_t *pmdp, pmd_t pmd)
1091 {
1092         set_pmd(pmdp, pmd);
1093 }
1094 
1095 static inline void set_pud_at(struct mm_struct *mm, unsigned long addr,
1096                               pud_t *pudp, pud_t pud)
1097 {
1098         native_set_pud(pudp, pud);
1099 }
1100 
1101 /*
1102  * We only update the dirty/accessed state if we set
1103  * the dirty bit by hand in the kernel, since the hardware
1104  * will do the accessed bit for us, and we don't want to
1105  * race with other CPU's that might be updating the dirty
1106  * bit at the same time.
1107  */
1108 struct vm_area_struct;
1109 
1110 #define  __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
1111 extern int ptep_set_access_flags(struct vm_area_struct *vma,
1112                                  unsigned long address, pte_t *ptep,
1113                                  pte_t entry, int dirty);
1114 
1115 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
1116 extern int ptep_test_and_clear_young(struct vm_area_struct *vma,
1117                                      unsigned long addr, pte_t *ptep);
1118 
1119 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
1120 extern int ptep_clear_flush_young(struct vm_area_struct *vma,
1121                                   unsigned long address, pte_t *ptep);
1122 
1123 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
1124 static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
1125                                        pte_t *ptep)
1126 {
1127         pte_t pte = native_ptep_get_and_clear(ptep);
1128         return pte;
1129 }
1130 
1131 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
1132 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
1133                                             unsigned long addr, pte_t *ptep,
1134                                             int full)
1135 {
1136         pte_t pte;
1137         if (full) {
1138                 /*
1139                  * Full address destruction in progress; paravirt does not
1140                  * care about updates and native needs no locking
1141                  */
1142                 pte = native_local_ptep_get_and_clear(ptep);
1143         } else {
1144                 pte = ptep_get_and_clear(mm, addr, ptep);
1145         }
1146         return pte;
1147 }
1148 
1149 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
1150 static inline void ptep_set_wrprotect(struct mm_struct *mm,
1151                                       unsigned long addr, pte_t *ptep)
1152 {
1153         clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte);
1154 }
1155 
1156 #define flush_tlb_fix_spurious_fault(vma, address) do { } while (0)
1157 
1158 #define mk_pmd(page, pgprot)   pfn_pmd(page_to_pfn(page), (pgprot))
1159 
1160 #define  __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
1161 extern int pmdp_set_access_flags(struct vm_area_struct *vma,
1162                                  unsigned long address, pmd_t *pmdp,
1163                                  pmd_t entry, int dirty);
1164 extern int pudp_set_access_flags(struct vm_area_struct *vma,
1165                                  unsigned long address, pud_t *pudp,
1166                                  pud_t entry, int dirty);
1167 
1168 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
1169 extern int pmdp_test_and_clear_young(struct vm_area_struct *vma,
1170                                      unsigned long addr, pmd_t *pmdp);
1171 extern int pudp_test_and_clear_young(struct vm_area_struct *vma,
1172                                      unsigned long addr, pud_t *pudp);
1173 
1174 #define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
1175 extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
1176                                   unsigned long address, pmd_t *pmdp);
1177 
1178 
1179 #define pmd_write pmd_write
1180 static inline int pmd_write(pmd_t pmd)
1181 {
1182         return pmd_flags(pmd) & _PAGE_RW;
1183 }
1184 
1185 #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
1186 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, unsigned long addr,
1187                                        pmd_t *pmdp)
1188 {
1189         return native_pmdp_get_and_clear(pmdp);
1190 }
1191 
1192 #define __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR
1193 static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm,
1194                                         unsigned long addr, pud_t *pudp)
1195 {
1196         return native_pudp_get_and_clear(pudp);
1197 }
1198 
1199 #define __HAVE_ARCH_PMDP_SET_WRPROTECT
1200 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
1201                                       unsigned long addr, pmd_t *pmdp)
1202 {
1203         clear_bit(_PAGE_BIT_RW, (unsigned long *)pmdp);
1204 }
1205 
1206 #define pud_write pud_write
1207 static inline int pud_write(pud_t pud)
1208 {
1209         return pud_flags(pud) & _PAGE_RW;
1210 }
1211 
1212 #ifndef pmdp_establish
1213 #define pmdp_establish pmdp_establish
1214 static inline pmd_t pmdp_establish(struct vm_area_struct *vma,
1215                 unsigned long address, pmd_t *pmdp, pmd_t pmd)
1216 {
1217         if (IS_ENABLED(CONFIG_SMP)) {
1218                 return xchg(pmdp, pmd);
1219         } else {
1220                 pmd_t old = *pmdp;
1221                 WRITE_ONCE(*pmdp, pmd);
1222                 return old;
1223         }
1224 }
1225 #endif
1226 /*
1227  * Page table pages are page-aligned.  The lower half of the top
1228  * level is used for userspace and the top half for the kernel.
1229  *
1230  * Returns true for parts of the PGD that map userspace and
1231  * false for the parts that map the kernel.
1232  */
1233 static inline bool pgdp_maps_userspace(void *__ptr)
1234 {
1235         unsigned long ptr = (unsigned long)__ptr;
1236 
1237         return (((ptr & ~PAGE_MASK) / sizeof(pgd_t)) < PGD_KERNEL_START);
1238 }
1239 
1240 static inline int pgd_large(pgd_t pgd) { return 0; }
1241 
1242 #ifdef CONFIG_PAGE_TABLE_ISOLATION
1243 /*
1244  * All top-level PAGE_TABLE_ISOLATION page tables are order-1 pages
1245  * (8k-aligned and 8k in size).  The kernel one is at the beginning 4k and
1246  * the user one is in the last 4k.  To switch between them, you
1247  * just need to flip the 12th bit in their addresses.
1248  */
1249 #define PTI_PGTABLE_SWITCH_BIT  PAGE_SHIFT
1250 
1251 /*
1252  * This generates better code than the inline assembly in
1253  * __set_bit().
1254  */
1255 static inline void *ptr_set_bit(void *ptr, int bit)
1256 {
1257         unsigned long __ptr = (unsigned long)ptr;
1258 
1259         __ptr |= BIT(bit);
1260         return (void *)__ptr;
1261 }
1262 static inline void *ptr_clear_bit(void *ptr, int bit)
1263 {
1264         unsigned long __ptr = (unsigned long)ptr;
1265 
1266         __ptr &= ~BIT(bit);
1267         return (void *)__ptr;
1268 }
1269 
1270 static inline pgd_t *kernel_to_user_pgdp(pgd_t *pgdp)
1271 {
1272         return ptr_set_bit(pgdp, PTI_PGTABLE_SWITCH_BIT);
1273 }
1274 
1275 static inline pgd_t *user_to_kernel_pgdp(pgd_t *pgdp)
1276 {
1277         return ptr_clear_bit(pgdp, PTI_PGTABLE_SWITCH_BIT);
1278 }
1279 
1280 static inline p4d_t *kernel_to_user_p4dp(p4d_t *p4dp)
1281 {
1282         return ptr_set_bit(p4dp, PTI_PGTABLE_SWITCH_BIT);
1283 }
1284 
1285 static inline p4d_t *user_to_kernel_p4dp(p4d_t *p4dp)
1286 {
1287         return ptr_clear_bit(p4dp, PTI_PGTABLE_SWITCH_BIT);
1288 }
1289 #endif /* CONFIG_PAGE_TABLE_ISOLATION */
1290 
1291 /*
1292  * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
1293  *
1294  *  dst - pointer to pgd range anwhere on a pgd page
1295  *  src - ""
1296  *  count - the number of pgds to copy.
1297  *
1298  * dst and src can be on the same page, but the range must not overlap,
1299  * and must not cross a page boundary.
1300  */
1301 static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
1302 {
1303         memcpy(dst, src, count * sizeof(pgd_t));
1304 #ifdef CONFIG_PAGE_TABLE_ISOLATION
1305         if (!static_cpu_has(X86_FEATURE_PTI))
1306                 return;
1307         /* Clone the user space pgd as well */
1308         memcpy(kernel_to_user_pgdp(dst), kernel_to_user_pgdp(src),
1309                count * sizeof(pgd_t));
1310 #endif
1311 }
1312 
1313 #define PTE_SHIFT ilog2(PTRS_PER_PTE)
1314 static inline int page_level_shift(enum pg_level level)
1315 {
1316         return (PAGE_SHIFT - PTE_SHIFT) + level * PTE_SHIFT;
1317 }
1318 static inline unsigned long page_level_size(enum pg_level level)
1319 {
1320         return 1UL << page_level_shift(level);
1321 }
1322 static inline unsigned long page_level_mask(enum pg_level level)
1323 {
1324         return ~(page_level_size(level) - 1);
1325 }
1326 
1327 /*
1328  * The x86 doesn't have any external MMU info: the kernel page
1329  * tables contain all the necessary information.
1330  */
1331 static inline void update_mmu_cache(struct vm_area_struct *vma,
1332                 unsigned long addr, pte_t *ptep)
1333 {
1334 }
1335 static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
1336                 unsigned long addr, pmd_t *pmd)
1337 {
1338 }
1339 static inline void update_mmu_cache_pud(struct vm_area_struct *vma,
1340                 unsigned long addr, pud_t *pud)
1341 {
1342 }
1343 
1344 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
1345 static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
1346 {
1347         return pte_set_flags(pte, _PAGE_SWP_SOFT_DIRTY);
1348 }
1349 
1350 static inline int pte_swp_soft_dirty(pte_t pte)
1351 {
1352         return pte_flags(pte) & _PAGE_SWP_SOFT_DIRTY;
1353 }
1354 
1355 static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
1356 {
1357         return pte_clear_flags(pte, _PAGE_SWP_SOFT_DIRTY);
1358 }
1359 
1360 #ifdef CONFIG_ARCH_ENABLE_THP_MIGRATION
1361 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd)
1362 {
1363         return pmd_set_flags(pmd, _PAGE_SWP_SOFT_DIRTY);
1364 }
1365 
1366 static inline int pmd_swp_soft_dirty(pmd_t pmd)
1367 {
1368         return pmd_flags(pmd) & _PAGE_SWP_SOFT_DIRTY;
1369 }
1370 
1371 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd)
1372 {
1373         return pmd_clear_flags(pmd, _PAGE_SWP_SOFT_DIRTY);
1374 }
1375 #endif
1376 #endif
1377 
1378 #define PKRU_AD_BIT 0x1
1379 #define PKRU_WD_BIT 0x2
1380 #define PKRU_BITS_PER_PKEY 2
1381 
1382 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
1383 extern u32 init_pkru_value;
1384 #else
1385 #define init_pkru_value 0
1386 #endif
1387 
1388 static inline bool __pkru_allows_read(u32 pkru, u16 pkey)
1389 {
1390         int pkru_pkey_bits = pkey * PKRU_BITS_PER_PKEY;
1391         return !(pkru & (PKRU_AD_BIT << pkru_pkey_bits));
1392 }
1393 
1394 static inline bool __pkru_allows_write(u32 pkru, u16 pkey)
1395 {
1396         int pkru_pkey_bits = pkey * PKRU_BITS_PER_PKEY;
1397         /*
1398          * Access-disable disables writes too so we need to check
1399          * both bits here.
1400          */
1401         return !(pkru & ((PKRU_AD_BIT|PKRU_WD_BIT) << pkru_pkey_bits));
1402 }
1403 
1404 static inline u16 pte_flags_pkey(unsigned long pte_flags)
1405 {
1406 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
1407         /* ifdef to avoid doing 59-bit shift on 32-bit values */
1408         return (pte_flags & _PAGE_PKEY_MASK) >> _PAGE_BIT_PKEY_BIT0;
1409 #else
1410         return 0;
1411 #endif
1412 }
1413 
1414 static inline bool __pkru_allows_pkey(u16 pkey, bool write)
1415 {
1416         u32 pkru = read_pkru();
1417 
1418         if (!__pkru_allows_read(pkru, pkey))
1419                 return false;
1420         if (write && !__pkru_allows_write(pkru, pkey))
1421                 return false;
1422 
1423         return true;
1424 }
1425 
1426 /*
1427  * 'pteval' can come from a PTE, PMD or PUD.  We only check
1428  * _PAGE_PRESENT, _PAGE_USER, and _PAGE_RW in here which are the
1429  * same value on all 3 types.
1430  */
1431 static inline bool __pte_access_permitted(unsigned long pteval, bool write)
1432 {
1433         unsigned long need_pte_bits = _PAGE_PRESENT|_PAGE_USER;
1434 
1435         if (write)
1436                 need_pte_bits |= _PAGE_RW;
1437 
1438         if ((pteval & need_pte_bits) != need_pte_bits)
1439                 return 0;
1440 
1441         return __pkru_allows_pkey(pte_flags_pkey(pteval), write);
1442 }
1443 
1444 #define pte_access_permitted pte_access_permitted
1445 static inline bool pte_access_permitted(pte_t pte, bool write)
1446 {
1447         return __pte_access_permitted(pte_val(pte), write);
1448 }
1449 
1450 #define pmd_access_permitted pmd_access_permitted
1451 static inline bool pmd_access_permitted(pmd_t pmd, bool write)
1452 {
1453         return __pte_access_permitted(pmd_val(pmd), write);
1454 }
1455 
1456 #define pud_access_permitted pud_access_permitted
1457 static inline bool pud_access_permitted(pud_t pud, bool write)
1458 {
1459         return __pte_access_permitted(pud_val(pud), write);
1460 }
1461 
1462 #define __HAVE_ARCH_PFN_MODIFY_ALLOWED 1
1463 extern bool pfn_modify_allowed(unsigned long pfn, pgprot_t prot);
1464 
1465 static inline bool arch_has_pfn_modify_check(void)
1466 {
1467         return boot_cpu_has_bug(X86_BUG_L1TF);
1468 }
1469 
1470 #include <asm-generic/pgtable.h>
1471 #endif  /* __ASSEMBLY__ */
1472 
1473 #endif /* _ASM_X86_PGTABLE_H */
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root/arch/x86/include/asm/pgtable.h

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