This source file includes following definitions.
- pconfig_target_supported
- intel_pconfig_init
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11 #include <asm/cpufeature.h>
12 #include <asm/intel_pconfig.h>
13
14 #define PCONFIG_CPUID 0x1b
15
16 #define PCONFIG_CPUID_SUBLEAF_MASK ((1 << 12) - 1)
17
18
19 enum {
20 PCONFIG_CPUID_SUBLEAF_INVALID = 0,
21 PCONFIG_CPUID_SUBLEAF_TARGETID = 1,
22 };
23
24
25 static u64 targets_supported __read_mostly;
26
27 int pconfig_target_supported(enum pconfig_target target)
28 {
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33 BUILD_BUG_ON(PCONFIG_TARGET_NR >= 64);
34
35 if (WARN_ON_ONCE(target >= 64))
36 return 0;
37 return targets_supported & (1ULL << target);
38 }
39
40 static int __init intel_pconfig_init(void)
41 {
42 int subleaf;
43
44 if (!boot_cpu_has(X86_FEATURE_PCONFIG))
45 return 0;
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54
55 for (subleaf = 0; subleaf < INT_MAX; subleaf++) {
56 struct cpuid_regs regs;
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58 cpuid_count(PCONFIG_CPUID, subleaf,
59 ®s.eax, ®s.ebx, ®s.ecx, ®s.edx);
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61 switch (regs.eax & PCONFIG_CPUID_SUBLEAF_MASK) {
62 case PCONFIG_CPUID_SUBLEAF_INVALID:
63
64 goto out;
65 case PCONFIG_CPUID_SUBLEAF_TARGETID:
66
67 if (regs.ebx < 64)
68 targets_supported |= (1ULL << regs.ebx);
69 if (regs.ecx < 64)
70 targets_supported |= (1ULL << regs.ecx);
71 if (regs.edx < 64)
72 targets_supported |= (1ULL << regs.edx);
73 break;
74 default:
75
76 break;
77 }
78 }
79 out:
80 return 0;
81 }
82 arch_initcall(intel_pconfig_init);