This source file includes following definitions.
- x86_init_noop
- x86_init_uint_noop
- iommu_init_noop
- iommu_shutdown_noop
- bool_x86_init_noop
- x86_op_int_noop
- default_nmi_init
- arch_setup_msi_irqs
- arch_teardown_msi_irqs
- arch_teardown_msi_irq
- arch_restore_msi_irqs
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6 #include <linux/init.h>
7 #include <linux/ioport.h>
8 #include <linux/export.h>
9 #include <linux/pci.h>
10
11 #include <asm/acpi.h>
12 #include <asm/bios_ebda.h>
13 #include <asm/paravirt.h>
14 #include <asm/pci_x86.h>
15 #include <asm/mpspec.h>
16 #include <asm/setup.h>
17 #include <asm/apic.h>
18 #include <asm/e820/api.h>
19 #include <asm/time.h>
20 #include <asm/irq.h>
21 #include <asm/io_apic.h>
22 #include <asm/hpet.h>
23 #include <asm/pat.h>
24 #include <asm/tsc.h>
25 #include <asm/iommu.h>
26 #include <asm/mach_traps.h>
27
28 void x86_init_noop(void) { }
29 void __init x86_init_uint_noop(unsigned int unused) { }
30 static int __init iommu_init_noop(void) { return 0; }
31 static void iommu_shutdown_noop(void) { }
32 bool __init bool_x86_init_noop(void) { return false; }
33 void x86_op_int_noop(int cpu) { }
34
35
36
37
38
39 struct x86_init_ops x86_init __initdata = {
40
41 .resources = {
42 .probe_roms = probe_roms,
43 .reserve_resources = reserve_standard_io_resources,
44 .memory_setup = e820__memory_setup_default,
45 },
46
47 .mpparse = {
48 .mpc_record = x86_init_uint_noop,
49 .setup_ioapic_ids = x86_init_noop,
50 .mpc_apic_id = default_mpc_apic_id,
51 .smp_read_mpc_oem = default_smp_read_mpc_oem,
52 .mpc_oem_bus_info = default_mpc_oem_bus_info,
53 .find_smp_config = default_find_smp_config,
54 .get_smp_config = default_get_smp_config,
55 },
56
57 .irqs = {
58 .pre_vector_init = init_ISA_irqs,
59 .intr_init = native_init_IRQ,
60 .trap_init = x86_init_noop,
61 .intr_mode_select = apic_intr_mode_select,
62 .intr_mode_init = apic_intr_mode_init
63 },
64
65 .oem = {
66 .arch_setup = x86_init_noop,
67 .banner = default_banner,
68 },
69
70 .paging = {
71 .pagetable_init = native_pagetable_init,
72 },
73
74 .timers = {
75 .setup_percpu_clockev = setup_boot_APIC_clock,
76 .timer_init = hpet_time_init,
77 .wallclock_init = x86_init_noop,
78 },
79
80 .iommu = {
81 .iommu_init = iommu_init_noop,
82 },
83
84 .pci = {
85 .init = x86_default_pci_init,
86 .init_irq = x86_default_pci_init_irq,
87 .fixup_irqs = x86_default_pci_fixup_irqs,
88 },
89
90 .hyper = {
91 .init_platform = x86_init_noop,
92 .guest_late_init = x86_init_noop,
93 .x2apic_available = bool_x86_init_noop,
94 .init_mem_mapping = x86_init_noop,
95 .init_after_bootmem = x86_init_noop,
96 },
97
98 .acpi = {
99 .set_root_pointer = x86_default_set_root_pointer,
100 .get_root_pointer = x86_default_get_root_pointer,
101 .reduced_hw_early_init = acpi_generic_reduced_hw_init,
102 },
103 };
104
105 struct x86_cpuinit_ops x86_cpuinit = {
106 .early_percpu_clock_init = x86_init_noop,
107 .setup_percpu_clockev = setup_secondary_APIC_clock,
108 };
109
110 static void default_nmi_init(void) { };
111
112 struct x86_platform_ops x86_platform __ro_after_init = {
113 .calibrate_cpu = native_calibrate_cpu_early,
114 .calibrate_tsc = native_calibrate_tsc,
115 .get_wallclock = mach_get_cmos_time,
116 .set_wallclock = mach_set_rtc_mmss,
117 .iommu_shutdown = iommu_shutdown_noop,
118 .is_untracked_pat_range = is_ISA_range,
119 .nmi_init = default_nmi_init,
120 .get_nmi_reason = default_get_nmi_reason,
121 .save_sched_clock_state = tsc_save_sched_clock_state,
122 .restore_sched_clock_state = tsc_restore_sched_clock_state,
123 .hyper.pin_vcpu = x86_op_int_noop,
124 };
125
126 EXPORT_SYMBOL_GPL(x86_platform);
127
128 #if defined(CONFIG_PCI_MSI)
129 struct x86_msi_ops x86_msi __ro_after_init = {
130 .setup_msi_irqs = native_setup_msi_irqs,
131 .teardown_msi_irq = native_teardown_msi_irq,
132 .teardown_msi_irqs = default_teardown_msi_irqs,
133 .restore_msi_irqs = default_restore_msi_irqs,
134 };
135
136
137 int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
138 {
139 return x86_msi.setup_msi_irqs(dev, nvec, type);
140 }
141
142 void arch_teardown_msi_irqs(struct pci_dev *dev)
143 {
144 x86_msi.teardown_msi_irqs(dev);
145 }
146
147 void arch_teardown_msi_irq(unsigned int irq)
148 {
149 x86_msi.teardown_msi_irq(irq);
150 }
151
152 void arch_restore_msi_irqs(struct pci_dev *dev)
153 {
154 x86_msi.restore_msi_irqs(dev);
155 }
156 #endif
157
158 struct x86_apic_ops x86_apic_ops __ro_after_init = {
159 .io_apic_read = native_io_apic_read,
160 .restore = native_restore_boot_irq_mode,
161 };