root/arch/riscv/include/asm/asm.h

INCLUDED FROM

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * Copyright (C) 2015 Regents of the University of California
   4  */
   5 
   6 #ifndef _ASM_RISCV_ASM_H
   7 #define _ASM_RISCV_ASM_H
   8 
   9 #ifdef __ASSEMBLY__
  10 #define __ASM_STR(x)    x
  11 #else
  12 #define __ASM_STR(x)    #x
  13 #endif
  14 
  15 #if __riscv_xlen == 64
  16 #define __REG_SEL(a, b) __ASM_STR(a)
  17 #elif __riscv_xlen == 32
  18 #define __REG_SEL(a, b) __ASM_STR(b)
  19 #else
  20 #error "Unexpected __riscv_xlen"
  21 #endif
  22 
  23 #define REG_L           __REG_SEL(ld, lw)
  24 #define REG_S           __REG_SEL(sd, sw)
  25 #define REG_SC          __REG_SEL(sc.d, sc.w)
  26 #define SZREG           __REG_SEL(8, 4)
  27 #define LGREG           __REG_SEL(3, 2)
  28 
  29 #if __SIZEOF_POINTER__ == 8
  30 #ifdef __ASSEMBLY__
  31 #define RISCV_PTR               .dword
  32 #define RISCV_SZPTR             8
  33 #define RISCV_LGPTR             3
  34 #else
  35 #define RISCV_PTR               ".dword"
  36 #define RISCV_SZPTR             "8"
  37 #define RISCV_LGPTR             "3"
  38 #endif
  39 #elif __SIZEOF_POINTER__ == 4
  40 #ifdef __ASSEMBLY__
  41 #define RISCV_PTR               .word
  42 #define RISCV_SZPTR             4
  43 #define RISCV_LGPTR             2
  44 #else
  45 #define RISCV_PTR               ".word"
  46 #define RISCV_SZPTR             "4"
  47 #define RISCV_LGPTR             "2"
  48 #endif
  49 #else
  50 #error "Unexpected __SIZEOF_POINTER__"
  51 #endif
  52 
  53 #if (__SIZEOF_INT__ == 4)
  54 #define RISCV_INT               __ASM_STR(.word)
  55 #define RISCV_SZINT             __ASM_STR(4)
  56 #define RISCV_LGINT             __ASM_STR(2)
  57 #else
  58 #error "Unexpected __SIZEOF_INT__"
  59 #endif
  60 
  61 #if (__SIZEOF_SHORT__ == 2)
  62 #define RISCV_SHORT             __ASM_STR(.half)
  63 #define RISCV_SZSHORT           __ASM_STR(2)
  64 #define RISCV_LGSHORT           __ASM_STR(1)
  65 #else
  66 #error "Unexpected __SIZEOF_SHORT__"
  67 #endif
  68 
  69 #endif /* _ASM_RISCV_ASM_H */