This source file includes following definitions.
- xstate_required_size
- kvm_mpx_supported
- kvm_supported_xcr0
- kvm_update_cpuid
- is_efer_nx
- cpuid_fix_nx_cap
- cpuid_query_maxphyaddr
- kvm_vcpu_ioctl_set_cpuid
- kvm_vcpu_ioctl_set_cpuid2
- kvm_vcpu_ioctl_get_cpuid2
- cpuid_mask
- do_host_cpuid
- __do_cpuid_func_emulated
- do_cpuid_7_mask
- __do_cpuid_func
- do_cpuid_func
- is_centaur_cpu
- sanity_check_entries
- kvm_dev_ioctl_get_cpuid
- move_to_next_stateful_cpuid_entry
- is_matching_cpuid_entry
- kvm_find_cpuid_entry
- cpuid_function_in_range
- kvm_cpuid
- kvm_emulate_cpuid
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11
12 #include <linux/kvm_host.h>
13 #include <linux/export.h>
14 #include <linux/vmalloc.h>
15 #include <linux/uaccess.h>
16 #include <linux/sched/stat.h>
17
18 #include <asm/processor.h>
19 #include <asm/user.h>
20 #include <asm/fpu/xstate.h>
21 #include "cpuid.h"
22 #include "lapic.h"
23 #include "mmu.h"
24 #include "trace.h"
25 #include "pmu.h"
26
27 static u32 xstate_required_size(u64 xstate_bv, bool compacted)
28 {
29 int feature_bit = 0;
30 u32 ret = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
31
32 xstate_bv &= XFEATURE_MASK_EXTEND;
33 while (xstate_bv) {
34 if (xstate_bv & 0x1) {
35 u32 eax, ebx, ecx, edx, offset;
36 cpuid_count(0xD, feature_bit, &eax, &ebx, &ecx, &edx);
37 offset = compacted ? ret : ebx;
38 ret = max(ret, offset + eax);
39 }
40
41 xstate_bv >>= 1;
42 feature_bit++;
43 }
44
45 return ret;
46 }
47
48 bool kvm_mpx_supported(void)
49 {
50 return ((host_xcr0 & (XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR))
51 && kvm_x86_ops->mpx_supported());
52 }
53 EXPORT_SYMBOL_GPL(kvm_mpx_supported);
54
55 u64 kvm_supported_xcr0(void)
56 {
57 u64 xcr0 = KVM_SUPPORTED_XCR0 & host_xcr0;
58
59 if (!kvm_mpx_supported())
60 xcr0 &= ~(XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR);
61
62 return xcr0;
63 }
64
65 #define F(x) bit(X86_FEATURE_##x)
66
67 int kvm_update_cpuid(struct kvm_vcpu *vcpu)
68 {
69 struct kvm_cpuid_entry2 *best;
70 struct kvm_lapic *apic = vcpu->arch.apic;
71
72 best = kvm_find_cpuid_entry(vcpu, 1, 0);
73 if (!best)
74 return 0;
75
76
77 if (boot_cpu_has(X86_FEATURE_XSAVE) && best->function == 0x1) {
78 best->ecx &= ~F(OSXSAVE);
79 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
80 best->ecx |= F(OSXSAVE);
81 }
82
83 best->edx &= ~F(APIC);
84 if (vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE)
85 best->edx |= F(APIC);
86
87 if (apic) {
88 if (best->ecx & F(TSC_DEADLINE_TIMER))
89 apic->lapic_timer.timer_mode_mask = 3 << 17;
90 else
91 apic->lapic_timer.timer_mode_mask = 1 << 17;
92 }
93
94 best = kvm_find_cpuid_entry(vcpu, 7, 0);
95 if (best) {
96
97 if (boot_cpu_has(X86_FEATURE_PKU) && best->function == 0x7) {
98 best->ecx &= ~F(OSPKE);
99 if (kvm_read_cr4_bits(vcpu, X86_CR4_PKE))
100 best->ecx |= F(OSPKE);
101 }
102 }
103
104 best = kvm_find_cpuid_entry(vcpu, 0xD, 0);
105 if (!best) {
106 vcpu->arch.guest_supported_xcr0 = 0;
107 vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
108 } else {
109 vcpu->arch.guest_supported_xcr0 =
110 (best->eax | ((u64)best->edx << 32)) &
111 kvm_supported_xcr0();
112 vcpu->arch.guest_xstate_size = best->ebx =
113 xstate_required_size(vcpu->arch.xcr0, false);
114 }
115
116 best = kvm_find_cpuid_entry(vcpu, 0xD, 1);
117 if (best && (best->eax & (F(XSAVES) | F(XSAVEC))))
118 best->ebx = xstate_required_size(vcpu->arch.xcr0, true);
119
120
121
122
123
124 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
125 if (best) {
126 int vaddr_bits = (best->eax & 0xff00) >> 8;
127
128 if (vaddr_bits != 48 && vaddr_bits != 57 && vaddr_bits != 0)
129 return -EINVAL;
130 }
131
132 best = kvm_find_cpuid_entry(vcpu, KVM_CPUID_FEATURES, 0);
133 if (kvm_hlt_in_guest(vcpu->kvm) && best &&
134 (best->eax & (1 << KVM_FEATURE_PV_UNHALT)))
135 best->eax &= ~(1 << KVM_FEATURE_PV_UNHALT);
136
137 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT)) {
138 best = kvm_find_cpuid_entry(vcpu, 0x1, 0);
139 if (best) {
140 if (vcpu->arch.ia32_misc_enable_msr & MSR_IA32_MISC_ENABLE_MWAIT)
141 best->ecx |= F(MWAIT);
142 else
143 best->ecx &= ~F(MWAIT);
144 }
145 }
146
147
148 vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
149 kvm_mmu_reset_context(vcpu);
150
151 kvm_pmu_refresh(vcpu);
152 return 0;
153 }
154
155 static int is_efer_nx(void)
156 {
157 unsigned long long efer = 0;
158
159 rdmsrl_safe(MSR_EFER, &efer);
160 return efer & EFER_NX;
161 }
162
163 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
164 {
165 int i;
166 struct kvm_cpuid_entry2 *e, *entry;
167
168 entry = NULL;
169 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
170 e = &vcpu->arch.cpuid_entries[i];
171 if (e->function == 0x80000001) {
172 entry = e;
173 break;
174 }
175 }
176 if (entry && (entry->edx & F(NX)) && !is_efer_nx()) {
177 entry->edx &= ~F(NX);
178 printk(KERN_INFO "kvm: guest NX capability removed\n");
179 }
180 }
181
182 int cpuid_query_maxphyaddr(struct kvm_vcpu *vcpu)
183 {
184 struct kvm_cpuid_entry2 *best;
185
186 best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
187 if (!best || best->eax < 0x80000008)
188 goto not_found;
189 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
190 if (best)
191 return best->eax & 0xff;
192 not_found:
193 return 36;
194 }
195 EXPORT_SYMBOL_GPL(cpuid_query_maxphyaddr);
196
197
198 int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
199 struct kvm_cpuid *cpuid,
200 struct kvm_cpuid_entry __user *entries)
201 {
202 int r, i;
203 struct kvm_cpuid_entry *cpuid_entries = NULL;
204
205 r = -E2BIG;
206 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
207 goto out;
208 r = -ENOMEM;
209 if (cpuid->nent) {
210 cpuid_entries =
211 vmalloc(array_size(sizeof(struct kvm_cpuid_entry),
212 cpuid->nent));
213 if (!cpuid_entries)
214 goto out;
215 r = -EFAULT;
216 if (copy_from_user(cpuid_entries, entries,
217 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
218 goto out;
219 }
220 for (i = 0; i < cpuid->nent; i++) {
221 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
222 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
223 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
224 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
225 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
226 vcpu->arch.cpuid_entries[i].index = 0;
227 vcpu->arch.cpuid_entries[i].flags = 0;
228 vcpu->arch.cpuid_entries[i].padding[0] = 0;
229 vcpu->arch.cpuid_entries[i].padding[1] = 0;
230 vcpu->arch.cpuid_entries[i].padding[2] = 0;
231 }
232 vcpu->arch.cpuid_nent = cpuid->nent;
233 cpuid_fix_nx_cap(vcpu);
234 kvm_apic_set_version(vcpu);
235 kvm_x86_ops->cpuid_update(vcpu);
236 r = kvm_update_cpuid(vcpu);
237
238 out:
239 vfree(cpuid_entries);
240 return r;
241 }
242
243 int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
244 struct kvm_cpuid2 *cpuid,
245 struct kvm_cpuid_entry2 __user *entries)
246 {
247 int r;
248
249 r = -E2BIG;
250 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
251 goto out;
252 r = -EFAULT;
253 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
254 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
255 goto out;
256 vcpu->arch.cpuid_nent = cpuid->nent;
257 kvm_apic_set_version(vcpu);
258 kvm_x86_ops->cpuid_update(vcpu);
259 r = kvm_update_cpuid(vcpu);
260 out:
261 return r;
262 }
263
264 int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
265 struct kvm_cpuid2 *cpuid,
266 struct kvm_cpuid_entry2 __user *entries)
267 {
268 int r;
269
270 r = -E2BIG;
271 if (cpuid->nent < vcpu->arch.cpuid_nent)
272 goto out;
273 r = -EFAULT;
274 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
275 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
276 goto out;
277 return 0;
278
279 out:
280 cpuid->nent = vcpu->arch.cpuid_nent;
281 return r;
282 }
283
284 static void cpuid_mask(u32 *word, int wordnum)
285 {
286 *word &= boot_cpu_data.x86_capability[wordnum];
287 }
288
289 static void do_host_cpuid(struct kvm_cpuid_entry2 *entry, u32 function,
290 u32 index)
291 {
292 entry->function = function;
293 entry->index = index;
294 entry->flags = 0;
295
296 cpuid_count(entry->function, entry->index,
297 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
298
299 switch (function) {
300 case 2:
301 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
302 break;
303 case 4:
304 case 7:
305 case 0xb:
306 case 0xd:
307 case 0xf:
308 case 0x10:
309 case 0x12:
310 case 0x14:
311 case 0x17:
312 case 0x18:
313 case 0x1f:
314 case 0x8000001d:
315 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
316 break;
317 }
318 }
319
320 static int __do_cpuid_func_emulated(struct kvm_cpuid_entry2 *entry,
321 u32 func, int *nent, int maxnent)
322 {
323 entry->function = func;
324 entry->index = 0;
325 entry->flags = 0;
326
327 switch (func) {
328 case 0:
329 entry->eax = 7;
330 ++*nent;
331 break;
332 case 1:
333 entry->ecx = F(MOVBE);
334 ++*nent;
335 break;
336 case 7:
337 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
338 entry->eax = 0;
339 entry->ecx = F(RDPID);
340 ++*nent;
341 default:
342 break;
343 }
344
345 return 0;
346 }
347
348 static inline void do_cpuid_7_mask(struct kvm_cpuid_entry2 *entry, int index)
349 {
350 unsigned f_invpcid = kvm_x86_ops->invpcid_supported() ? F(INVPCID) : 0;
351 unsigned f_mpx = kvm_mpx_supported() ? F(MPX) : 0;
352 unsigned f_umip = kvm_x86_ops->umip_emulated() ? F(UMIP) : 0;
353 unsigned f_intel_pt = kvm_x86_ops->pt_supported() ? F(INTEL_PT) : 0;
354 unsigned f_la57;
355 unsigned f_pku = kvm_x86_ops->pku_supported() ? F(PKU) : 0;
356
357
358 const u32 kvm_cpuid_7_0_ebx_x86_features =
359 F(FSGSBASE) | F(BMI1) | F(HLE) | F(AVX2) | F(SMEP) |
360 F(BMI2) | F(ERMS) | f_invpcid | F(RTM) | f_mpx | F(RDSEED) |
361 F(ADX) | F(SMAP) | F(AVX512IFMA) | F(AVX512F) | F(AVX512PF) |
362 F(AVX512ER) | F(AVX512CD) | F(CLFLUSHOPT) | F(CLWB) | F(AVX512DQ) |
363 F(SHA_NI) | F(AVX512BW) | F(AVX512VL) | f_intel_pt;
364
365
366 const u32 kvm_cpuid_7_0_ecx_x86_features =
367 F(AVX512VBMI) | F(LA57) | 0 | 0 | F(RDPID) |
368 F(AVX512_VPOPCNTDQ) | F(UMIP) | F(AVX512_VBMI2) | F(GFNI) |
369 F(VAES) | F(VPCLMULQDQ) | F(AVX512_VNNI) | F(AVX512_BITALG) |
370 F(CLDEMOTE) | F(MOVDIRI) | F(MOVDIR64B) | 0 ;
371
372
373 const u32 kvm_cpuid_7_0_edx_x86_features =
374 F(AVX512_4VNNIW) | F(AVX512_4FMAPS) | F(SPEC_CTRL) |
375 F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(INTEL_STIBP) |
376 F(MD_CLEAR);
377
378
379 const u32 kvm_cpuid_7_1_eax_x86_features =
380 F(AVX512_BF16);
381
382 switch (index) {
383 case 0:
384 entry->eax = min(entry->eax, 1u);
385 entry->ebx &= kvm_cpuid_7_0_ebx_x86_features;
386 cpuid_mask(&entry->ebx, CPUID_7_0_EBX);
387
388 entry->ebx |= F(TSC_ADJUST);
389
390 entry->ecx &= kvm_cpuid_7_0_ecx_x86_features;
391 f_la57 = entry->ecx & F(LA57);
392 cpuid_mask(&entry->ecx, CPUID_7_ECX);
393
394 entry->ecx |= f_la57;
395 entry->ecx |= f_umip;
396 entry->ecx |= f_pku;
397
398 if (!tdp_enabled || !boot_cpu_has(X86_FEATURE_OSPKE))
399 entry->ecx &= ~F(PKU);
400
401 entry->edx &= kvm_cpuid_7_0_edx_x86_features;
402 cpuid_mask(&entry->edx, CPUID_7_EDX);
403 if (boot_cpu_has(X86_FEATURE_IBPB) && boot_cpu_has(X86_FEATURE_IBRS))
404 entry->edx |= F(SPEC_CTRL);
405 if (boot_cpu_has(X86_FEATURE_STIBP))
406 entry->edx |= F(INTEL_STIBP);
407 if (boot_cpu_has(X86_FEATURE_SPEC_CTRL_SSBD) ||
408 boot_cpu_has(X86_FEATURE_AMD_SSBD))
409 entry->edx |= F(SPEC_CTRL_SSBD);
410
411
412
413
414 entry->edx |= F(ARCH_CAPABILITIES);
415 break;
416 case 1:
417 entry->eax &= kvm_cpuid_7_1_eax_x86_features;
418 entry->ebx = 0;
419 entry->ecx = 0;
420 entry->edx = 0;
421 break;
422 default:
423 WARN_ON_ONCE(1);
424 entry->eax = 0;
425 entry->ebx = 0;
426 entry->ecx = 0;
427 entry->edx = 0;
428 break;
429 }
430 }
431
432 static inline int __do_cpuid_func(struct kvm_cpuid_entry2 *entry, u32 function,
433 int *nent, int maxnent)
434 {
435 int r;
436 unsigned f_nx = is_efer_nx() ? F(NX) : 0;
437 #ifdef CONFIG_X86_64
438 unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
439 ? F(GBPAGES) : 0;
440 unsigned f_lm = F(LM);
441 #else
442 unsigned f_gbpages = 0;
443 unsigned f_lm = 0;
444 #endif
445 unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
446 unsigned f_xsaves = kvm_x86_ops->xsaves_supported() ? F(XSAVES) : 0;
447 unsigned f_intel_pt = kvm_x86_ops->pt_supported() ? F(INTEL_PT) : 0;
448
449
450 const u32 kvm_cpuid_1_edx_x86_features =
451 F(FPU) | F(VME) | F(DE) | F(PSE) |
452 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
453 F(CX8) | F(APIC) | 0 | F(SEP) |
454 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
455 F(PAT) | F(PSE36) | 0 | F(CLFLUSH) |
456 0 | F(MMX) |
457 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
458 0 ;
459
460 const u32 kvm_cpuid_8000_0001_edx_x86_features =
461 F(FPU) | F(VME) | F(DE) | F(PSE) |
462 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
463 F(CX8) | F(APIC) | 0 | F(SYSCALL) |
464 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
465 F(PAT) | F(PSE36) | 0 |
466 f_nx | 0 | F(MMXEXT) | F(MMX) |
467 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
468 0 | f_lm | F(3DNOWEXT) | F(3DNOW);
469
470 const u32 kvm_cpuid_1_ecx_x86_features =
471
472
473 F(XMM3) | F(PCLMULQDQ) | 0 |
474 0 |
475 0 | F(SSSE3) | 0 | 0 |
476 F(FMA) | F(CX16) | 0 |
477 F(PCID) | 0 | F(XMM4_1) |
478 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
479 0 | F(AES) | F(XSAVE) | 0 | F(AVX) |
480 F(F16C) | F(RDRAND);
481
482 const u32 kvm_cpuid_8000_0001_ecx_x86_features =
483 F(LAHF_LM) | F(CMP_LEGACY) | 0 | 0 |
484 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
485 F(3DNOWPREFETCH) | F(OSVW) | 0 | F(XOP) |
486 0 | F(FMA4) | F(TBM) |
487 F(TOPOEXT) | F(PERFCTR_CORE);
488
489
490 const u32 kvm_cpuid_8000_0008_ebx_x86_features =
491 F(CLZERO) | F(XSAVEERPTR) |
492 F(WBNOINVD) | F(AMD_IBPB) | F(AMD_IBRS) | F(AMD_SSBD) | F(VIRT_SSBD) |
493 F(AMD_SSB_NO) | F(AMD_STIBP) | F(AMD_STIBP_ALWAYS_ON);
494
495
496 const u32 kvm_cpuid_C000_0001_edx_x86_features =
497 F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) |
498 F(ACE2) | F(ACE2_EN) | F(PHE) | F(PHE_EN) |
499 F(PMM) | F(PMM_EN);
500
501
502 const u32 kvm_cpuid_D_1_eax_x86_features =
503 F(XSAVEOPT) | F(XSAVEC) | F(XGETBV1) | f_xsaves;
504
505
506 get_cpu();
507
508 r = -E2BIG;
509
510 if (WARN_ON(*nent >= maxnent))
511 goto out;
512
513 do_host_cpuid(entry, function, 0);
514 ++*nent;
515
516 switch (function) {
517 case 0:
518
519 entry->eax = min(entry->eax, 0x1fU);
520 break;
521 case 1:
522 entry->edx &= kvm_cpuid_1_edx_x86_features;
523 cpuid_mask(&entry->edx, CPUID_1_EDX);
524 entry->ecx &= kvm_cpuid_1_ecx_x86_features;
525 cpuid_mask(&entry->ecx, CPUID_1_ECX);
526
527
528 entry->ecx |= F(X2APIC);
529 break;
530
531
532
533
534 case 2: {
535 int t, times = entry->eax & 0xff;
536
537 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
538 for (t = 1; t < times; ++t) {
539 if (*nent >= maxnent)
540 goto out;
541
542 do_host_cpuid(&entry[t], function, 0);
543 ++*nent;
544 }
545 break;
546 }
547
548 case 4:
549 case 0x8000001d: {
550 int i, cache_type;
551
552
553 for (i = 1; ; ++i) {
554 if (*nent >= maxnent)
555 goto out;
556
557 cache_type = entry[i - 1].eax & 0x1f;
558 if (!cache_type)
559 break;
560 do_host_cpuid(&entry[i], function, i);
561 ++*nent;
562 }
563 break;
564 }
565 case 6:
566 entry->eax = 0x4;
567 entry->ebx = 0;
568 entry->ecx = 0;
569 entry->edx = 0;
570 break;
571
572 case 7: {
573 int i;
574
575 for (i = 0; ; ) {
576 do_cpuid_7_mask(&entry[i], i);
577 if (i == entry->eax)
578 break;
579 if (*nent >= maxnent)
580 goto out;
581
582 ++i;
583 do_host_cpuid(&entry[i], function, i);
584 ++*nent;
585 }
586 break;
587 }
588 case 9:
589 break;
590 case 0xa: {
591 struct x86_pmu_capability cap;
592 union cpuid10_eax eax;
593 union cpuid10_edx edx;
594
595 perf_get_x86_pmu_capability(&cap);
596
597
598
599
600
601 if (!cap.version)
602 memset(&cap, 0, sizeof(cap));
603
604 eax.split.version_id = min(cap.version, 2);
605 eax.split.num_counters = cap.num_counters_gp;
606 eax.split.bit_width = cap.bit_width_gp;
607 eax.split.mask_length = cap.events_mask_len;
608
609 edx.split.num_counters_fixed = cap.num_counters_fixed;
610 edx.split.bit_width_fixed = cap.bit_width_fixed;
611 edx.split.reserved = 0;
612
613 entry->eax = eax.full;
614 entry->ebx = cap.events_mask;
615 entry->ecx = 0;
616 entry->edx = edx.full;
617 break;
618 }
619
620
621
622
623 case 0x1f:
624 case 0xb: {
625 int i;
626
627
628
629
630
631
632
633
634
635 for (i = 1; entry[i - 1].ecx & 0xff00; ++i) {
636 if (*nent >= maxnent)
637 goto out;
638
639 do_host_cpuid(&entry[i], function, i);
640 ++*nent;
641 }
642 break;
643 }
644 case 0xd: {
645 int idx, i;
646 u64 supported = kvm_supported_xcr0();
647
648 entry->eax &= supported;
649 entry->ebx = xstate_required_size(supported, false);
650 entry->ecx = entry->ebx;
651 entry->edx &= supported >> 32;
652 if (!supported)
653 break;
654
655 for (idx = 1, i = 1; idx < 64; ++idx) {
656 u64 mask = ((u64)1 << idx);
657 if (*nent >= maxnent)
658 goto out;
659
660 do_host_cpuid(&entry[i], function, idx);
661 if (idx == 1) {
662 entry[i].eax &= kvm_cpuid_D_1_eax_x86_features;
663 cpuid_mask(&entry[i].eax, CPUID_D_1_EAX);
664 entry[i].ebx = 0;
665 if (entry[i].eax & (F(XSAVES)|F(XSAVEC)))
666 entry[i].ebx =
667 xstate_required_size(supported,
668 true);
669 } else {
670 if (entry[i].eax == 0 || !(supported & mask))
671 continue;
672 if (WARN_ON_ONCE(entry[i].ecx & 1))
673 continue;
674 }
675 entry[i].ecx = 0;
676 entry[i].edx = 0;
677 ++*nent;
678 ++i;
679 }
680 break;
681 }
682
683 case 0x14: {
684 int t, times = entry->eax;
685
686 if (!f_intel_pt)
687 break;
688
689 for (t = 1; t <= times; ++t) {
690 if (*nent >= maxnent)
691 goto out;
692 do_host_cpuid(&entry[t], function, t);
693 ++*nent;
694 }
695 break;
696 }
697 case KVM_CPUID_SIGNATURE: {
698 static const char signature[12] = "KVMKVMKVM\0\0";
699 const u32 *sigptr = (const u32 *)signature;
700 entry->eax = KVM_CPUID_FEATURES;
701 entry->ebx = sigptr[0];
702 entry->ecx = sigptr[1];
703 entry->edx = sigptr[2];
704 break;
705 }
706 case KVM_CPUID_FEATURES:
707 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
708 (1 << KVM_FEATURE_NOP_IO_DELAY) |
709 (1 << KVM_FEATURE_CLOCKSOURCE2) |
710 (1 << KVM_FEATURE_ASYNC_PF) |
711 (1 << KVM_FEATURE_PV_EOI) |
712 (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT) |
713 (1 << KVM_FEATURE_PV_UNHALT) |
714 (1 << KVM_FEATURE_PV_TLB_FLUSH) |
715 (1 << KVM_FEATURE_ASYNC_PF_VMEXIT) |
716 (1 << KVM_FEATURE_PV_SEND_IPI) |
717 (1 << KVM_FEATURE_POLL_CONTROL) |
718 (1 << KVM_FEATURE_PV_SCHED_YIELD);
719
720 if (sched_info_on())
721 entry->eax |= (1 << KVM_FEATURE_STEAL_TIME);
722
723 entry->ebx = 0;
724 entry->ecx = 0;
725 entry->edx = 0;
726 break;
727 case 0x80000000:
728 entry->eax = min(entry->eax, 0x8000001f);
729 break;
730 case 0x80000001:
731 entry->edx &= kvm_cpuid_8000_0001_edx_x86_features;
732 cpuid_mask(&entry->edx, CPUID_8000_0001_EDX);
733 entry->ecx &= kvm_cpuid_8000_0001_ecx_x86_features;
734 cpuid_mask(&entry->ecx, CPUID_8000_0001_ECX);
735 break;
736 case 0x80000007:
737
738 entry->edx &= (1 << 8);
739
740 entry->edx &= boot_cpu_data.x86_power;
741 entry->eax = entry->ebx = entry->ecx = 0;
742 break;
743 case 0x80000008: {
744 unsigned g_phys_as = (entry->eax >> 16) & 0xff;
745 unsigned virt_as = max((entry->eax >> 8) & 0xff, 48U);
746 unsigned phys_as = entry->eax & 0xff;
747
748 if (!g_phys_as)
749 g_phys_as = phys_as;
750 entry->eax = g_phys_as | (virt_as << 8);
751 entry->edx = 0;
752 entry->ebx &= kvm_cpuid_8000_0008_ebx_x86_features;
753 cpuid_mask(&entry->ebx, CPUID_8000_0008_EBX);
754
755
756
757
758
759 if (boot_cpu_has(X86_FEATURE_IBPB))
760 entry->ebx |= F(AMD_IBPB);
761 if (boot_cpu_has(X86_FEATURE_IBRS))
762 entry->ebx |= F(AMD_IBRS);
763 if (boot_cpu_has(X86_FEATURE_STIBP))
764 entry->ebx |= F(AMD_STIBP);
765 if (boot_cpu_has(X86_FEATURE_SPEC_CTRL_SSBD) ||
766 boot_cpu_has(X86_FEATURE_AMD_SSBD))
767 entry->ebx |= F(AMD_SSBD);
768 if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
769 entry->ebx |= F(AMD_SSB_NO);
770
771
772
773
774 if (boot_cpu_has(X86_FEATURE_LS_CFG_SSBD) &&
775 !boot_cpu_has(X86_FEATURE_AMD_SSBD))
776 entry->ebx |= F(VIRT_SSBD);
777 break;
778 }
779 case 0x80000019:
780 entry->ecx = entry->edx = 0;
781 break;
782 case 0x8000001a:
783 case 0x8000001e:
784 break;
785
786 case 0xC0000000:
787
788 entry->eax = min(entry->eax, 0xC0000004);
789 break;
790 case 0xC0000001:
791 entry->edx &= kvm_cpuid_C000_0001_edx_x86_features;
792 cpuid_mask(&entry->edx, CPUID_C000_0001_EDX);
793 break;
794 case 3:
795 case 5:
796 case 0xC0000002:
797 case 0xC0000003:
798 case 0xC0000004:
799 default:
800 entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
801 break;
802 }
803
804 kvm_x86_ops->set_supported_cpuid(function, entry);
805
806 r = 0;
807
808 out:
809 put_cpu();
810
811 return r;
812 }
813
814 static int do_cpuid_func(struct kvm_cpuid_entry2 *entry, u32 func,
815 int *nent, int maxnent, unsigned int type)
816 {
817 if (*nent >= maxnent)
818 return -E2BIG;
819
820 if (type == KVM_GET_EMULATED_CPUID)
821 return __do_cpuid_func_emulated(entry, func, nent, maxnent);
822
823 return __do_cpuid_func(entry, func, nent, maxnent);
824 }
825
826 #undef F
827
828 struct kvm_cpuid_param {
829 u32 func;
830 bool (*qualifier)(const struct kvm_cpuid_param *param);
831 };
832
833 static bool is_centaur_cpu(const struct kvm_cpuid_param *param)
834 {
835 return boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR;
836 }
837
838 static bool sanity_check_entries(struct kvm_cpuid_entry2 __user *entries,
839 __u32 num_entries, unsigned int ioctl_type)
840 {
841 int i;
842 __u32 pad[3];
843
844 if (ioctl_type != KVM_GET_EMULATED_CPUID)
845 return false;
846
847
848
849
850
851
852
853
854
855 for (i = 0; i < num_entries; i++) {
856 if (copy_from_user(pad, entries[i].padding, sizeof(pad)))
857 return true;
858
859 if (pad[0] || pad[1] || pad[2])
860 return true;
861 }
862 return false;
863 }
864
865 int kvm_dev_ioctl_get_cpuid(struct kvm_cpuid2 *cpuid,
866 struct kvm_cpuid_entry2 __user *entries,
867 unsigned int type)
868 {
869 struct kvm_cpuid_entry2 *cpuid_entries;
870 int limit, nent = 0, r = -E2BIG, i;
871 u32 func;
872 static const struct kvm_cpuid_param param[] = {
873 { .func = 0 },
874 { .func = 0x80000000 },
875 { .func = 0xC0000000, .qualifier = is_centaur_cpu },
876 { .func = KVM_CPUID_SIGNATURE },
877 };
878
879 if (cpuid->nent < 1)
880 goto out;
881 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
882 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
883
884 if (sanity_check_entries(entries, cpuid->nent, type))
885 return -EINVAL;
886
887 r = -ENOMEM;
888 cpuid_entries = vzalloc(array_size(sizeof(struct kvm_cpuid_entry2),
889 cpuid->nent));
890 if (!cpuid_entries)
891 goto out;
892
893 r = 0;
894 for (i = 0; i < ARRAY_SIZE(param); i++) {
895 const struct kvm_cpuid_param *ent = ¶m[i];
896
897 if (ent->qualifier && !ent->qualifier(ent))
898 continue;
899
900 r = do_cpuid_func(&cpuid_entries[nent], ent->func,
901 &nent, cpuid->nent, type);
902
903 if (r)
904 goto out_free;
905
906 limit = cpuid_entries[nent - 1].eax;
907 for (func = ent->func + 1; func <= limit && nent < cpuid->nent && r == 0; ++func)
908 r = do_cpuid_func(&cpuid_entries[nent], func,
909 &nent, cpuid->nent, type);
910
911 if (r)
912 goto out_free;
913 }
914
915 r = -EFAULT;
916 if (copy_to_user(entries, cpuid_entries,
917 nent * sizeof(struct kvm_cpuid_entry2)))
918 goto out_free;
919 cpuid->nent = nent;
920 r = 0;
921
922 out_free:
923 vfree(cpuid_entries);
924 out:
925 return r;
926 }
927
928 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
929 {
930 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
931 struct kvm_cpuid_entry2 *ej;
932 int j = i;
933 int nent = vcpu->arch.cpuid_nent;
934
935 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
936
937 do {
938 j = (j + 1) % nent;
939 ej = &vcpu->arch.cpuid_entries[j];
940 } while (ej->function != e->function);
941
942 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
943
944 return j;
945 }
946
947
948
949 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
950 u32 function, u32 index)
951 {
952 if (e->function != function)
953 return 0;
954 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
955 return 0;
956 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
957 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
958 return 0;
959 return 1;
960 }
961
962 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
963 u32 function, u32 index)
964 {
965 int i;
966 struct kvm_cpuid_entry2 *best = NULL;
967
968 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
969 struct kvm_cpuid_entry2 *e;
970
971 e = &vcpu->arch.cpuid_entries[i];
972 if (is_matching_cpuid_entry(e, function, index)) {
973 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
974 move_to_next_stateful_cpuid_entry(vcpu, i);
975 best = e;
976 break;
977 }
978 }
979 return best;
980 }
981 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
982
983
984
985
986
987
988 static bool cpuid_function_in_range(struct kvm_vcpu *vcpu, u32 function)
989 {
990 struct kvm_cpuid_entry2 *max;
991
992 max = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0);
993 return max && function <= max->eax;
994 }
995
996 bool kvm_cpuid(struct kvm_vcpu *vcpu, u32 *eax, u32 *ebx,
997 u32 *ecx, u32 *edx, bool check_limit)
998 {
999 u32 function = *eax, index = *ecx;
1000 struct kvm_cpuid_entry2 *entry;
1001 struct kvm_cpuid_entry2 *max;
1002 bool found;
1003
1004 entry = kvm_find_cpuid_entry(vcpu, function, index);
1005 found = entry;
1006
1007
1008
1009
1010
1011
1012 if (!entry && check_limit && !guest_cpuid_is_amd(vcpu) &&
1013 !cpuid_function_in_range(vcpu, function)) {
1014 max = kvm_find_cpuid_entry(vcpu, 0, 0);
1015 if (max) {
1016 function = max->eax;
1017 entry = kvm_find_cpuid_entry(vcpu, function, index);
1018 }
1019 }
1020 if (entry) {
1021 *eax = entry->eax;
1022 *ebx = entry->ebx;
1023 *ecx = entry->ecx;
1024 *edx = entry->edx;
1025 } else {
1026 *eax = *ebx = *ecx = *edx = 0;
1027
1028
1029
1030
1031
1032
1033
1034 if (function == 0xb || function == 0x1f) {
1035 entry = kvm_find_cpuid_entry(vcpu, function, 1);
1036 if (entry) {
1037 *ecx = index & 0xff;
1038 *edx = entry->edx;
1039 }
1040 }
1041 }
1042 trace_kvm_cpuid(function, *eax, *ebx, *ecx, *edx, found);
1043 return found;
1044 }
1045 EXPORT_SYMBOL_GPL(kvm_cpuid);
1046
1047 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
1048 {
1049 u32 eax, ebx, ecx, edx;
1050
1051 if (cpuid_fault_enabled(vcpu) && !kvm_require_cpl(vcpu, 0))
1052 return 1;
1053
1054 eax = kvm_rax_read(vcpu);
1055 ecx = kvm_rcx_read(vcpu);
1056 kvm_cpuid(vcpu, &eax, &ebx, &ecx, &edx, true);
1057 kvm_rax_write(vcpu, eax);
1058 kvm_rbx_write(vcpu, ebx);
1059 kvm_rcx_write(vcpu, ecx);
1060 kvm_rdx_write(vcpu, edx);
1061 return kvm_skip_emulated_instruction(vcpu);
1062 }
1063 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);