root/arch/x86/kvm/vmx/vmcs12.h

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INCLUDED FROM


DEFINITIONS

This source file includes following definitions.
  1. vmx_check_vmcs12_offsets
  2. vmcs_field_to_offset
  3. vmcs12_read_any
  4. vmcs12_write_any

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef __KVM_X86_VMX_VMCS12_H
   3 #define __KVM_X86_VMX_VMCS12_H
   4 
   5 #include <linux/build_bug.h>
   6 
   7 #include "vmcs.h"
   8 
   9 /*
  10  * struct vmcs12 describes the state that our guest hypervisor (L1) keeps for a
  11  * single nested guest (L2), hence the name vmcs12. Any VMX implementation has
  12  * a VMCS structure, and vmcs12 is our emulated VMX's VMCS. This structure is
  13  * stored in guest memory specified by VMPTRLD, but is opaque to the guest,
  14  * which must access it using VMREAD/VMWRITE/VMCLEAR instructions.
  15  * More than one of these structures may exist, if L1 runs multiple L2 guests.
  16  * nested_vmx_run() will use the data here to build the vmcs02: a VMCS for the
  17  * underlying hardware which will be used to run L2.
  18  * This structure is packed to ensure that its layout is identical across
  19  * machines (necessary for live migration).
  20  *
  21  * IMPORTANT: Changing the layout of existing fields in this structure
  22  * will break save/restore compatibility with older kvm releases. When
  23  * adding new fields, either use space in the reserved padding* arrays
  24  * or add the new fields to the end of the structure.
  25  */
  26 typedef u64 natural_width;
  27 struct __packed vmcs12 {
  28         /* According to the Intel spec, a VMCS region must start with the
  29          * following two fields. Then follow implementation-specific data.
  30          */
  31         struct vmcs_hdr hdr;
  32         u32 abort;
  33 
  34         u32 launch_state; /* set to 0 by VMCLEAR, to 1 by VMLAUNCH */
  35         u32 padding[7]; /* room for future expansion */
  36 
  37         u64 io_bitmap_a;
  38         u64 io_bitmap_b;
  39         u64 msr_bitmap;
  40         u64 vm_exit_msr_store_addr;
  41         u64 vm_exit_msr_load_addr;
  42         u64 vm_entry_msr_load_addr;
  43         u64 tsc_offset;
  44         u64 virtual_apic_page_addr;
  45         u64 apic_access_addr;
  46         u64 posted_intr_desc_addr;
  47         u64 ept_pointer;
  48         u64 eoi_exit_bitmap0;
  49         u64 eoi_exit_bitmap1;
  50         u64 eoi_exit_bitmap2;
  51         u64 eoi_exit_bitmap3;
  52         u64 xss_exit_bitmap;
  53         u64 guest_physical_address;
  54         u64 vmcs_link_pointer;
  55         u64 guest_ia32_debugctl;
  56         u64 guest_ia32_pat;
  57         u64 guest_ia32_efer;
  58         u64 guest_ia32_perf_global_ctrl;
  59         u64 guest_pdptr0;
  60         u64 guest_pdptr1;
  61         u64 guest_pdptr2;
  62         u64 guest_pdptr3;
  63         u64 guest_bndcfgs;
  64         u64 host_ia32_pat;
  65         u64 host_ia32_efer;
  66         u64 host_ia32_perf_global_ctrl;
  67         u64 vmread_bitmap;
  68         u64 vmwrite_bitmap;
  69         u64 vm_function_control;
  70         u64 eptp_list_address;
  71         u64 pml_address;
  72         u64 padding64[3]; /* room for future expansion */
  73         /*
  74          * To allow migration of L1 (complete with its L2 guests) between
  75          * machines of different natural widths (32 or 64 bit), we cannot have
  76          * unsigned long fields with no explicit size. We use u64 (aliased
  77          * natural_width) instead. Luckily, x86 is little-endian.
  78          */
  79         natural_width cr0_guest_host_mask;
  80         natural_width cr4_guest_host_mask;
  81         natural_width cr0_read_shadow;
  82         natural_width cr4_read_shadow;
  83         natural_width cr3_target_value0;
  84         natural_width cr3_target_value1;
  85         natural_width cr3_target_value2;
  86         natural_width cr3_target_value3;
  87         natural_width exit_qualification;
  88         natural_width guest_linear_address;
  89         natural_width guest_cr0;
  90         natural_width guest_cr3;
  91         natural_width guest_cr4;
  92         natural_width guest_es_base;
  93         natural_width guest_cs_base;
  94         natural_width guest_ss_base;
  95         natural_width guest_ds_base;
  96         natural_width guest_fs_base;
  97         natural_width guest_gs_base;
  98         natural_width guest_ldtr_base;
  99         natural_width guest_tr_base;
 100         natural_width guest_gdtr_base;
 101         natural_width guest_idtr_base;
 102         natural_width guest_dr7;
 103         natural_width guest_rsp;
 104         natural_width guest_rip;
 105         natural_width guest_rflags;
 106         natural_width guest_pending_dbg_exceptions;
 107         natural_width guest_sysenter_esp;
 108         natural_width guest_sysenter_eip;
 109         natural_width host_cr0;
 110         natural_width host_cr3;
 111         natural_width host_cr4;
 112         natural_width host_fs_base;
 113         natural_width host_gs_base;
 114         natural_width host_tr_base;
 115         natural_width host_gdtr_base;
 116         natural_width host_idtr_base;
 117         natural_width host_ia32_sysenter_esp;
 118         natural_width host_ia32_sysenter_eip;
 119         natural_width host_rsp;
 120         natural_width host_rip;
 121         natural_width paddingl[8]; /* room for future expansion */
 122         u32 pin_based_vm_exec_control;
 123         u32 cpu_based_vm_exec_control;
 124         u32 exception_bitmap;
 125         u32 page_fault_error_code_mask;
 126         u32 page_fault_error_code_match;
 127         u32 cr3_target_count;
 128         u32 vm_exit_controls;
 129         u32 vm_exit_msr_store_count;
 130         u32 vm_exit_msr_load_count;
 131         u32 vm_entry_controls;
 132         u32 vm_entry_msr_load_count;
 133         u32 vm_entry_intr_info_field;
 134         u32 vm_entry_exception_error_code;
 135         u32 vm_entry_instruction_len;
 136         u32 tpr_threshold;
 137         u32 secondary_vm_exec_control;
 138         u32 vm_instruction_error;
 139         u32 vm_exit_reason;
 140         u32 vm_exit_intr_info;
 141         u32 vm_exit_intr_error_code;
 142         u32 idt_vectoring_info_field;
 143         u32 idt_vectoring_error_code;
 144         u32 vm_exit_instruction_len;
 145         u32 vmx_instruction_info;
 146         u32 guest_es_limit;
 147         u32 guest_cs_limit;
 148         u32 guest_ss_limit;
 149         u32 guest_ds_limit;
 150         u32 guest_fs_limit;
 151         u32 guest_gs_limit;
 152         u32 guest_ldtr_limit;
 153         u32 guest_tr_limit;
 154         u32 guest_gdtr_limit;
 155         u32 guest_idtr_limit;
 156         u32 guest_es_ar_bytes;
 157         u32 guest_cs_ar_bytes;
 158         u32 guest_ss_ar_bytes;
 159         u32 guest_ds_ar_bytes;
 160         u32 guest_fs_ar_bytes;
 161         u32 guest_gs_ar_bytes;
 162         u32 guest_ldtr_ar_bytes;
 163         u32 guest_tr_ar_bytes;
 164         u32 guest_interruptibility_info;
 165         u32 guest_activity_state;
 166         u32 guest_sysenter_cs;
 167         u32 host_ia32_sysenter_cs;
 168         u32 vmx_preemption_timer_value;
 169         u32 padding32[7]; /* room for future expansion */
 170         u16 virtual_processor_id;
 171         u16 posted_intr_nv;
 172         u16 guest_es_selector;
 173         u16 guest_cs_selector;
 174         u16 guest_ss_selector;
 175         u16 guest_ds_selector;
 176         u16 guest_fs_selector;
 177         u16 guest_gs_selector;
 178         u16 guest_ldtr_selector;
 179         u16 guest_tr_selector;
 180         u16 guest_intr_status;
 181         u16 host_es_selector;
 182         u16 host_cs_selector;
 183         u16 host_ss_selector;
 184         u16 host_ds_selector;
 185         u16 host_fs_selector;
 186         u16 host_gs_selector;
 187         u16 host_tr_selector;
 188         u16 guest_pml_index;
 189 };
 190 
 191 /*
 192  * VMCS12_REVISION is an arbitrary id that should be changed if the content or
 193  * layout of struct vmcs12 is changed. MSR_IA32_VMX_BASIC returns this id, and
 194  * VMPTRLD verifies that the VMCS region that L1 is loading contains this id.
 195  *
 196  * IMPORTANT: Changing this value will break save/restore compatibility with
 197  * older kvm releases.
 198  */
 199 #define VMCS12_REVISION 0x11e57ed0
 200 
 201 /*
 202  * VMCS12_SIZE is the number of bytes L1 should allocate for the VMXON region
 203  * and any VMCS region. Although only sizeof(struct vmcs12) are used by the
 204  * current implementation, 4K are reserved to avoid future complications and
 205  * to preserve userspace ABI.
 206  */
 207 #define VMCS12_SIZE             KVM_STATE_NESTED_VMX_VMCS_SIZE
 208 
 209 /*
 210  * VMCS12_MAX_FIELD_INDEX is the highest index value used in any
 211  * supported VMCS12 field encoding.
 212  */
 213 #define VMCS12_MAX_FIELD_INDEX 0x17
 214 
 215 /*
 216  * For save/restore compatibility, the vmcs12 field offsets must not change.
 217  */
 218 #define CHECK_OFFSET(field, loc)                                \
 219         BUILD_BUG_ON_MSG(offsetof(struct vmcs12, field) != (loc),       \
 220                 "Offset of " #field " in struct vmcs12 has changed.")
 221 
 222 static inline void vmx_check_vmcs12_offsets(void)
 223 {
 224         CHECK_OFFSET(hdr, 0);
 225         CHECK_OFFSET(abort, 4);
 226         CHECK_OFFSET(launch_state, 8);
 227         CHECK_OFFSET(io_bitmap_a, 40);
 228         CHECK_OFFSET(io_bitmap_b, 48);
 229         CHECK_OFFSET(msr_bitmap, 56);
 230         CHECK_OFFSET(vm_exit_msr_store_addr, 64);
 231         CHECK_OFFSET(vm_exit_msr_load_addr, 72);
 232         CHECK_OFFSET(vm_entry_msr_load_addr, 80);
 233         CHECK_OFFSET(tsc_offset, 88);
 234         CHECK_OFFSET(virtual_apic_page_addr, 96);
 235         CHECK_OFFSET(apic_access_addr, 104);
 236         CHECK_OFFSET(posted_intr_desc_addr, 112);
 237         CHECK_OFFSET(ept_pointer, 120);
 238         CHECK_OFFSET(eoi_exit_bitmap0, 128);
 239         CHECK_OFFSET(eoi_exit_bitmap1, 136);
 240         CHECK_OFFSET(eoi_exit_bitmap2, 144);
 241         CHECK_OFFSET(eoi_exit_bitmap3, 152);
 242         CHECK_OFFSET(xss_exit_bitmap, 160);
 243         CHECK_OFFSET(guest_physical_address, 168);
 244         CHECK_OFFSET(vmcs_link_pointer, 176);
 245         CHECK_OFFSET(guest_ia32_debugctl, 184);
 246         CHECK_OFFSET(guest_ia32_pat, 192);
 247         CHECK_OFFSET(guest_ia32_efer, 200);
 248         CHECK_OFFSET(guest_ia32_perf_global_ctrl, 208);
 249         CHECK_OFFSET(guest_pdptr0, 216);
 250         CHECK_OFFSET(guest_pdptr1, 224);
 251         CHECK_OFFSET(guest_pdptr2, 232);
 252         CHECK_OFFSET(guest_pdptr3, 240);
 253         CHECK_OFFSET(guest_bndcfgs, 248);
 254         CHECK_OFFSET(host_ia32_pat, 256);
 255         CHECK_OFFSET(host_ia32_efer, 264);
 256         CHECK_OFFSET(host_ia32_perf_global_ctrl, 272);
 257         CHECK_OFFSET(vmread_bitmap, 280);
 258         CHECK_OFFSET(vmwrite_bitmap, 288);
 259         CHECK_OFFSET(vm_function_control, 296);
 260         CHECK_OFFSET(eptp_list_address, 304);
 261         CHECK_OFFSET(pml_address, 312);
 262         CHECK_OFFSET(cr0_guest_host_mask, 344);
 263         CHECK_OFFSET(cr4_guest_host_mask, 352);
 264         CHECK_OFFSET(cr0_read_shadow, 360);
 265         CHECK_OFFSET(cr4_read_shadow, 368);
 266         CHECK_OFFSET(cr3_target_value0, 376);
 267         CHECK_OFFSET(cr3_target_value1, 384);
 268         CHECK_OFFSET(cr3_target_value2, 392);
 269         CHECK_OFFSET(cr3_target_value3, 400);
 270         CHECK_OFFSET(exit_qualification, 408);
 271         CHECK_OFFSET(guest_linear_address, 416);
 272         CHECK_OFFSET(guest_cr0, 424);
 273         CHECK_OFFSET(guest_cr3, 432);
 274         CHECK_OFFSET(guest_cr4, 440);
 275         CHECK_OFFSET(guest_es_base, 448);
 276         CHECK_OFFSET(guest_cs_base, 456);
 277         CHECK_OFFSET(guest_ss_base, 464);
 278         CHECK_OFFSET(guest_ds_base, 472);
 279         CHECK_OFFSET(guest_fs_base, 480);
 280         CHECK_OFFSET(guest_gs_base, 488);
 281         CHECK_OFFSET(guest_ldtr_base, 496);
 282         CHECK_OFFSET(guest_tr_base, 504);
 283         CHECK_OFFSET(guest_gdtr_base, 512);
 284         CHECK_OFFSET(guest_idtr_base, 520);
 285         CHECK_OFFSET(guest_dr7, 528);
 286         CHECK_OFFSET(guest_rsp, 536);
 287         CHECK_OFFSET(guest_rip, 544);
 288         CHECK_OFFSET(guest_rflags, 552);
 289         CHECK_OFFSET(guest_pending_dbg_exceptions, 560);
 290         CHECK_OFFSET(guest_sysenter_esp, 568);
 291         CHECK_OFFSET(guest_sysenter_eip, 576);
 292         CHECK_OFFSET(host_cr0, 584);
 293         CHECK_OFFSET(host_cr3, 592);
 294         CHECK_OFFSET(host_cr4, 600);
 295         CHECK_OFFSET(host_fs_base, 608);
 296         CHECK_OFFSET(host_gs_base, 616);
 297         CHECK_OFFSET(host_tr_base, 624);
 298         CHECK_OFFSET(host_gdtr_base, 632);
 299         CHECK_OFFSET(host_idtr_base, 640);
 300         CHECK_OFFSET(host_ia32_sysenter_esp, 648);
 301         CHECK_OFFSET(host_ia32_sysenter_eip, 656);
 302         CHECK_OFFSET(host_rsp, 664);
 303         CHECK_OFFSET(host_rip, 672);
 304         CHECK_OFFSET(pin_based_vm_exec_control, 744);
 305         CHECK_OFFSET(cpu_based_vm_exec_control, 748);
 306         CHECK_OFFSET(exception_bitmap, 752);
 307         CHECK_OFFSET(page_fault_error_code_mask, 756);
 308         CHECK_OFFSET(page_fault_error_code_match, 760);
 309         CHECK_OFFSET(cr3_target_count, 764);
 310         CHECK_OFFSET(vm_exit_controls, 768);
 311         CHECK_OFFSET(vm_exit_msr_store_count, 772);
 312         CHECK_OFFSET(vm_exit_msr_load_count, 776);
 313         CHECK_OFFSET(vm_entry_controls, 780);
 314         CHECK_OFFSET(vm_entry_msr_load_count, 784);
 315         CHECK_OFFSET(vm_entry_intr_info_field, 788);
 316         CHECK_OFFSET(vm_entry_exception_error_code, 792);
 317         CHECK_OFFSET(vm_entry_instruction_len, 796);
 318         CHECK_OFFSET(tpr_threshold, 800);
 319         CHECK_OFFSET(secondary_vm_exec_control, 804);
 320         CHECK_OFFSET(vm_instruction_error, 808);
 321         CHECK_OFFSET(vm_exit_reason, 812);
 322         CHECK_OFFSET(vm_exit_intr_info, 816);
 323         CHECK_OFFSET(vm_exit_intr_error_code, 820);
 324         CHECK_OFFSET(idt_vectoring_info_field, 824);
 325         CHECK_OFFSET(idt_vectoring_error_code, 828);
 326         CHECK_OFFSET(vm_exit_instruction_len, 832);
 327         CHECK_OFFSET(vmx_instruction_info, 836);
 328         CHECK_OFFSET(guest_es_limit, 840);
 329         CHECK_OFFSET(guest_cs_limit, 844);
 330         CHECK_OFFSET(guest_ss_limit, 848);
 331         CHECK_OFFSET(guest_ds_limit, 852);
 332         CHECK_OFFSET(guest_fs_limit, 856);
 333         CHECK_OFFSET(guest_gs_limit, 860);
 334         CHECK_OFFSET(guest_ldtr_limit, 864);
 335         CHECK_OFFSET(guest_tr_limit, 868);
 336         CHECK_OFFSET(guest_gdtr_limit, 872);
 337         CHECK_OFFSET(guest_idtr_limit, 876);
 338         CHECK_OFFSET(guest_es_ar_bytes, 880);
 339         CHECK_OFFSET(guest_cs_ar_bytes, 884);
 340         CHECK_OFFSET(guest_ss_ar_bytes, 888);
 341         CHECK_OFFSET(guest_ds_ar_bytes, 892);
 342         CHECK_OFFSET(guest_fs_ar_bytes, 896);
 343         CHECK_OFFSET(guest_gs_ar_bytes, 900);
 344         CHECK_OFFSET(guest_ldtr_ar_bytes, 904);
 345         CHECK_OFFSET(guest_tr_ar_bytes, 908);
 346         CHECK_OFFSET(guest_interruptibility_info, 912);
 347         CHECK_OFFSET(guest_activity_state, 916);
 348         CHECK_OFFSET(guest_sysenter_cs, 920);
 349         CHECK_OFFSET(host_ia32_sysenter_cs, 924);
 350         CHECK_OFFSET(vmx_preemption_timer_value, 928);
 351         CHECK_OFFSET(virtual_processor_id, 960);
 352         CHECK_OFFSET(posted_intr_nv, 962);
 353         CHECK_OFFSET(guest_es_selector, 964);
 354         CHECK_OFFSET(guest_cs_selector, 966);
 355         CHECK_OFFSET(guest_ss_selector, 968);
 356         CHECK_OFFSET(guest_ds_selector, 970);
 357         CHECK_OFFSET(guest_fs_selector, 972);
 358         CHECK_OFFSET(guest_gs_selector, 974);
 359         CHECK_OFFSET(guest_ldtr_selector, 976);
 360         CHECK_OFFSET(guest_tr_selector, 978);
 361         CHECK_OFFSET(guest_intr_status, 980);
 362         CHECK_OFFSET(host_es_selector, 982);
 363         CHECK_OFFSET(host_cs_selector, 984);
 364         CHECK_OFFSET(host_ss_selector, 986);
 365         CHECK_OFFSET(host_ds_selector, 988);
 366         CHECK_OFFSET(host_fs_selector, 990);
 367         CHECK_OFFSET(host_gs_selector, 992);
 368         CHECK_OFFSET(host_tr_selector, 994);
 369         CHECK_OFFSET(guest_pml_index, 996);
 370 }
 371 
 372 extern const unsigned short vmcs_field_to_offset_table[];
 373 extern const unsigned int nr_vmcs12_fields;
 374 
 375 #define ROL16(val, n) ((u16)(((u16)(val) << (n)) | ((u16)(val) >> (16 - (n)))))
 376 
 377 static inline short vmcs_field_to_offset(unsigned long field)
 378 {
 379         unsigned short offset;
 380         unsigned int index;
 381 
 382         if (field >> 15)
 383                 return -ENOENT;
 384 
 385         index = ROL16(field, 6);
 386         if (index >= nr_vmcs12_fields)
 387                 return -ENOENT;
 388 
 389         index = array_index_nospec(index, nr_vmcs12_fields);
 390         offset = vmcs_field_to_offset_table[index];
 391         if (offset == 0)
 392                 return -ENOENT;
 393         return offset;
 394 }
 395 
 396 #undef ROL16
 397 
 398 static inline u64 vmcs12_read_any(struct vmcs12 *vmcs12, unsigned long field,
 399                                   u16 offset)
 400 {
 401         char *p = (char *)vmcs12 + offset;
 402 
 403         switch (vmcs_field_width(field)) {
 404         case VMCS_FIELD_WIDTH_NATURAL_WIDTH:
 405                 return *((natural_width *)p);
 406         case VMCS_FIELD_WIDTH_U16:
 407                 return *((u16 *)p);
 408         case VMCS_FIELD_WIDTH_U32:
 409                 return *((u32 *)p);
 410         case VMCS_FIELD_WIDTH_U64:
 411                 return *((u64 *)p);
 412         default:
 413                 WARN_ON_ONCE(1);
 414                 return -1;
 415         }
 416 }
 417 
 418 static inline void vmcs12_write_any(struct vmcs12 *vmcs12, unsigned long field,
 419                                     u16 offset, u64 field_value)
 420 {
 421         char *p = (char *)vmcs12 + offset;
 422 
 423         switch (vmcs_field_width(field)) {
 424         case VMCS_FIELD_WIDTH_U16:
 425                 *(u16 *)p = field_value;
 426                 break;
 427         case VMCS_FIELD_WIDTH_U32:
 428                 *(u32 *)p = field_value;
 429                 break;
 430         case VMCS_FIELD_WIDTH_U64:
 431                 *(u64 *)p = field_value;
 432                 break;
 433         case VMCS_FIELD_WIDTH_NATURAL_WIDTH:
 434                 *(natural_width *)p = field_value;
 435                 break;
 436         default:
 437                 WARN_ON_ONCE(1);
 438                 break;
 439         }
 440 }
 441 
 442 #endif /* __KVM_X86_VMX_VMCS12_H */

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