This source file includes following definitions.
- cpu_has_vmx_basic_inout
- cpu_has_virtual_nmis
- cpu_has_vmx_preemption_timer
- cpu_has_vmx_posted_intr
- cpu_has_load_ia32_efer
- cpu_has_load_perf_global_ctrl
- vmx_mpx_supported
- cpu_has_vmx_tpr_shadow
- cpu_need_tpr_shadow
- cpu_has_vmx_msr_bitmap
- cpu_has_secondary_exec_ctrls
- cpu_has_vmx_virtualize_apic_accesses
- cpu_has_vmx_ept
- vmx_umip_emulated
- vmx_pku_supported
- cpu_has_vmx_rdtscp
- cpu_has_vmx_virtualize_x2apic_mode
- cpu_has_vmx_vpid
- cpu_has_vmx_wbinvd_exit
- cpu_has_vmx_unrestricted_guest
- cpu_has_vmx_apic_register_virt
- cpu_has_vmx_virtual_intr_delivery
- cpu_has_vmx_ple
- vmx_rdrand_supported
- cpu_has_vmx_invpcid
- cpu_has_vmx_vmfunc
- cpu_has_vmx_shadow_vmcs
- cpu_has_vmx_encls_vmexit
- vmx_rdseed_supported
- cpu_has_vmx_pml
- vmx_xsaves_supported
- vmx_waitpkg_supported
- cpu_has_vmx_tsc_scaling
- cpu_has_vmx_apicv
- cpu_has_vmx_flexpriority
- cpu_has_vmx_ept_execute_only
- cpu_has_vmx_ept_4levels
- cpu_has_vmx_ept_5levels
- cpu_has_vmx_ept_mt_wb
- cpu_has_vmx_ept_2m_page
- cpu_has_vmx_ept_1g_page
- cpu_has_vmx_ept_ad_bits
- cpu_has_vmx_invept_context
- cpu_has_vmx_invept_global
- cpu_has_vmx_invvpid
- cpu_has_vmx_invvpid_individual_addr
- cpu_has_vmx_invvpid_single
- cpu_has_vmx_invvpid_global
- cpu_has_vmx_intel_pt
1
2 #ifndef __KVM_X86_VMX_CAPS_H
3 #define __KVM_X86_VMX_CAPS_H
4
5 #include <asm/vmx.h>
6
7 #include "lapic.h"
8
9 extern bool __read_mostly enable_vpid;
10 extern bool __read_mostly flexpriority_enabled;
11 extern bool __read_mostly enable_ept;
12 extern bool __read_mostly enable_unrestricted_guest;
13 extern bool __read_mostly enable_ept_ad_bits;
14 extern bool __read_mostly enable_pml;
15 extern bool __read_mostly enable_apicv;
16 extern int __read_mostly pt_mode;
17
18 #define PT_MODE_SYSTEM 0
19 #define PT_MODE_HOST_GUEST 1
20
21 struct nested_vmx_msrs {
22
23
24
25
26
27 u32 procbased_ctls_low;
28 u32 procbased_ctls_high;
29 u32 secondary_ctls_low;
30 u32 secondary_ctls_high;
31 u32 pinbased_ctls_low;
32 u32 pinbased_ctls_high;
33 u32 exit_ctls_low;
34 u32 exit_ctls_high;
35 u32 entry_ctls_low;
36 u32 entry_ctls_high;
37 u32 misc_low;
38 u32 misc_high;
39 u32 ept_caps;
40 u32 vpid_caps;
41 u64 basic;
42 u64 cr0_fixed0;
43 u64 cr0_fixed1;
44 u64 cr4_fixed0;
45 u64 cr4_fixed1;
46 u64 vmcs_enum;
47 u64 vmfunc_controls;
48 };
49
50 struct vmcs_config {
51 int size;
52 int order;
53 u32 basic_cap;
54 u32 revision_id;
55 u32 pin_based_exec_ctrl;
56 u32 cpu_based_exec_ctrl;
57 u32 cpu_based_2nd_exec_ctrl;
58 u32 vmexit_ctrl;
59 u32 vmentry_ctrl;
60 struct nested_vmx_msrs nested;
61 };
62 extern struct vmcs_config vmcs_config;
63
64 struct vmx_capability {
65 u32 ept;
66 u32 vpid;
67 };
68 extern struct vmx_capability vmx_capability;
69
70 static inline bool cpu_has_vmx_basic_inout(void)
71 {
72 return (((u64)vmcs_config.basic_cap << 32) & VMX_BASIC_INOUT);
73 }
74
75 static inline bool cpu_has_virtual_nmis(void)
76 {
77 return vmcs_config.pin_based_exec_ctrl & PIN_BASED_VIRTUAL_NMIS;
78 }
79
80 static inline bool cpu_has_vmx_preemption_timer(void)
81 {
82 return vmcs_config.pin_based_exec_ctrl &
83 PIN_BASED_VMX_PREEMPTION_TIMER;
84 }
85
86 static inline bool cpu_has_vmx_posted_intr(void)
87 {
88 return IS_ENABLED(CONFIG_X86_LOCAL_APIC) &&
89 vmcs_config.pin_based_exec_ctrl & PIN_BASED_POSTED_INTR;
90 }
91
92 static inline bool cpu_has_load_ia32_efer(void)
93 {
94 return (vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_IA32_EFER) &&
95 (vmcs_config.vmexit_ctrl & VM_EXIT_LOAD_IA32_EFER);
96 }
97
98 static inline bool cpu_has_load_perf_global_ctrl(void)
99 {
100 return (vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL) &&
101 (vmcs_config.vmexit_ctrl & VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL);
102 }
103
104 static inline bool vmx_mpx_supported(void)
105 {
106 return (vmcs_config.vmexit_ctrl & VM_EXIT_CLEAR_BNDCFGS) &&
107 (vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_BNDCFGS);
108 }
109
110 static inline bool cpu_has_vmx_tpr_shadow(void)
111 {
112 return vmcs_config.cpu_based_exec_ctrl & CPU_BASED_TPR_SHADOW;
113 }
114
115 static inline bool cpu_need_tpr_shadow(struct kvm_vcpu *vcpu)
116 {
117 return cpu_has_vmx_tpr_shadow() && lapic_in_kernel(vcpu);
118 }
119
120 static inline bool cpu_has_vmx_msr_bitmap(void)
121 {
122 return vmcs_config.cpu_based_exec_ctrl & CPU_BASED_USE_MSR_BITMAPS;
123 }
124
125 static inline bool cpu_has_secondary_exec_ctrls(void)
126 {
127 return vmcs_config.cpu_based_exec_ctrl &
128 CPU_BASED_ACTIVATE_SECONDARY_CONTROLS;
129 }
130
131 static inline bool cpu_has_vmx_virtualize_apic_accesses(void)
132 {
133 return vmcs_config.cpu_based_2nd_exec_ctrl &
134 SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES;
135 }
136
137 static inline bool cpu_has_vmx_ept(void)
138 {
139 return vmcs_config.cpu_based_2nd_exec_ctrl &
140 SECONDARY_EXEC_ENABLE_EPT;
141 }
142
143 static inline bool vmx_umip_emulated(void)
144 {
145 return vmcs_config.cpu_based_2nd_exec_ctrl &
146 SECONDARY_EXEC_DESC;
147 }
148
149 static inline bool vmx_pku_supported(void)
150 {
151 return boot_cpu_has(X86_FEATURE_PKU);
152 }
153
154 static inline bool cpu_has_vmx_rdtscp(void)
155 {
156 return vmcs_config.cpu_based_2nd_exec_ctrl &
157 SECONDARY_EXEC_RDTSCP;
158 }
159
160 static inline bool cpu_has_vmx_virtualize_x2apic_mode(void)
161 {
162 return vmcs_config.cpu_based_2nd_exec_ctrl &
163 SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE;
164 }
165
166 static inline bool cpu_has_vmx_vpid(void)
167 {
168 return vmcs_config.cpu_based_2nd_exec_ctrl &
169 SECONDARY_EXEC_ENABLE_VPID;
170 }
171
172 static inline bool cpu_has_vmx_wbinvd_exit(void)
173 {
174 return vmcs_config.cpu_based_2nd_exec_ctrl &
175 SECONDARY_EXEC_WBINVD_EXITING;
176 }
177
178 static inline bool cpu_has_vmx_unrestricted_guest(void)
179 {
180 return vmcs_config.cpu_based_2nd_exec_ctrl &
181 SECONDARY_EXEC_UNRESTRICTED_GUEST;
182 }
183
184 static inline bool cpu_has_vmx_apic_register_virt(void)
185 {
186 return vmcs_config.cpu_based_2nd_exec_ctrl &
187 SECONDARY_EXEC_APIC_REGISTER_VIRT;
188 }
189
190 static inline bool cpu_has_vmx_virtual_intr_delivery(void)
191 {
192 return vmcs_config.cpu_based_2nd_exec_ctrl &
193 SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY;
194 }
195
196 static inline bool cpu_has_vmx_ple(void)
197 {
198 return vmcs_config.cpu_based_2nd_exec_ctrl &
199 SECONDARY_EXEC_PAUSE_LOOP_EXITING;
200 }
201
202 static inline bool vmx_rdrand_supported(void)
203 {
204 return vmcs_config.cpu_based_2nd_exec_ctrl &
205 SECONDARY_EXEC_RDRAND_EXITING;
206 }
207
208 static inline bool cpu_has_vmx_invpcid(void)
209 {
210 return vmcs_config.cpu_based_2nd_exec_ctrl &
211 SECONDARY_EXEC_ENABLE_INVPCID;
212 }
213
214 static inline bool cpu_has_vmx_vmfunc(void)
215 {
216 return vmcs_config.cpu_based_2nd_exec_ctrl &
217 SECONDARY_EXEC_ENABLE_VMFUNC;
218 }
219
220 static inline bool cpu_has_vmx_shadow_vmcs(void)
221 {
222 u64 vmx_msr;
223
224
225 rdmsrl(MSR_IA32_VMX_MISC, vmx_msr);
226 if (!(vmx_msr & MSR_IA32_VMX_MISC_VMWRITE_SHADOW_RO_FIELDS))
227 return false;
228
229 return vmcs_config.cpu_based_2nd_exec_ctrl &
230 SECONDARY_EXEC_SHADOW_VMCS;
231 }
232
233 static inline bool cpu_has_vmx_encls_vmexit(void)
234 {
235 return vmcs_config.cpu_based_2nd_exec_ctrl &
236 SECONDARY_EXEC_ENCLS_EXITING;
237 }
238
239 static inline bool vmx_rdseed_supported(void)
240 {
241 return vmcs_config.cpu_based_2nd_exec_ctrl &
242 SECONDARY_EXEC_RDSEED_EXITING;
243 }
244
245 static inline bool cpu_has_vmx_pml(void)
246 {
247 return vmcs_config.cpu_based_2nd_exec_ctrl & SECONDARY_EXEC_ENABLE_PML;
248 }
249
250 static inline bool vmx_xsaves_supported(void)
251 {
252 return vmcs_config.cpu_based_2nd_exec_ctrl &
253 SECONDARY_EXEC_XSAVES;
254 }
255
256 static inline bool vmx_waitpkg_supported(void)
257 {
258 return vmcs_config.cpu_based_2nd_exec_ctrl &
259 SECONDARY_EXEC_ENABLE_USR_WAIT_PAUSE;
260 }
261
262 static inline bool cpu_has_vmx_tsc_scaling(void)
263 {
264 return vmcs_config.cpu_based_2nd_exec_ctrl &
265 SECONDARY_EXEC_TSC_SCALING;
266 }
267
268 static inline bool cpu_has_vmx_apicv(void)
269 {
270 return cpu_has_vmx_apic_register_virt() &&
271 cpu_has_vmx_virtual_intr_delivery() &&
272 cpu_has_vmx_posted_intr();
273 }
274
275 static inline bool cpu_has_vmx_flexpriority(void)
276 {
277 return cpu_has_vmx_tpr_shadow() &&
278 cpu_has_vmx_virtualize_apic_accesses();
279 }
280
281 static inline bool cpu_has_vmx_ept_execute_only(void)
282 {
283 return vmx_capability.ept & VMX_EPT_EXECUTE_ONLY_BIT;
284 }
285
286 static inline bool cpu_has_vmx_ept_4levels(void)
287 {
288 return vmx_capability.ept & VMX_EPT_PAGE_WALK_4_BIT;
289 }
290
291 static inline bool cpu_has_vmx_ept_5levels(void)
292 {
293 return vmx_capability.ept & VMX_EPT_PAGE_WALK_5_BIT;
294 }
295
296 static inline bool cpu_has_vmx_ept_mt_wb(void)
297 {
298 return vmx_capability.ept & VMX_EPTP_WB_BIT;
299 }
300
301 static inline bool cpu_has_vmx_ept_2m_page(void)
302 {
303 return vmx_capability.ept & VMX_EPT_2MB_PAGE_BIT;
304 }
305
306 static inline bool cpu_has_vmx_ept_1g_page(void)
307 {
308 return vmx_capability.ept & VMX_EPT_1GB_PAGE_BIT;
309 }
310
311 static inline bool cpu_has_vmx_ept_ad_bits(void)
312 {
313 return vmx_capability.ept & VMX_EPT_AD_BIT;
314 }
315
316 static inline bool cpu_has_vmx_invept_context(void)
317 {
318 return vmx_capability.ept & VMX_EPT_EXTENT_CONTEXT_BIT;
319 }
320
321 static inline bool cpu_has_vmx_invept_global(void)
322 {
323 return vmx_capability.ept & VMX_EPT_EXTENT_GLOBAL_BIT;
324 }
325
326 static inline bool cpu_has_vmx_invvpid(void)
327 {
328 return vmx_capability.vpid & VMX_VPID_INVVPID_BIT;
329 }
330
331 static inline bool cpu_has_vmx_invvpid_individual_addr(void)
332 {
333 return vmx_capability.vpid & VMX_VPID_EXTENT_INDIVIDUAL_ADDR_BIT;
334 }
335
336 static inline bool cpu_has_vmx_invvpid_single(void)
337 {
338 return vmx_capability.vpid & VMX_VPID_EXTENT_SINGLE_CONTEXT_BIT;
339 }
340
341 static inline bool cpu_has_vmx_invvpid_global(void)
342 {
343 return vmx_capability.vpid & VMX_VPID_EXTENT_GLOBAL_CONTEXT_BIT;
344 }
345
346 static inline bool cpu_has_vmx_intel_pt(void)
347 {
348 u64 vmx_msr;
349
350 rdmsrl(MSR_IA32_VMX_MISC, vmx_msr);
351 return (vmx_msr & MSR_IA32_VMX_MISC_INTEL_PT) &&
352 (vmcs_config.cpu_based_2nd_exec_ctrl & SECONDARY_EXEC_PT_USE_GPA) &&
353 (vmcs_config.vmexit_ctrl & VM_EXIT_CLEAR_IA32_RTIT_CTL) &&
354 (vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_IA32_RTIT_CTL);
355 }
356
357 #endif