This source file includes following definitions.
- ce4100_power_off
- mem_serial_in
- ce4100_mem_serial_in
- ce4100_mem_serial_out
- ce4100_serial_fixup
- sdv_serial_fixup
- sdv_serial_fixup
- sdv_arch_setup
- sdv_pci_init
- x86_ce4100_early_setup
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7 #include <linux/init.h>
8 #include <linux/kernel.h>
9 #include <linux/irq.h>
10 #include <linux/reboot.h>
11 #include <linux/serial_reg.h>
12 #include <linux/serial_8250.h>
13
14 #include <asm/ce4100.h>
15 #include <asm/prom.h>
16 #include <asm/setup.h>
17 #include <asm/i8259.h>
18 #include <asm/io.h>
19 #include <asm/io_apic.h>
20 #include <asm/emergency-restart.h>
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22
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27
28
29 static void ce4100_power_off(void)
30 {
31 outb(0x4, 0xcf9);
32 }
33
34 #ifdef CONFIG_SERIAL_8250
35
36 static unsigned int mem_serial_in(struct uart_port *p, int offset)
37 {
38 offset = offset << p->regshift;
39 return readl(p->membase + offset);
40 }
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50
51
52 static unsigned int ce4100_mem_serial_in(struct uart_port *p, int offset)
53 {
54 unsigned int ret, ier, lsr;
55
56 if (offset == UART_IIR) {
57 offset = offset << p->regshift;
58 ret = readl(p->membase + offset);
59 if (ret & UART_IIR_NO_INT) {
60
61 ier = mem_serial_in(p, UART_IER);
62
63 if (ier & UART_IER_THRI) {
64 lsr = mem_serial_in(p, UART_LSR);
65
66
67 if (lsr & (UART_LSR_THRE | UART_LSR_TEMT))
68 ret &= ~UART_IIR_NO_INT;
69 }
70 }
71 } else
72 ret = mem_serial_in(p, offset);
73 return ret;
74 }
75
76 static void ce4100_mem_serial_out(struct uart_port *p, int offset, int value)
77 {
78 offset = offset << p->regshift;
79 writel(value, p->membase + offset);
80 }
81
82 static void ce4100_serial_fixup(int port, struct uart_port *up,
83 u32 *capabilities)
84 {
85 #ifdef CONFIG_EARLY_PRINTK
86
87
88
89
90
91 if (up->iotype != UPIO_MEM32) {
92 up->uartclk = 14745600;
93 up->mapbase = 0xdffe0200;
94 set_fixmap_nocache(FIX_EARLYCON_MEM_BASE,
95 up->mapbase & PAGE_MASK);
96 up->membase =
97 (void __iomem *)__fix_to_virt(FIX_EARLYCON_MEM_BASE);
98 up->membase += up->mapbase & ~PAGE_MASK;
99 up->mapbase += port * 0x100;
100 up->membase += port * 0x100;
101 up->iotype = UPIO_MEM32;
102 up->regshift = 2;
103 up->irq = 4;
104 }
105 #endif
106 up->iobase = 0;
107 up->serial_in = ce4100_mem_serial_in;
108 up->serial_out = ce4100_mem_serial_out;
109
110 *capabilities |= (1 << 12);
111 }
112
113 static __init void sdv_serial_fixup(void)
114 {
115 serial8250_set_isa_configurator(ce4100_serial_fixup);
116 }
117
118 #else
119 static inline void sdv_serial_fixup(void) {};
120 #endif
121
122 static void __init sdv_arch_setup(void)
123 {
124 sdv_serial_fixup();
125 }
126
127 static void sdv_pci_init(void)
128 {
129 x86_of_pci_init();
130 }
131
132
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134
135
136 void __init x86_ce4100_early_setup(void)
137 {
138 x86_init.oem.arch_setup = sdv_arch_setup;
139 x86_init.resources.probe_roms = x86_init_noop;
140 x86_init.mpparse.get_smp_config = x86_init_uint_noop;
141 x86_init.mpparse.find_smp_config = x86_init_noop;
142 x86_init.mpparse.setup_ioapic_ids = setup_ioapic_ids_from_mpc_nocheck;
143 x86_init.pci.init = ce4100_pci_init;
144 x86_init.pci.init_irq = sdv_pci_init;
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153 reboot_type = BOOT_KBD;
154
155 pm_power_off = ce4100_power_off;
156 }