1 
   2 #ifndef __ASM_CPU_SH3_ADC_H
   3 #define __ASM_CPU_SH3_ADC_H
   4 
   5 
   6 
   7 
   8 
   9 
  10 #define ADDRAH  0xa4000080
  11 #define ADDRAL  0xa4000082
  12 #define ADDRBH  0xa4000084
  13 #define ADDRBL  0xa4000086
  14 #define ADDRCH  0xa4000088
  15 #define ADDRCL  0xa400008a
  16 #define ADDRDH  0xa400008c
  17 #define ADDRDL  0xa400008e
  18 #define ADCSR   0xa4000090
  19 
  20 #define ADCSR_ADF       0x80
  21 #define ADCSR_ADIE      0x40
  22 #define ADCSR_ADST      0x20
  23 #define ADCSR_MULTI     0x10
  24 #define ADCSR_CKS       0x08
  25 #define ADCSR_CH_MASK   0x07
  26 
  27 #define ADCR    0xa4000092
  28 
  29 #endif