root/arch/riscv/include/asm/sifive_l2_cache.h

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INCLUDED FROM

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * SiFive L2 Cache Controller header file
   4  *
   5  */
   6 
   7 #ifndef _ASM_RISCV_SIFIVE_L2_CACHE_H
   8 #define _ASM_RISCV_SIFIVE_L2_CACHE_H
   9 
  10 extern int register_sifive_l2_error_notifier(struct notifier_block *nb);
  11 extern int unregister_sifive_l2_error_notifier(struct notifier_block *nb);
  12 
  13 #define SIFIVE_L2_ERR_TYPE_CE 0
  14 #define SIFIVE_L2_ERR_TYPE_UE 1
  15 
  16 #endif /* _ASM_RISCV_SIFIVE_L2_CACHE_H */
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