This source file includes following definitions.
- register_align
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7 #ifndef __ASM_SH_CACHE_INSNS_64_H
8 #define __ASM_SH_CACHE_INSNS_64_H
9
10 #define __icbi(addr) __asm__ __volatile__ ( "icbi %0, 0\n\t" : : "r" (addr))
11 #define __ocbp(addr) __asm__ __volatile__ ( "ocbp %0, 0\n\t" : : "r" (addr))
12 #define __ocbi(addr) __asm__ __volatile__ ( "ocbi %0, 0\n\t" : : "r" (addr))
13 #define __ocbwb(addr) __asm__ __volatile__ ( "ocbwb %0, 0\n\t" : : "r" (addr))
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15 static inline reg_size_t register_align(void *val)
16 {
17 return (unsigned long long)(signed long long)(signed long)val;
18 }
19
20 #endif