This source file includes following definitions.
- disable_fpu
- enable_fpu
- show_code
- prefetch
- prefetchw
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9 #ifndef __ASM_SH_PROCESSOR_32_H
10 #define __ASM_SH_PROCESSOR_32_H
11 #ifdef __KERNEL__
12
13 #include <linux/compiler.h>
14 #include <linux/linkage.h>
15 #include <asm/page.h>
16 #include <asm/types.h>
17 #include <asm/hw_breakpoint.h>
18
19
20 #define CCN_PVR 0xff000030
21 #define CCN_CVR 0xff000040
22 #define CCN_PRR 0xff000044
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27
28
29 #define TASK_SIZE 0x7c000000UL
30
31 #define STACK_TOP TASK_SIZE
32 #define STACK_TOP_MAX STACK_TOP
33
34
35
36
37 #define TASK_UNMAPPED_BASE PAGE_ALIGN(TASK_SIZE / 3)
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47
48
49 #define SR_DSP 0x00001000
50 #define SR_IMASK 0x000000f0
51 #define SR_FD 0x00008000
52 #define SR_MD 0x40000000
53
54
55
56
57 struct sh_dsp_struct {
58 unsigned long dsp_regs[14];
59 long status;
60 };
61
62
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64
65
66 struct sh_fpu_hard_struct {
67 unsigned long fp_regs[16];
68 unsigned long xfp_regs[16];
69 unsigned long fpscr;
70 unsigned long fpul;
71
72 long status;
73 };
74
75
76 struct sh_fpu_soft_struct {
77 unsigned long fp_regs[16];
78 unsigned long xfp_regs[16];
79 unsigned long fpscr;
80 unsigned long fpul;
81
82 unsigned char lookahead;
83 unsigned long entry_pc;
84 };
85
86 union thread_xstate {
87 struct sh_fpu_hard_struct hardfpu;
88 struct sh_fpu_soft_struct softfpu;
89 };
90
91 struct thread_struct {
92
93 unsigned long sp;
94 unsigned long pc;
95
96
97 unsigned long flags;
98
99
100 struct perf_event *ptrace_bps[HBP_NUM];
101
102 #ifdef CONFIG_SH_DSP
103
104 struct sh_dsp_struct dsp_status;
105 #endif
106
107
108 union thread_xstate *xstate;
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117
118 unsigned char fpu_counter;
119 };
120
121 #define INIT_THREAD { \
122 .sp = sizeof(init_stack) + (long) &init_stack, \
123 .flags = 0, \
124 }
125
126
127 struct task_struct;
128
129 extern void start_thread(struct pt_regs *regs, unsigned long new_pc, unsigned long new_sp);
130
131
132 extern void release_thread(struct task_struct *);
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137
138 static __inline__ void disable_fpu(void)
139 {
140 unsigned long __dummy;
141
142
143 __asm__ __volatile__("stc sr, %0\n\t"
144 "or %1, %0\n\t"
145 "ldc %0, sr"
146 : "=&r" (__dummy)
147 : "r" (SR_FD));
148 }
149
150 static __inline__ void enable_fpu(void)
151 {
152 unsigned long __dummy;
153
154
155 __asm__ __volatile__("stc sr, %0\n\t"
156 "and %1, %0\n\t"
157 "ldc %0, sr"
158 : "=&r" (__dummy)
159 : "r" (~SR_FD));
160 }
161
162
163 #define FPSCR_INIT 0x00080000
164
165 #define FPSCR_CAUSE_MASK 0x0001f000
166 #define FPSCR_FLAG_MASK 0x0000007c
167
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170
171 #define thread_saved_pc(tsk) (tsk->thread.pc)
172
173 void show_trace(struct task_struct *tsk, unsigned long *sp,
174 struct pt_regs *regs);
175
176 #ifdef CONFIG_DUMP_CODE
177 void show_code(struct pt_regs *regs);
178 #else
179 static inline void show_code(struct pt_regs *regs)
180 {
181 }
182 #endif
183
184 extern unsigned long get_wchan(struct task_struct *p);
185
186 #define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc)
187 #define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[15])
188
189 #if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH4)
190
191 #define PREFETCH_STRIDE L1_CACHE_BYTES
192 #define ARCH_HAS_PREFETCH
193 #define ARCH_HAS_PREFETCHW
194
195 static inline void prefetch(const void *x)
196 {
197 __builtin_prefetch(x, 0, 3);
198 }
199
200 static inline void prefetchw(const void *x)
201 {
202 __builtin_prefetch(x, 1, 3);
203 }
204 #endif
205
206 #endif
207 #endif