root/arch/sh/include/asm/dma-register.h

INCLUDED FROM

   1 /* SPDX-License-Identifier: GPL-2.0
   2  *
   3  * Common header for the legacy SH DMA driver and the new dmaengine driver
   4  *
   5  * extracted from arch/sh/include/asm/dma-sh.h:
   6  *
   7  * Copyright (C) 2000  Takashi YOSHII
   8  * Copyright (C) 2003  Paul Mundt
   9  */
  10 #ifndef DMA_REGISTER_H
  11 #define DMA_REGISTER_H
  12 
  13 /* DMA registers */
  14 #define SAR     0x00    /* Source Address Register */
  15 #define DAR     0x04    /* Destination Address Register */
  16 #define TCR     0x08    /* Transfer Count Register */
  17 #define CHCR    0x0C    /* Channel Control Register */
  18 #define DMAOR   0x40    /* DMA Operation Register */
  19 
  20 /* DMAOR definitions */
  21 #define DMAOR_AE        0x00000004      /* Address Error Flag */
  22 #define DMAOR_NMIF      0x00000002
  23 #define DMAOR_DME       0x00000001      /* DMA Master Enable */
  24 
  25 /* Definitions for the SuperH DMAC */
  26 #define REQ_L   0x00000000
  27 #define REQ_E   0x00080000
  28 #define RACK_H  0x00000000
  29 #define RACK_L  0x00040000
  30 #define ACK_R   0x00000000
  31 #define ACK_W   0x00020000
  32 #define ACK_H   0x00000000
  33 #define ACK_L   0x00010000
  34 #define DM_INC  0x00004000      /* Destination addresses are incremented */
  35 #define DM_DEC  0x00008000      /* Destination addresses are decremented */
  36 #define DM_FIX  0x0000c000      /* Destination address is fixed */
  37 #define SM_INC  0x00001000      /* Source addresses are incremented */
  38 #define SM_DEC  0x00002000      /* Source addresses are decremented */
  39 #define SM_FIX  0x00003000      /* Source address is fixed */
  40 #define RS_IN   0x00000200
  41 #define RS_OUT  0x00000300
  42 #define RS_AUTO 0x00000400      /* Auto Request */
  43 #define RS_ERS  0x00000800      /* DMA extended resource selector */
  44 #define TS_BLK  0x00000040
  45 #define TM_BUR  0x00000020
  46 #define CHCR_DE 0x00000001      /* DMA Enable */
  47 #define CHCR_TE 0x00000002      /* Transfer End Flag */
  48 #define CHCR_IE 0x00000004      /* Interrupt Enable */
  49 
  50 #endif