root/arch/sh/kernel/cpu/sh5/clock-sh5.c

DEFINITIONS

1. master_clk_init
2. module_clk_recalc
3. bus_clk_recalc
4. cpu_clk_recalc
5. arch_init_clk_ops

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * arch/sh/kernel/cpu/sh5/clock-sh5.c
   4  *
   5  * SH-5 support for the clock framework
   6  *
   7  *  Copyright (C) 2008  Paul Mundt
   8  */
   9 #include <linux/init.h>
  10 #include <linux/kernel.h>
  11 #include <asm/clock.h>
  12 #include <asm/io.h>
  13 
  14 static int ifc_table[] = { 2, 4, 6, 8, 10, 12, 16, 24 };
  15 
  16 /* Clock, Power and Reset Controller */
  17 #define CPRC_BLOCK_OFF  0x01010000
  18 #define CPRC_BASE       (PHYS_PERIPHERAL_BLOCK + CPRC_BLOCK_OFF)
  19 
  20 static unsigned long cprc_base;
  21 
  22 static void master_clk_init(struct clk *clk)
  23 {
  24         int idx = (__raw_readl(cprc_base + 0x00) >> 6) & 0x0007;
  25         clk->rate *= ifc_table[idx];
  26 }
  27 
  28 static struct sh_clk_ops sh5_master_clk_ops = {
  29         .init           = master_clk_init,
  30 };
  31 
  32 static unsigned long module_clk_recalc(struct clk *clk)
  33 {
  34         int idx = (__raw_readw(cprc_base) >> 12) & 0x0007;
  35         return clk->parent->rate / ifc_table[idx];
  36 }
  37 
  38 static struct sh_clk_ops sh5_module_clk_ops = {
  39         .recalc         = module_clk_recalc,
  40 };
  41 
  42 static unsigned long bus_clk_recalc(struct clk *clk)
  43 {
  44         int idx = (__raw_readw(cprc_base) >> 3) & 0x0007;
  45         return clk->parent->rate / ifc_table[idx];
  46 }
  47 
  48 static struct sh_clk_ops sh5_bus_clk_ops = {
  49         .recalc         = bus_clk_recalc,
  50 };
  51 
  52 static unsigned long cpu_clk_recalc(struct clk *clk)
  53 {
  54         int idx = (__raw_readw(cprc_base) & 0x0007);
  55         return clk->parent->rate / ifc_table[idx];
  56 }
  57 
  58 static struct sh_clk_ops sh5_cpu_clk_ops = {
  59         .recalc         = cpu_clk_recalc,
  60 };
  61 
  62 static struct sh_clk_ops *sh5_clk_ops[] = {
  63         &sh5_master_clk_ops,
  64         &sh5_module_clk_ops,
  65         &sh5_bus_clk_ops,
  66         &sh5_cpu_clk_ops,
  67 };
  68 
  69 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
  70 {
  71         cprc_base = (unsigned long)ioremap_nocache(CPRC_BASE, 1024);
  72         BUG_ON(!cprc_base);
  73 
  74         if (idx < ARRAY_SIZE(sh5_clk_ops))
  75                 *ops = sh5_clk_ops[idx];
  76 }