This source file includes following definitions.
- sh7710_devices_setup
- plat_early_device_setup
- plat_irq_setup
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8 #include <linux/platform_device.h>
9 #include <linux/init.h>
10 #include <linux/irq.h>
11 #include <linux/serial.h>
12 #include <linux/serial_sci.h>
13 #include <linux/sh_timer.h>
14 #include <linux/sh_intc.h>
15 #include <asm/rtc.h>
16
17 enum {
18 UNUSED = 0,
19
20
21 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5,
22 DMAC1, SCIF0, SCIF1, DMAC2, IPSEC,
23 EDMAC0, EDMAC1, EDMAC2,
24 SIOF0, SIOF1,
25
26 TMU0, TMU1, TMU2,
27 RTC, WDT, REF,
28 };
29
30 static struct intc_vect vectors[] __initdata = {
31
32 INTC_VECT(DMAC1, 0x800), INTC_VECT(DMAC1, 0x820),
33 INTC_VECT(DMAC1, 0x840), INTC_VECT(DMAC1, 0x860),
34 INTC_VECT(SCIF0, 0x880), INTC_VECT(SCIF0, 0x8a0),
35 INTC_VECT(SCIF0, 0x8c0), INTC_VECT(SCIF0, 0x8e0),
36 INTC_VECT(SCIF1, 0x900), INTC_VECT(SCIF1, 0x920),
37 INTC_VECT(SCIF1, 0x940), INTC_VECT(SCIF1, 0x960),
38 INTC_VECT(DMAC2, 0xb80), INTC_VECT(DMAC2, 0xba0),
39 #ifdef CONFIG_CPU_SUBTYPE_SH7710
40 INTC_VECT(IPSEC, 0xbe0),
41 #endif
42 INTC_VECT(EDMAC0, 0xc00), INTC_VECT(EDMAC1, 0xc20),
43 INTC_VECT(EDMAC2, 0xc40),
44 INTC_VECT(SIOF0, 0xe00), INTC_VECT(SIOF0, 0xe20),
45 INTC_VECT(SIOF0, 0xe40), INTC_VECT(SIOF0, 0xe60),
46 INTC_VECT(SIOF1, 0xe80), INTC_VECT(SIOF1, 0xea0),
47 INTC_VECT(SIOF1, 0xec0), INTC_VECT(SIOF1, 0xee0),
48 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
49 INTC_VECT(TMU2, 0x440),
50 INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
51 INTC_VECT(RTC, 0x4c0),
52 INTC_VECT(WDT, 0x560),
53 INTC_VECT(REF, 0x580),
54 };
55
56 static struct intc_prio_reg prio_registers[] __initdata = {
57 { 0xfffffee2, 0, 16, 4, { TMU0, TMU1, TMU2, RTC } },
58 { 0xfffffee4, 0, 16, 4, { WDT, REF, 0, 0 } },
59 { 0xa4000016, 0, 16, 4, { IRQ3, IRQ2, IRQ1, IRQ0 } },
60 { 0xa4000018, 0, 16, 4, { 0, 0, IRQ5, IRQ4 } },
61 { 0xa400001a, 0, 16, 4, { DMAC1, SCIF0, SCIF1 } },
62 { 0xa4080000, 0, 16, 4, { IPSEC, DMAC2 } },
63 { 0xa4080002, 0, 16, 4, { EDMAC0, EDMAC1, EDMAC2 } },
64 { 0xa4080004, 0, 16, 4, { 0, 0, 0, SIOF0 } },
65 { 0xa4080006, 0, 16, 4, { 0, 0, SIOF1 } },
66 };
67
68 static DECLARE_INTC_DESC(intc_desc, "sh7710", vectors, NULL,
69 NULL, prio_registers, NULL);
70
71 static struct resource rtc_resources[] = {
72 [0] = {
73 .start = 0xa413fec0,
74 .end = 0xa413fec0 + 0x1e,
75 .flags = IORESOURCE_IO,
76 },
77 [1] = {
78 .start = evt2irq(0x480),
79 .flags = IORESOURCE_IRQ,
80 },
81 };
82
83 static struct sh_rtc_platform_info rtc_info = {
84 .capabilities = RTC_CAP_4_DIGIT_YEAR,
85 };
86
87 static struct platform_device rtc_device = {
88 .name = "sh-rtc",
89 .id = -1,
90 .num_resources = ARRAY_SIZE(rtc_resources),
91 .resource = rtc_resources,
92 .dev = {
93 .platform_data = &rtc_info,
94 },
95 };
96
97 static struct plat_sci_port scif0_platform_data = {
98 .scscr = SCSCR_REIE | SCSCR_CKE1,
99 .type = PORT_SCIF,
100 };
101
102 static struct resource scif0_resources[] = {
103 DEFINE_RES_MEM(0xa4400000, 0x100),
104 DEFINE_RES_IRQ(evt2irq(0x880)),
105 };
106
107 static struct platform_device scif0_device = {
108 .name = "sh-sci",
109 .id = 0,
110 .resource = scif0_resources,
111 .num_resources = ARRAY_SIZE(scif0_resources),
112 .dev = {
113 .platform_data = &scif0_platform_data,
114 },
115 };
116
117 static struct plat_sci_port scif1_platform_data = {
118 .scscr = SCSCR_REIE | SCSCR_CKE1,
119 .type = PORT_SCIF,
120 };
121
122 static struct resource scif1_resources[] = {
123 DEFINE_RES_MEM(0xa4410000, 0x100),
124 DEFINE_RES_IRQ(evt2irq(0x900)),
125 };
126
127 static struct platform_device scif1_device = {
128 .name = "sh-sci",
129 .id = 1,
130 .resource = scif1_resources,
131 .num_resources = ARRAY_SIZE(scif1_resources),
132 .dev = {
133 .platform_data = &scif1_platform_data,
134 },
135 };
136
137 static struct sh_timer_config tmu0_platform_data = {
138 .channels_mask = 7,
139 };
140
141 static struct resource tmu0_resources[] = {
142 DEFINE_RES_MEM(0xa412fe90, 0x28),
143 DEFINE_RES_IRQ(evt2irq(0x400)),
144 DEFINE_RES_IRQ(evt2irq(0x420)),
145 DEFINE_RES_IRQ(evt2irq(0x440)),
146 };
147
148 static struct platform_device tmu0_device = {
149 .name = "sh-tmu-sh3",
150 .id = 0,
151 .dev = {
152 .platform_data = &tmu0_platform_data,
153 },
154 .resource = tmu0_resources,
155 .num_resources = ARRAY_SIZE(tmu0_resources),
156 };
157
158 static struct platform_device *sh7710_devices[] __initdata = {
159 &scif0_device,
160 &scif1_device,
161 &tmu0_device,
162 &rtc_device,
163 };
164
165 static int __init sh7710_devices_setup(void)
166 {
167 return platform_add_devices(sh7710_devices,
168 ARRAY_SIZE(sh7710_devices));
169 }
170 arch_initcall(sh7710_devices_setup);
171
172 static struct platform_device *sh7710_early_devices[] __initdata = {
173 &scif0_device,
174 &scif1_device,
175 &tmu0_device,
176 };
177
178 void __init plat_early_device_setup(void)
179 {
180 early_platform_add_devices(sh7710_early_devices,
181 ARRAY_SIZE(sh7710_early_devices));
182 }
183
184 void __init plat_irq_setup(void)
185 {
186 register_intc_controller(&intc_desc);
187 plat_irq_setup_sh3();
188 }