This source file includes following definitions.
- master_clk_init
- module_clk_recalc
- bus_clk_recalc
- cpu_clk_recalc
- arch_init_clk_ops
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16 #include <linux/init.h>
17 #include <linux/kernel.h>
18 #include <asm/clock.h>
19 #include <asm/freq.h>
20 #include <asm/io.h>
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22
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24
25
26 static int stc_multipliers[] = { 1, 2, 3, 4, 6, 1, 1, 1 };
27 static int ifc_divisors[] = { 1, 2, 3, 4, 1, 1, 1, 1 };
28 static int pfc_divisors[] = { 1, 2, 3, 4, 6, 1, 1, 1 };
29
30 static void master_clk_init(struct clk *clk)
31 {
32 clk->rate *= pfc_divisors[__raw_readw(FRQCR) & 0x0003];
33 }
34
35 static struct sh_clk_ops sh7705_master_clk_ops = {
36 .init = master_clk_init,
37 };
38
39 static unsigned long module_clk_recalc(struct clk *clk)
40 {
41 int idx = __raw_readw(FRQCR) & 0x0003;
42 return clk->parent->rate / pfc_divisors[idx];
43 }
44
45 static struct sh_clk_ops sh7705_module_clk_ops = {
46 .recalc = module_clk_recalc,
47 };
48
49 static unsigned long bus_clk_recalc(struct clk *clk)
50 {
51 int idx = (__raw_readw(FRQCR) & 0x0300) >> 8;
52 return clk->parent->rate / stc_multipliers[idx];
53 }
54
55 static struct sh_clk_ops sh7705_bus_clk_ops = {
56 .recalc = bus_clk_recalc,
57 };
58
59 static unsigned long cpu_clk_recalc(struct clk *clk)
60 {
61 int idx = (__raw_readw(FRQCR) & 0x0030) >> 4;
62 return clk->parent->rate / ifc_divisors[idx];
63 }
64
65 static struct sh_clk_ops sh7705_cpu_clk_ops = {
66 .recalc = cpu_clk_recalc,
67 };
68
69 static struct sh_clk_ops *sh7705_clk_ops[] = {
70 &sh7705_master_clk_ops,
71 &sh7705_module_clk_ops,
72 &sh7705_bus_clk_ops,
73 &sh7705_cpu_clk_ops,
74 };
75
76 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
77 {
78 if (idx < ARRAY_SIZE(sh7705_clk_ops))
79 *ops = sh7705_clk_ops[idx];
80 }
81