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7 #ifndef __PPC_FSL_PM_H
8 #define __PPC_FSL_PM_H
9
10 #define E500_PM_PH10 1
11 #define E500_PM_PH15 2
12 #define E500_PM_PH20 3
13 #define E500_PM_PH30 4
14 #define E500_PM_DOZE E500_PM_PH10
15 #define E500_PM_NAP E500_PM_PH15
16
17 #define PLAT_PM_SLEEP 20
18 #define PLAT_PM_LPM20 30
19
20 #define FSL_PM_SLEEP (1 << 0)
21 #define FSL_PM_DEEP_SLEEP (1 << 1)
22
23 struct fsl_pm_ops {
24
25 void (*irq_mask)(int cpu);
26
27
28 void (*irq_unmask)(int cpu);
29 void (*cpu_enter_state)(int cpu, int state);
30 void (*cpu_exit_state)(int cpu, int state);
31 void (*cpu_up_prepare)(int cpu);
32 void (*cpu_die)(int cpu);
33 int (*plat_enter_sleep)(void);
34 void (*freeze_time_base)(bool freeze);
35
36
37 void (*set_ip_power)(bool enable, u32 mask);
38
39
40 unsigned int (*get_pm_modes)(void);
41 };
42
43 extern const struct fsl_pm_ops *qoriq_pm_ops;
44
45 int __init fsl_rcpm_init(void);
46
47 #endif