This source file includes following definitions.
- mpc52xx_setup_pci
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13 #ifndef __ASM_POWERPC_MPC52xx_H__
14 #define __ASM_POWERPC_MPC52xx_H__
15
16 #ifndef __ASSEMBLY__
17 #include <asm/types.h>
18 #include <asm/prom.h>
19 #include <asm/mpc5xxx.h>
20 #endif
21
22 #include <linux/suspend.h>
23
24
25 #define MPC5200_SVR 0x80110010
26 #define MPC5200_SVR_MASK 0xfffffff0
27 #define MPC5200B_SVR 0x80110020
28 #define MPC5200B_SVR_MASK 0xfffffff0
29
30
31
32
33
34 #ifndef __ASSEMBLY__
35
36
37 struct mpc52xx_mmap_ctl {
38 u32 mbar;
39
40 u32 cs0_start;
41 u32 cs0_stop;
42 u32 cs1_start;
43 u32 cs1_stop;
44 u32 cs2_start;
45 u32 cs2_stop;
46 u32 cs3_start;
47 u32 cs3_stop;
48 u32 cs4_start;
49 u32 cs4_stop;
50 u32 cs5_start;
51 u32 cs5_stop;
52
53 u32 sdram0;
54 u32 sdram1;
55
56 u32 reserved[4];
57
58 u32 boot_start;
59 u32 boot_stop;
60
61 u32 ipbi_ws_ctrl;
62
63 u32 cs6_start;
64 u32 cs6_stop;
65 u32 cs7_start;
66 u32 cs7_stop;
67 };
68
69
70 struct mpc52xx_sdram {
71 u32 mode;
72 u32 ctrl;
73 u32 config1;
74 u32 config2;
75 };
76
77
78 struct mpc52xx_sdma {
79 u32 taskBar;
80 u32 currentPointer;
81 u32 endPointer;
82 u32 variablePointer;
83
84 u8 IntVect1;
85 u8 IntVect2;
86 u16 PtdCntrl;
87
88 u32 IntPend;
89 u32 IntMask;
90
91 u16 tcr[16];
92
93 u8 ipr[32];
94
95 u32 cReqSelect;
96 u32 task_size0;
97 u32 task_size1;
98 u32 MDEDebug;
99 u32 ADSDebug;
100 u32 Value1;
101 u32 Value2;
102 u32 Control;
103 u32 Status;
104 u32 PTDDebug;
105 };
106
107
108 struct mpc52xx_gpt {
109 u32 mode;
110 u32 count;
111 u32 pwm;
112 u32 status;
113 };
114
115
116 struct mpc52xx_gpio {
117 u32 port_config;
118 u32 simple_gpioe;
119 u32 simple_ode;
120 u32 simple_ddr;
121 u32 simple_dvo;
122 u32 simple_ival;
123 u8 outo_gpioe;
124 u8 reserved1[3];
125 u8 outo_dvo;
126 u8 reserved2[3];
127 u8 sint_gpioe;
128 u8 reserved3[3];
129 u8 sint_ode;
130 u8 reserved4[3];
131 u8 sint_ddr;
132 u8 reserved5[3];
133 u8 sint_dvo;
134 u8 reserved6[3];
135 u8 sint_inten;
136 u8 reserved7[3];
137 u16 sint_itype;
138 u16 reserved8;
139 u8 gpio_control;
140 u8 reserved9[3];
141 u8 sint_istat;
142 u8 sint_ival;
143 u8 bus_errs;
144 u8 reserved10;
145 };
146
147 #define MPC52xx_GPIO_PSC_CONFIG_UART_WITHOUT_CD 4
148 #define MPC52xx_GPIO_PSC_CONFIG_UART_WITH_CD 5
149 #define MPC52xx_GPIO_PCI_DIS (1<<15)
150
151
152 struct mpc52xx_gpio_wkup {
153 u8 wkup_gpioe;
154 u8 reserved1[3];
155 u8 wkup_ode;
156 u8 reserved2[3];
157 u8 wkup_ddr;
158 u8 reserved3[3];
159 u8 wkup_dvo;
160 u8 reserved4[3];
161 u8 wkup_inten;
162 u8 reserved5[3];
163 u8 wkup_iinten;
164 u8 reserved6[3];
165 u16 wkup_itype;
166 u8 reserved7[2];
167 u8 wkup_maste;
168 u8 reserved8[3];
169 u8 wkup_ival;
170 u8 reserved9[3];
171 u8 wkup_istat;
172 u8 reserved10[3];
173 };
174
175
176 struct mpc52xx_xlb {
177 u8 reserved[0x40];
178 u32 config;
179 u32 version;
180 u32 status;
181 u32 int_enable;
182 u32 addr_capture;
183 u32 bus_sig_capture;
184 u32 addr_timeout;
185 u32 data_timeout;
186 u32 bus_act_timeout;
187 u32 master_pri_enable;
188 u32 master_priority;
189 u32 base_address;
190 u32 snoop_window;
191 };
192
193 #define MPC52xx_XLB_CFG_PLDIS (1 << 31)
194 #define MPC52xx_XLB_CFG_SNOOP (1 << 15)
195
196
197 struct mpc52xx_cdm {
198 u32 jtag_id;
199 u32 rstcfg;
200 u32 breadcrumb;
201
202 u8 mem_clk_sel;
203 u8 xlb_clk_sel;
204 u8 ipb_clk_sel;
205 u8 pci_clk_sel;
206
207 u8 ext_48mhz_en;
208 u8 fd_enable;
209 u16 fd_counters;
210
211 u32 clk_enables;
212
213 u8 osc_disable;
214 u8 reserved0[3];
215
216 u8 ccs_sleep_enable;
217 u8 osc_sleep_enable;
218 u8 reserved1;
219 u8 ccs_qreq_test;
220
221 u8 soft_reset;
222 u8 no_ckstp;
223 u8 reserved2[2];
224
225 u8 pll_lock;
226 u8 pll_looselock;
227 u8 pll_sm_lockwin;
228 u8 reserved3;
229
230 u16 reserved4;
231 u16 mclken_div_psc1;
232
233 u16 reserved5;
234 u16 mclken_div_psc2;
235
236 u16 reserved6;
237 u16 mclken_div_psc3;
238
239 u16 reserved7;
240 u16 mclken_div_psc6;
241 };
242
243
244 struct mpc52xx_intr {
245 u32 per_mask;
246 u32 per_pri1;
247 u32 per_pri2;
248 u32 per_pri3;
249 u32 ctrl;
250 u32 main_mask;
251 u32 main_pri1;
252 u32 main_pri2;
253 u32 reserved1;
254 u32 enc_status;
255 u32 crit_status;
256 u32 main_status;
257 u32 per_status;
258 u32 reserved2;
259 u32 per_error;
260 };
261
262 #endif
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267
268
269 #ifndef __ASSEMBLY__
270
271
272 extern void mpc5200_setup_xlb_arbiter(void);
273 extern void mpc52xx_declare_of_platform_devices(void);
274 extern int mpc5200_psc_ac97_gpio_reset(int psc_number);
275 extern void mpc52xx_map_common_devices(void);
276 extern int mpc52xx_set_psc_clkdiv(int psc_id, int clkdiv);
277 extern unsigned int mpc52xx_get_xtal_freq(struct device_node *node);
278 extern void __noreturn mpc52xx_restart(char *cmd);
279
280
281 struct mpc52xx_gpt_priv;
282 extern struct mpc52xx_gpt_priv *mpc52xx_gpt_from_irq(int irq);
283 extern int mpc52xx_gpt_start_timer(struct mpc52xx_gpt_priv *gpt, u64 period,
284 int continuous);
285 extern u64 mpc52xx_gpt_timer_period(struct mpc52xx_gpt_priv *gpt);
286 extern int mpc52xx_gpt_stop_timer(struct mpc52xx_gpt_priv *gpt);
287
288
289 #define MPC52XX_LPBFIFO_FLAG_READ (0)
290 #define MPC52XX_LPBFIFO_FLAG_WRITE (1<<0)
291 #define MPC52XX_LPBFIFO_FLAG_NO_INCREMENT (1<<1)
292 #define MPC52XX_LPBFIFO_FLAG_NO_DMA (1<<2)
293 #define MPC52XX_LPBFIFO_FLAG_POLL_DMA (1<<3)
294
295 struct mpc52xx_lpbfifo_request {
296 struct list_head list;
297
298
299 unsigned int cs;
300 size_t offset;
301
302
303 void *data;
304 phys_addr_t data_phys;
305
306
307 size_t size;
308 size_t pos;
309 int flags;
310 int defer_xfer_start;
311
312
313 void (*callback)(struct mpc52xx_lpbfifo_request *);
314
315 void *priv;
316
317
318 int irq_count;
319 int irq_ticks;
320 u8 last_byte;
321 int buffer_not_done_cnt;
322 };
323
324 extern int mpc52xx_lpbfifo_submit(struct mpc52xx_lpbfifo_request *req);
325 extern void mpc52xx_lpbfifo_abort(struct mpc52xx_lpbfifo_request *req);
326 extern void mpc52xx_lpbfifo_poll(void);
327 extern int mpc52xx_lpbfifo_start_xfer(struct mpc52xx_lpbfifo_request *req);
328
329
330 extern void mpc52xx_init_irq(void);
331 extern unsigned int mpc52xx_get_irq(void);
332
333
334 #ifdef CONFIG_PCI
335 extern int __init mpc52xx_add_bridge(struct device_node *node);
336 extern void __init mpc52xx_setup_pci(void);
337 #else
338 static inline void mpc52xx_setup_pci(void) { }
339 #endif
340
341 #endif
342
343 #ifdef CONFIG_PM
344 struct mpc52xx_suspend {
345 void (*board_suspend_prepare)(void __iomem *mbar);
346 void (*board_resume_finish)(void __iomem *mbar);
347 };
348
349 extern struct mpc52xx_suspend mpc52xx_suspend;
350 extern int __init mpc52xx_pm_init(void);
351 extern int mpc52xx_set_wakeup_gpio(u8 pin, u8 level);
352
353
354 extern int mpc52xx_pm_prepare(void);
355 extern int mpc52xx_pm_enter(suspend_state_t);
356 extern void mpc52xx_pm_finish(void);
357 extern char saved_sram[0x4000];
358
359 #ifdef CONFIG_PPC_LITE5200
360 int __init lite5200_pm_init(void);
361 #endif
362 #endif
363
364 #endif
365