root/arch/powerpc/platforms/83xx/mpc832x_mds.c

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DEFINITIONS

This source file includes following definitions.
  1. mpc832x_sys_setup_arch
  2. mpc832x_sys_probe
  3. define_machine

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * Copyright 2006 Freescale Semiconductor, Inc. All rights reserved.
   4  *
   5  * Description:
   6  * MPC832xE MDS board specific routines.
   7  */
   8 
   9 #include <linux/stddef.h>
  10 #include <linux/kernel.h>
  11 #include <linux/init.h>
  12 #include <linux/errno.h>
  13 #include <linux/reboot.h>
  14 #include <linux/pci.h>
  15 #include <linux/kdev_t.h>
  16 #include <linux/major.h>
  17 #include <linux/console.h>
  18 #include <linux/delay.h>
  19 #include <linux/seq_file.h>
  20 #include <linux/root_dev.h>
  21 #include <linux/initrd.h>
  22 #include <linux/of_platform.h>
  23 #include <linux/of_device.h>
  24 
  25 #include <linux/atomic.h>
  26 #include <asm/time.h>
  27 #include <asm/io.h>
  28 #include <asm/machdep.h>
  29 #include <asm/ipic.h>
  30 #include <asm/irq.h>
  31 #include <asm/prom.h>
  32 #include <asm/udbg.h>
  33 #include <sysdev/fsl_soc.h>
  34 #include <sysdev/fsl_pci.h>
  35 #include <soc/fsl/qe/qe.h>
  36 #include <soc/fsl/qe/qe_ic.h>
  37 
  38 #include "mpc83xx.h"
  39 
  40 #undef DEBUG
  41 #ifdef DEBUG
  42 #define DBG(fmt...) udbg_printf(fmt)
  43 #else
  44 #define DBG(fmt...)
  45 #endif
  46 
  47 /* ************************************************************************
  48  *
  49  * Setup the architecture
  50  *
  51  */
  52 static void __init mpc832x_sys_setup_arch(void)
  53 {
  54         struct device_node *np;
  55         u8 __iomem *bcsr_regs = NULL;
  56 
  57         mpc83xx_setup_arch();
  58 
  59         /* Map BCSR area */
  60         np = of_find_node_by_name(NULL, "bcsr");
  61         if (np) {
  62                 struct resource res;
  63 
  64                 of_address_to_resource(np, 0, &res);
  65                 bcsr_regs = ioremap(res.start, resource_size(&res));
  66                 of_node_put(np);
  67         }
  68 
  69 #ifdef CONFIG_QUICC_ENGINE
  70         if ((np = of_find_node_by_name(NULL, "par_io")) != NULL) {
  71                 par_io_init(np);
  72                 of_node_put(np);
  73 
  74                 for_each_node_by_name(np, "ucc")
  75                         par_io_of_config(np);
  76         }
  77 
  78         if ((np = of_find_compatible_node(NULL, "network", "ucc_geth"))
  79                         != NULL){
  80                 /* Reset the Ethernet PHYs */
  81 #define BCSR8_FETH_RST 0x50
  82                 clrbits8(&bcsr_regs[8], BCSR8_FETH_RST);
  83                 udelay(1000);
  84                 setbits8(&bcsr_regs[8], BCSR8_FETH_RST);
  85                 iounmap(bcsr_regs);
  86                 of_node_put(np);
  87         }
  88 #endif                          /* CONFIG_QUICC_ENGINE */
  89 }
  90 
  91 machine_device_initcall(mpc832x_mds, mpc83xx_declare_of_platform_devices);
  92 
  93 /*
  94  * Called very early, MMU is off, device-tree isn't unflattened
  95  */
  96 static int __init mpc832x_sys_probe(void)
  97 {
  98         return of_machine_is_compatible("MPC832xMDS");
  99 }
 100 
 101 define_machine(mpc832x_mds) {
 102         .name           = "MPC832x MDS",
 103         .probe          = mpc832x_sys_probe,
 104         .setup_arch     = mpc832x_sys_setup_arch,
 105         .init_IRQ       = mpc83xx_ipic_and_qe_init_IRQ,
 106         .get_irq        = ipic_get_irq,
 107         .restart        = mpc83xx_restart,
 108         .time_init      = mpc83xx_time_init,
 109         .calibrate_decr = generic_calibrate_decr,
 110         .progress       = udbg_progress,
 111 };

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