root/arch/powerpc/lib/string_32.S

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 
   3 /*
   4  * String handling functions for PowerPC32
   5  *
   6  * Copyright (C) 1996 Paul Mackerras.
   7  *
   8  */
   9 
  10 #include <asm/ppc_asm.h>
  11 #include <asm/export.h>
  12 #include <asm/cache.h>
  13 
  14         .text
  15 
  16 CACHELINE_BYTES = L1_CACHE_BYTES
  17 LG_CACHELINE_BYTES = L1_CACHE_SHIFT
  18 CACHELINE_MASK = (L1_CACHE_BYTES-1)
  19 
  20 _GLOBAL(__arch_clear_user)
  21 /*
  22  * Use dcbz on the complete cache lines in the destination
  23  * to set them to zero.  This requires that the destination
  24  * area is cacheable.
  25  */
  26         cmplwi  cr0, r4, 4
  27         mr      r10, r3
  28         li      r3, 0
  29         blt     7f
  30 
  31 11:     stw     r3, 0(r10)
  32         beqlr
  33         andi.   r0, r10, 3
  34         add     r11, r0, r4
  35         subf    r6, r0, r10
  36 
  37         clrlwi  r7, r6, 32 - LG_CACHELINE_BYTES
  38         add     r8, r7, r11
  39         srwi    r9, r8, LG_CACHELINE_BYTES
  40         addic.  r9, r9, -1      /* total number of complete cachelines */
  41         ble     2f
  42         xori    r0, r7, CACHELINE_MASK & ~3
  43         srwi.   r0, r0, 2
  44         beq     3f
  45         mtctr   r0
  46 4:      stwu    r3, 4(r6)
  47         bdnz    4b
  48 3:      mtctr   r9
  49         li      r7, 4
  50 10:     dcbz    r7, r6
  51         addi    r6, r6, CACHELINE_BYTES
  52         bdnz    10b
  53         clrlwi  r11, r8, 32 - LG_CACHELINE_BYTES
  54         addi    r11, r11, 4
  55 
  56 2:      srwi    r0 ,r11 ,2
  57         mtctr   r0
  58         bdz     6f
  59 1:      stwu    r3, 4(r6)
  60         bdnz    1b
  61 6:      andi.   r11, r11, 3
  62         beqlr
  63         mtctr   r11
  64         addi    r6, r6, 3
  65 8:      stbu    r3, 1(r6)
  66         bdnz    8b
  67         blr
  68 
  69 7:      cmpwi   cr0, r4, 0
  70         beqlr
  71         mtctr   r4
  72         addi    r6, r10, -1
  73 9:      stbu    r3, 1(r6)
  74         bdnz    9b
  75         blr
  76 
  77 90:     mr      r3, r4
  78         blr
  79 91:     add     r3, r10, r4
  80         subf    r3, r6, r3
  81         blr
  82 
  83         EX_TABLE(11b, 90b)
  84         EX_TABLE(4b, 91b)
  85         EX_TABLE(10b, 91b)
  86         EX_TABLE(1b, 91b)
  87         EX_TABLE(8b, 91b)
  88         EX_TABLE(9b, 91b)
  89 
  90 EXPORT_SYMBOL(__arch_clear_user)