1
2
3
4 #include <asm-generic/vmlinux.lds.h>
5
6 #include <asm/page.h>
7 #include <asm/thread_info.h>
8
9 #ifdef CONFIG_SPARC32
10 #define INITIAL_ADDRESS 0x10000 + SIZEOF_HEADERS
11 #define TEXTSTART 0xf0004000
12
13 #define SMP_CACHE_BYTES_SHIFT 5
14
15 #else
16 #define SMP_CACHE_BYTES_SHIFT 6
17 #define INITIAL_ADDRESS 0x4000
18 #define TEXTSTART 0x0000000000404000
19
20 #endif
21
22 #define SMP_CACHE_BYTES (1 << SMP_CACHE_BYTES_SHIFT)
23
24 #ifdef CONFIG_SPARC32
25 OUTPUT_FORMAT("elf32-sparc", "elf32-sparc", "elf32-sparc")
26 OUTPUT_ARCH(sparc)
27 ENTRY(_start)
28 jiffies = jiffies_64 + 4;
29 #else
30
31 OUTPUT_FORMAT("elf64-sparc", "elf64-sparc", "elf64-sparc")
32 OUTPUT_ARCH(sparc:v9a)
33 ENTRY(_start)
34 jiffies = jiffies_64;
35 #endif
36
37 #ifdef CONFIG_SPARC64
38 ASSERT((swapper_tsb == 0x0000000000408000), "Error: sparc64 early assembler too large")
39 #endif
40
41 SECTIONS
42 {
43 #ifdef CONFIG_SPARC64
44 swapper_pg_dir = 0x0000000000402000;
45 #endif
46 . = INITIAL_ADDRESS;
47 .text TEXTSTART :
48 {
49 _text = .;
50 HEAD_TEXT
51 TEXT_TEXT
52 SCHED_TEXT
53 CPUIDLE_TEXT
54 LOCK_TEXT
55 KPROBES_TEXT
56 IRQENTRY_TEXT
57 SOFTIRQENTRY_TEXT
58 *(.gnu.warning)
59 } = 0
60 _etext = .;
61
62 RO_DATA(PAGE_SIZE)
63
64
65 _sdata = .;
66
67 .data1 : {
68 *(.data1)
69 }
70 RW_DATA_SECTION(SMP_CACHE_BYTES, 0, THREAD_SIZE)
71
72
73 _edata = .;
74
75 .fixup : {
76 __start___fixup = .;
77 *(.fixup)
78 __stop___fixup = .;
79 }
80 EXCEPTION_TABLE(16)
81 NOTES
82
83 . = ALIGN(PAGE_SIZE);
84 __init_begin = ALIGN(PAGE_SIZE);
85 INIT_TEXT_SECTION(PAGE_SIZE)
86 __init_text_end = .;
87 INIT_DATA_SECTION(16)
88
89 . = ALIGN(4);
90 .tsb_ldquad_phys_patch : {
91 __tsb_ldquad_phys_patch = .;
92 *(.tsb_ldquad_phys_patch)
93 __tsb_ldquad_phys_patch_end = .;
94 }
95
96 .tsb_phys_patch : {
97 __tsb_phys_patch = .;
98 *(.tsb_phys_patch)
99 __tsb_phys_patch_end = .;
100 }
101
102 .cpuid_patch : {
103 __cpuid_patch = .;
104 *(.cpuid_patch)
105 __cpuid_patch_end = .;
106 }
107
108 .sun4v_1insn_patch : {
109 __sun4v_1insn_patch = .;
110 *(.sun4v_1insn_patch)
111 __sun4v_1insn_patch_end = .;
112 }
113 .sun4v_2insn_patch : {
114 __sun4v_2insn_patch = .;
115 *(.sun4v_2insn_patch)
116 __sun4v_2insn_patch_end = .;
117 }
118 .leon_1insn_patch : {
119 __leon_1insn_patch = .;
120 *(.leon_1insn_patch)
121 __leon_1insn_patch_end = .;
122 }
123 .swapper_tsb_phys_patch : {
124 __swapper_tsb_phys_patch = .;
125 *(.swapper_tsb_phys_patch)
126 __swapper_tsb_phys_patch_end = .;
127 }
128 .swapper_4m_tsb_phys_patch : {
129 __swapper_4m_tsb_phys_patch = .;
130 *(.swapper_4m_tsb_phys_patch)
131 __swapper_4m_tsb_phys_patch_end = .;
132 }
133 .popc_3insn_patch : {
134 __popc_3insn_patch = .;
135 *(.popc_3insn_patch)
136 __popc_3insn_patch_end = .;
137 }
138 .popc_6insn_patch : {
139 __popc_6insn_patch = .;
140 *(.popc_6insn_patch)
141 __popc_6insn_patch_end = .;
142 }
143 .pause_3insn_patch : {
144 __pause_3insn_patch = .;
145 *(.pause_3insn_patch)
146 __pause_3insn_patch_end = .;
147 }
148 .sun_m7_1insn_patch : {
149 __sun_m7_1insn_patch = .;
150 *(.sun_m7_1insn_patch)
151 __sun_m7_1insn_patch_end = .;
152 }
153 .sun_m7_2insn_patch : {
154 __sun_m7_2insn_patch = .;
155 *(.sun_m7_2insn_patch)
156 __sun_m7_2insn_patch_end = .;
157 }
158 .get_tick_patch : {
159 __get_tick_patch = .;
160 *(.get_tick_patch)
161 __get_tick_patch_end = .;
162 }
163 .pud_huge_patch : {
164 __pud_huge_patch = .;
165 *(.pud_huge_patch)
166 __pud_huge_patch_end = .;
167 }
168 .fast_win_ctrl_1insn_patch : {
169 __fast_win_ctrl_1insn_patch = .;
170 *(.fast_win_ctrl_1insn_patch)
171 __fast_win_ctrl_1insn_patch_end = .;
172 }
173 PERCPU_SECTION(SMP_CACHE_BYTES)
174
175 . = ALIGN(PAGE_SIZE);
176 .exit.text : {
177 EXIT_TEXT
178 }
179
180 .exit.data : {
181 EXIT_DATA
182 }
183
184 . = ALIGN(PAGE_SIZE);
185 __init_end = .;
186 BSS_SECTION(0, 0, 0)
187 _end = . ;
188
189 STABS_DEBUG
190 DWARF_DEBUG
191
192 DISCARDS
193 }