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8
9 #include <asm/processor.h>
10 #include <asm/ppc_asm.h>
11 #include <asm/unistd.h>
12 #include <asm/vdso.h>
13
14 .text
15
16
17
18
19
20
21 nop
22 V_FUNCTION_BEGIN(__kernel_sigtramp32)
23 .Lsig_start = . - 4
24 li r0,__NR_sigreturn
25 sc
26 .Lsig_end:
27 V_FUNCTION_END(__kernel_sigtramp32)
28
29 .Lsigrt_start:
30 nop
31 V_FUNCTION_BEGIN(__kernel_sigtramp_rt32)
32 li r0,__NR_rt_sigreturn
33 sc
34 .Lsigrt_end:
35 V_FUNCTION_END(__kernel_sigtramp_rt32)
36
37 .section .eh_frame,"a",@progbits
38
39
40
41 #define cfa_save \
42 .byte 0x0f; \
43 .uleb128 9f - 1f; \
44 1: \
45 .byte 0x71; .sleb128 PTREGS; \
46 .byte 0x06; \
47 .byte 0x23; .uleb128 RSIZE; \
48 .byte 0x06; \
49 9:
50
51
52
53 #define rsave(regno, ofs) \
54 .byte 0x10; \
55 .uleb128 regno; \
56 .uleb128 9f - 1f; \
57 1: \
58 .byte 0x71; .sleb128 PTREGS; \
59 .byte 0x06; \
60 .ifne ofs; \
61 .byte 0x23; .uleb128 ofs; \
62 .endif; \
63 9:
64
65
66
67
68
69 #define vsave_msr0(regno) \
70 .byte 0x10; \
71 .uleb128 regno + 77; \
72 .uleb128 9f - 1f; \
73 1: \
74 .byte 0x30 + regno; \
75 2: \
76 .byte 0x40; \
77 .byte 0x1e; \
78 3: \
79 .byte 0x71; .sleb128 PTREGS; \
80 .byte 0x06; \
81 .byte 0x12; \
82 .byte 0x23; \
83 .uleb128 33*RSIZE; \
84 .byte 0x06; \
85 .byte 0x0c; .long 1 << 25; \
86 .byte 0x1a; \
87 .byte 0x12; \
88 .byte 0x30; \
89 .byte 0x29; \
90 .byte 0x28; .short 0x7fff; \
91 .byte 0x13; \
92 .byte 0x23; .uleb128 VREGS; \
93 .byte 0x22; \
94 .byte 0x2f; .short 0x7fff; \
95 9:
96
97
98
99 #define vsave_msr1(regno) \
100 .byte 0x10; \
101 .uleb128 regno + 77; \
102 .uleb128 9f - 1f; \
103 1: \
104 .byte 0x30 + regno; \
105 .byte 0x2f; .short 2b - 9f; \
106 9:
107
108
109
110 #define vsave_msr2(regno, ofs) \
111 .byte 0x10; \
112 .uleb128 regno + 77; \
113 .uleb128 9f - 1f; \
114 1: \
115 .byte 0x0a; .short ofs; \
116 .byte 0x2f; .short 3b - 9f; \
117 9:
118
119
120 #define vsave(regno, ofs) \
121 .byte 0x10; \
122 .uleb128 regno + 77; \
123 .uleb128 9f - 1f; \
124 1: \
125 .byte 0x71; .sleb128 PTREGS; \
126 .byte 0x06; \
127 .byte 0x23; .uleb128 VREGS; \
128 .byte 0x23; .uleb128 ofs; \
129 9:
130
131
132 #define PTREGS 64+28
133
134
135 #define RSIZE 4
136
137
138 #define VREGS 48*RSIZE+34*8
139
140
141 #define EH_FRAME_GEN \
142 cfa_save; \
143 rsave ( 0, 0*RSIZE); \
144 rsave ( 2, 2*RSIZE); \
145 rsave ( 3, 3*RSIZE); \
146 rsave ( 4, 4*RSIZE); \
147 rsave ( 5, 5*RSIZE); \
148 rsave ( 6, 6*RSIZE); \
149 rsave ( 7, 7*RSIZE); \
150 rsave ( 8, 8*RSIZE); \
151 rsave ( 9, 9*RSIZE); \
152 rsave (10, 10*RSIZE); \
153 rsave (11, 11*RSIZE); \
154 rsave (12, 12*RSIZE); \
155 rsave (13, 13*RSIZE); \
156 rsave (14, 14*RSIZE); \
157 rsave (15, 15*RSIZE); \
158 rsave (16, 16*RSIZE); \
159 rsave (17, 17*RSIZE); \
160 rsave (18, 18*RSIZE); \
161 rsave (19, 19*RSIZE); \
162 rsave (20, 20*RSIZE); \
163 rsave (21, 21*RSIZE); \
164 rsave (22, 22*RSIZE); \
165 rsave (23, 23*RSIZE); \
166 rsave (24, 24*RSIZE); \
167 rsave (25, 25*RSIZE); \
168 rsave (26, 26*RSIZE); \
169 rsave (27, 27*RSIZE); \
170 rsave (28, 28*RSIZE); \
171 rsave (29, 29*RSIZE); \
172 rsave (30, 30*RSIZE); \
173 rsave (31, 31*RSIZE); \
174 rsave (67, 32*RSIZE); \
175 rsave (65, 36*RSIZE); \
176 rsave (70, 38*RSIZE)
177
178
179 #define EH_FRAME_FP \
180 rsave (32, 48*RSIZE + 0*8); \
181 rsave (33, 48*RSIZE + 1*8); \
182 rsave (34, 48*RSIZE + 2*8); \
183 rsave (35, 48*RSIZE + 3*8); \
184 rsave (36, 48*RSIZE + 4*8); \
185 rsave (37, 48*RSIZE + 5*8); \
186 rsave (38, 48*RSIZE + 6*8); \
187 rsave (39, 48*RSIZE + 7*8); \
188 rsave (40, 48*RSIZE + 8*8); \
189 rsave (41, 48*RSIZE + 9*8); \
190 rsave (42, 48*RSIZE + 10*8); \
191 rsave (43, 48*RSIZE + 11*8); \
192 rsave (44, 48*RSIZE + 12*8); \
193 rsave (45, 48*RSIZE + 13*8); \
194 rsave (46, 48*RSIZE + 14*8); \
195 rsave (47, 48*RSIZE + 15*8); \
196 rsave (48, 48*RSIZE + 16*8); \
197 rsave (49, 48*RSIZE + 17*8); \
198 rsave (50, 48*RSIZE + 18*8); \
199 rsave (51, 48*RSIZE + 19*8); \
200 rsave (52, 48*RSIZE + 20*8); \
201 rsave (53, 48*RSIZE + 21*8); \
202 rsave (54, 48*RSIZE + 22*8); \
203 rsave (55, 48*RSIZE + 23*8); \
204 rsave (56, 48*RSIZE + 24*8); \
205 rsave (57, 48*RSIZE + 25*8); \
206 rsave (58, 48*RSIZE + 26*8); \
207 rsave (59, 48*RSIZE + 27*8); \
208 rsave (60, 48*RSIZE + 28*8); \
209 rsave (61, 48*RSIZE + 29*8); \
210 rsave (62, 48*RSIZE + 30*8); \
211 rsave (63, 48*RSIZE + 31*8)
212
213
214 #ifdef CONFIG_ALTIVEC
215 #define EH_FRAME_VMX \
216 vsave_msr0 ( 0); \
217 vsave_msr1 ( 1); \
218 vsave_msr1 ( 2); \
219 vsave_msr1 ( 3); \
220 vsave_msr1 ( 4); \
221 vsave_msr1 ( 5); \
222 vsave_msr1 ( 6); \
223 vsave_msr1 ( 7); \
224 vsave_msr1 ( 8); \
225 vsave_msr1 ( 9); \
226 vsave_msr1 (10); \
227 vsave_msr1 (11); \
228 vsave_msr1 (12); \
229 vsave_msr1 (13); \
230 vsave_msr1 (14); \
231 vsave_msr1 (15); \
232 vsave_msr1 (16); \
233 vsave_msr1 (17); \
234 vsave_msr1 (18); \
235 vsave_msr1 (19); \
236 vsave_msr1 (20); \
237 vsave_msr1 (21); \
238 vsave_msr1 (22); \
239 vsave_msr1 (23); \
240 vsave_msr1 (24); \
241 vsave_msr1 (25); \
242 vsave_msr1 (26); \
243 vsave_msr1 (27); \
244 vsave_msr1 (28); \
245 vsave_msr1 (29); \
246 vsave_msr1 (30); \
247 vsave_msr1 (31); \
248 vsave_msr2 (33, 32*16+12); \
249 vsave (32, 32*16)
250 #else
251 #define EH_FRAME_VMX
252 #endif
253
254 .Lcie:
255 .long .Lcie_end - .Lcie_start
256 .Lcie_start:
257 .long 0
258 .byte 1
259 .string "zRS"
260 .uleb128 4
261 .sleb128 -4
262 .byte 67
263 .uleb128 1
264 .byte 0x1b
265 .byte 0x0c,1,0
266 .balign 4
267 .Lcie_end:
268
269 .long .Lfde0_end - .Lfde0_start
270 .Lfde0_start:
271 .long .Lfde0_start - .Lcie
272 .long .Lsig_start - .
273 .long .Lsig_end - .Lsig_start
274 .uleb128 0
275 EH_FRAME_GEN
276 EH_FRAME_FP
277 EH_FRAME_VMX
278 .balign 4
279 .Lfde0_end:
280
281
282 #undef PTREGS
283 #define PTREGS 64+16+128+20+28
284
285 .long .Lfde1_end - .Lfde1_start
286 .Lfde1_start:
287 .long .Lfde1_start - .Lcie
288 .long .Lsigrt_start - .
289 .long .Lsigrt_end - .Lsigrt_start
290 .uleb128 0
291 EH_FRAME_GEN
292 EH_FRAME_FP
293 EH_FRAME_VMX
294 .balign 4
295 .Lfde1_end: