This source file includes following definitions.
- do_async_xor
- do_sync_xor
- async_xor
- page_is_zero
- xor_val_chan
- async_xor_val
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13 #include <linux/kernel.h>
14 #include <linux/interrupt.h>
15 #include <linux/module.h>
16 #include <linux/mm.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/raid/xor.h>
19 #include <linux/async_tx.h>
20
21
22 static __async_inline struct dma_async_tx_descriptor *
23 do_async_xor(struct dma_chan *chan, struct dmaengine_unmap_data *unmap,
24 struct async_submit_ctl *submit)
25 {
26 struct dma_device *dma = chan->device;
27 struct dma_async_tx_descriptor *tx = NULL;
28 dma_async_tx_callback cb_fn_orig = submit->cb_fn;
29 void *cb_param_orig = submit->cb_param;
30 enum async_tx_flags flags_orig = submit->flags;
31 enum dma_ctrl_flags dma_flags = 0;
32 int src_cnt = unmap->to_cnt;
33 int xor_src_cnt;
34 dma_addr_t dma_dest = unmap->addr[unmap->to_cnt];
35 dma_addr_t *src_list = unmap->addr;
36
37 while (src_cnt) {
38 dma_addr_t tmp;
39
40 submit->flags = flags_orig;
41 xor_src_cnt = min(src_cnt, (int)dma->max_xor);
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44
45 if (src_cnt > xor_src_cnt) {
46 submit->flags &= ~ASYNC_TX_ACK;
47 submit->flags |= ASYNC_TX_FENCE;
48 submit->cb_fn = NULL;
49 submit->cb_param = NULL;
50 } else {
51 submit->cb_fn = cb_fn_orig;
52 submit->cb_param = cb_param_orig;
53 }
54 if (submit->cb_fn)
55 dma_flags |= DMA_PREP_INTERRUPT;
56 if (submit->flags & ASYNC_TX_FENCE)
57 dma_flags |= DMA_PREP_FENCE;
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62 tmp = src_list[0];
63 if (src_list > unmap->addr)
64 src_list[0] = dma_dest;
65 tx = dma->device_prep_dma_xor(chan, dma_dest, src_list,
66 xor_src_cnt, unmap->len,
67 dma_flags);
68
69 if (unlikely(!tx))
70 async_tx_quiesce(&submit->depend_tx);
71
72
73 while (unlikely(!tx)) {
74 dma_async_issue_pending(chan);
75 tx = dma->device_prep_dma_xor(chan, dma_dest,
76 src_list,
77 xor_src_cnt, unmap->len,
78 dma_flags);
79 }
80 src_list[0] = tmp;
81
82 dma_set_unmap(tx, unmap);
83 async_tx_submit(chan, tx, submit);
84 submit->depend_tx = tx;
85
86 if (src_cnt > xor_src_cnt) {
87
88 src_cnt -= xor_src_cnt;
89
90 src_cnt++;
91 src_list += xor_src_cnt - 1;
92 } else
93 break;
94 }
95
96 return tx;
97 }
98
99 static void
100 do_sync_xor(struct page *dest, struct page **src_list, unsigned int offset,
101 int src_cnt, size_t len, struct async_submit_ctl *submit)
102 {
103 int i;
104 int xor_src_cnt = 0;
105 int src_off = 0;
106 void *dest_buf;
107 void **srcs;
108
109 if (submit->scribble)
110 srcs = submit->scribble;
111 else
112 srcs = (void **) src_list;
113
114
115 for (i = 0; i < src_cnt; i++)
116 if (src_list[i])
117 srcs[xor_src_cnt++] = page_address(src_list[i]) + offset;
118 src_cnt = xor_src_cnt;
119
120 dest_buf = page_address(dest) + offset;
121
122 if (submit->flags & ASYNC_TX_XOR_ZERO_DST)
123 memset(dest_buf, 0, len);
124
125 while (src_cnt > 0) {
126
127 xor_src_cnt = min(src_cnt, MAX_XOR_BLOCKS);
128 xor_blocks(xor_src_cnt, len, dest_buf, &srcs[src_off]);
129
130
131 src_cnt -= xor_src_cnt;
132 src_off += xor_src_cnt;
133 }
134
135 async_tx_sync_epilog(submit);
136 }
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159 struct dma_async_tx_descriptor *
160 async_xor(struct page *dest, struct page **src_list, unsigned int offset,
161 int src_cnt, size_t len, struct async_submit_ctl *submit)
162 {
163 struct dma_chan *chan = async_tx_find_channel(submit, DMA_XOR,
164 &dest, 1, src_list,
165 src_cnt, len);
166 struct dma_device *device = chan ? chan->device : NULL;
167 struct dmaengine_unmap_data *unmap = NULL;
168
169 BUG_ON(src_cnt <= 1);
170
171 if (device)
172 unmap = dmaengine_get_unmap_data(device->dev, src_cnt+1, GFP_NOWAIT);
173
174 if (unmap && is_dma_xor_aligned(device, offset, 0, len)) {
175 struct dma_async_tx_descriptor *tx;
176 int i, j;
177
178
179 pr_debug("%s (async): len: %zu\n", __func__, len);
180
181 unmap->len = len;
182 for (i = 0, j = 0; i < src_cnt; i++) {
183 if (!src_list[i])
184 continue;
185 unmap->to_cnt++;
186 unmap->addr[j++] = dma_map_page(device->dev, src_list[i],
187 offset, len, DMA_TO_DEVICE);
188 }
189
190
191 unmap->addr[j] = dma_map_page(device->dev, dest, offset, len,
192 DMA_BIDIRECTIONAL);
193 unmap->bidi_cnt = 1;
194
195 tx = do_async_xor(chan, unmap, submit);
196 dmaengine_unmap_put(unmap);
197 return tx;
198 } else {
199 dmaengine_unmap_put(unmap);
200
201 pr_debug("%s (sync): len: %zu\n", __func__, len);
202 WARN_ONCE(chan, "%s: no space for dma address conversion\n",
203 __func__);
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208 if (submit->flags & ASYNC_TX_XOR_DROP_DST) {
209 src_cnt--;
210 src_list++;
211 }
212
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214 async_tx_quiesce(&submit->depend_tx);
215
216 do_sync_xor(dest, src_list, offset, src_cnt, len, submit);
217
218 return NULL;
219 }
220 }
221 EXPORT_SYMBOL_GPL(async_xor);
222
223 static int page_is_zero(struct page *p, unsigned int offset, size_t len)
224 {
225 return !memchr_inv(page_address(p) + offset, 0, len);
226 }
227
228 static inline struct dma_chan *
229 xor_val_chan(struct async_submit_ctl *submit, struct page *dest,
230 struct page **src_list, int src_cnt, size_t len)
231 {
232 #ifdef CONFIG_ASYNC_TX_DISABLE_XOR_VAL_DMA
233 return NULL;
234 #endif
235 return async_tx_find_channel(submit, DMA_XOR_VAL, &dest, 1, src_list,
236 src_cnt, len);
237 }
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255 struct dma_async_tx_descriptor *
256 async_xor_val(struct page *dest, struct page **src_list, unsigned int offset,
257 int src_cnt, size_t len, enum sum_check_flags *result,
258 struct async_submit_ctl *submit)
259 {
260 struct dma_chan *chan = xor_val_chan(submit, dest, src_list, src_cnt, len);
261 struct dma_device *device = chan ? chan->device : NULL;
262 struct dma_async_tx_descriptor *tx = NULL;
263 struct dmaengine_unmap_data *unmap = NULL;
264
265 BUG_ON(src_cnt <= 1);
266
267 if (device)
268 unmap = dmaengine_get_unmap_data(device->dev, src_cnt, GFP_NOWAIT);
269
270 if (unmap && src_cnt <= device->max_xor &&
271 is_dma_xor_aligned(device, offset, 0, len)) {
272 unsigned long dma_prep_flags = 0;
273 int i;
274
275 pr_debug("%s: (async) len: %zu\n", __func__, len);
276
277 if (submit->cb_fn)
278 dma_prep_flags |= DMA_PREP_INTERRUPT;
279 if (submit->flags & ASYNC_TX_FENCE)
280 dma_prep_flags |= DMA_PREP_FENCE;
281
282 for (i = 0; i < src_cnt; i++) {
283 unmap->addr[i] = dma_map_page(device->dev, src_list[i],
284 offset, len, DMA_TO_DEVICE);
285 unmap->to_cnt++;
286 }
287 unmap->len = len;
288
289 tx = device->device_prep_dma_xor_val(chan, unmap->addr, src_cnt,
290 len, result,
291 dma_prep_flags);
292 if (unlikely(!tx)) {
293 async_tx_quiesce(&submit->depend_tx);
294
295 while (!tx) {
296 dma_async_issue_pending(chan);
297 tx = device->device_prep_dma_xor_val(chan,
298 unmap->addr, src_cnt, len, result,
299 dma_prep_flags);
300 }
301 }
302 dma_set_unmap(tx, unmap);
303 async_tx_submit(chan, tx, submit);
304 } else {
305 enum async_tx_flags flags_orig = submit->flags;
306
307 pr_debug("%s: (sync) len: %zu\n", __func__, len);
308 WARN_ONCE(device && src_cnt <= device->max_xor,
309 "%s: no space for dma address conversion\n",
310 __func__);
311
312 submit->flags |= ASYNC_TX_XOR_DROP_DST;
313 submit->flags &= ~ASYNC_TX_ACK;
314
315 tx = async_xor(dest, src_list, offset, src_cnt, len, submit);
316
317 async_tx_quiesce(&tx);
318
319 *result = !page_is_zero(dest, offset, len) << SUM_CHECK_P;
320
321 async_tx_sync_epilog(submit);
322 submit->flags = flags_orig;
323 }
324 dmaengine_unmap_put(unmap);
325
326 return tx;
327 }
328 EXPORT_SYMBOL_GPL(async_xor_val);
329
330 MODULE_AUTHOR("Intel Corporation");
331 MODULE_DESCRIPTION("asynchronous xor/xor-zero-sum api");
332 MODULE_LICENSE("GPL");