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10 #ifndef __ACTBL1_H__
11 #define __ACTBL1_H__
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26
27 #define ACPI_SIG_ASF "ASF!"
28 #define ACPI_SIG_BERT "BERT"
29 #define ACPI_SIG_BGRT "BGRT"
30 #define ACPI_SIG_BOOT "BOOT"
31 #define ACPI_SIG_CPEP "CPEP"
32 #define ACPI_SIG_CSRT "CSRT"
33 #define ACPI_SIG_DBG2 "DBG2"
34 #define ACPI_SIG_DBGP "DBGP"
35 #define ACPI_SIG_DMAR "DMAR"
36 #define ACPI_SIG_DRTM "DRTM"
37 #define ACPI_SIG_ECDT "ECDT"
38 #define ACPI_SIG_EINJ "EINJ"
39 #define ACPI_SIG_ERST "ERST"
40 #define ACPI_SIG_FPDT "FPDT"
41 #define ACPI_SIG_GTDT "GTDT"
42 #define ACPI_SIG_HEST "HEST"
43 #define ACPI_SIG_HMAT "HMAT"
44 #define ACPI_SIG_HPET "HPET"
45 #define ACPI_SIG_IBFT "IBFT"
46
47 #define ACPI_SIG_S3PT "S3PT"
48 #define ACPI_SIG_PCCS "PCC"
49
50
51
52 #define ACPI_SIG_MATR "MATR"
53 #define ACPI_SIG_MSDM "MSDM"
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55
56
57
58 #ifdef ACPI_UNDEFINED_TABLES
59 #define ACPI_SIG_ATKG "ATKG"
60 #define ACPI_SIG_GSCI "GSCI"
61 #define ACPI_SIG_IEIT "IEIT"
62 #endif
63
64
65
66
67
68 #pragma pack(1)
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90 struct acpi_subtable_header {
91 u8 type;
92 u8 length;
93 };
94
95
96
97 struct acpi_whea_header {
98 u8 action;
99 u8 instruction;
100 u8 flags;
101 u8 reserved;
102 struct acpi_generic_address register_region;
103 u64 value;
104 u64 mask;
105 };
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114
115
116 struct acpi_table_asf {
117 struct acpi_table_header header;
118 };
119
120
121
122 struct acpi_asf_header {
123 u8 type;
124 u8 reserved;
125 u16 length;
126 };
127
128
129
130 enum acpi_asf_type {
131 ACPI_ASF_TYPE_INFO = 0,
132 ACPI_ASF_TYPE_ALERT = 1,
133 ACPI_ASF_TYPE_CONTROL = 2,
134 ACPI_ASF_TYPE_BOOT = 3,
135 ACPI_ASF_TYPE_ADDRESS = 4,
136 ACPI_ASF_TYPE_RESERVED = 5
137 };
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139
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141
142
143
144
145 struct acpi_asf_info {
146 struct acpi_asf_header header;
147 u8 min_reset_value;
148 u8 min_poll_interval;
149 u16 system_id;
150 u32 mfg_id;
151 u8 flags;
152 u8 reserved2[3];
153 };
154
155
156
157 #define ACPI_ASF_SMBUS_PROTOCOLS (1)
158
159
160
161 struct acpi_asf_alert {
162 struct acpi_asf_header header;
163 u8 assert_mask;
164 u8 deassert_mask;
165 u8 alerts;
166 u8 data_length;
167 };
168
169 struct acpi_asf_alert_data {
170 u8 address;
171 u8 command;
172 u8 mask;
173 u8 value;
174 u8 sensor_type;
175 u8 type;
176 u8 offset;
177 u8 source_type;
178 u8 severity;
179 u8 sensor_number;
180 u8 entity;
181 u8 instance;
182 };
183
184
185
186 struct acpi_asf_remote {
187 struct acpi_asf_header header;
188 u8 controls;
189 u8 data_length;
190 u16 reserved2;
191 };
192
193 struct acpi_asf_control_data {
194 u8 function;
195 u8 address;
196 u8 command;
197 u8 value;
198 };
199
200
201
202 struct acpi_asf_rmcp {
203 struct acpi_asf_header header;
204 u8 capabilities[7];
205 u8 completion_code;
206 u32 enterprise_id;
207 u8 command;
208 u16 parameter;
209 u16 boot_options;
210 u16 oem_parameters;
211 };
212
213
214
215 struct acpi_asf_address {
216 struct acpi_asf_header header;
217 u8 eprom_address;
218 u8 devices;
219 };
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226
227
228 struct acpi_table_bert {
229 struct acpi_table_header header;
230 u32 region_length;
231 u64 address;
232 };
233
234
235
236 struct acpi_bert_region {
237 u32 block_status;
238 u32 raw_data_offset;
239 u32 raw_data_length;
240 u32 data_length;
241 u32 error_severity;
242 };
243
244
245
246 #define ACPI_BERT_UNCORRECTABLE (1)
247 #define ACPI_BERT_CORRECTABLE (1<<1)
248 #define ACPI_BERT_MULTIPLE_UNCORRECTABLE (1<<2)
249 #define ACPI_BERT_MULTIPLE_CORRECTABLE (1<<3)
250 #define ACPI_BERT_ERROR_ENTRY_COUNT (0xFF<<4)
251
252
253
254 enum acpi_bert_error_severity {
255 ACPI_BERT_ERROR_CORRECTABLE = 0,
256 ACPI_BERT_ERROR_FATAL = 1,
257 ACPI_BERT_ERROR_CORRECTED = 2,
258 ACPI_BERT_ERROR_NONE = 3,
259 ACPI_BERT_ERROR_RESERVED = 4
260 };
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273
274 struct acpi_table_bgrt {
275 struct acpi_table_header header;
276 u16 version;
277 u8 status;
278 u8 image_type;
279 u64 image_address;
280 u32 image_offset_x;
281 u32 image_offset_y;
282 };
283
284
285
286 #define ACPI_BGRT_DISPLAYED (1)
287 #define ACPI_BGRT_ORIENTATION_OFFSET (3 << 1)
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297
298 struct acpi_table_boot {
299 struct acpi_table_header header;
300 u8 cmos_index;
301 u8 reserved[3];
302 };
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311 struct acpi_table_cpep {
312 struct acpi_table_header header;
313 u64 reserved;
314 };
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318 struct acpi_cpep_polling {
319 struct acpi_subtable_header header;
320 u8 id;
321 u8 eid;
322 u32 interval;
323 };
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333
334 struct acpi_table_csrt {
335 struct acpi_table_header header;
336 };
337
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339
340 struct acpi_csrt_group {
341 u32 length;
342 u32 vendor_id;
343 u32 subvendor_id;
344 u16 device_id;
345 u16 subdevice_id;
346 u16 revision;
347 u16 reserved;
348 u32 shared_info_length;
349
350
351 };
352
353
354
355 struct acpi_csrt_shared_info {
356 u16 major_version;
357 u16 minor_version;
358 u32 mmio_base_low;
359 u32 mmio_base_high;
360 u32 gsi_interrupt;
361 u8 interrupt_polarity;
362 u8 interrupt_mode;
363 u8 num_channels;
364 u8 dma_address_width;
365 u16 base_request_line;
366 u16 num_handshake_signals;
367 u32 max_block_size;
368
369
370 };
371
372
373
374 struct acpi_csrt_descriptor {
375 u32 length;
376 u16 type;
377 u16 subtype;
378 u32 uid;
379
380
381 };
382
383
384
385 #define ACPI_CSRT_TYPE_INTERRUPT 0x0001
386 #define ACPI_CSRT_TYPE_TIMER 0x0002
387 #define ACPI_CSRT_TYPE_DMA 0x0003
388
389
390
391 #define ACPI_CSRT_XRUPT_LINE 0x0000
392 #define ACPI_CSRT_XRUPT_CONTROLLER 0x0001
393 #define ACPI_CSRT_TIMER 0x0000
394 #define ACPI_CSRT_DMA_CHANNEL 0x0000
395 #define ACPI_CSRT_DMA_CONTROLLER 0x0001
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405
406 struct acpi_table_dbg2 {
407 struct acpi_table_header header;
408 u32 info_offset;
409 u32 info_count;
410 };
411
412 struct acpi_dbg2_header {
413 u32 info_offset;
414 u32 info_count;
415 };
416
417
418
419 struct acpi_dbg2_device {
420 u8 revision;
421 u16 length;
422 u8 register_count;
423 u16 namepath_length;
424 u16 namepath_offset;
425 u16 oem_data_length;
426 u16 oem_data_offset;
427 u16 port_type;
428 u16 port_subtype;
429 u16 reserved;
430 u16 base_address_offset;
431 u16 address_size_offset;
432
433
434
435
436
437
438
439 };
440
441
442
443 #define ACPI_DBG2_SERIAL_PORT 0x8000
444 #define ACPI_DBG2_1394_PORT 0x8001
445 #define ACPI_DBG2_USB_PORT 0x8002
446 #define ACPI_DBG2_NET_PORT 0x8003
447
448
449
450 #define ACPI_DBG2_16550_COMPATIBLE 0x0000
451 #define ACPI_DBG2_16550_SUBSET 0x0001
452 #define ACPI_DBG2_ARM_PL011 0x0003
453 #define ACPI_DBG2_ARM_SBSA_32BIT 0x000D
454 #define ACPI_DBG2_ARM_SBSA_GENERIC 0x000E
455 #define ACPI_DBG2_ARM_DCC 0x000F
456 #define ACPI_DBG2_BCM2835 0x0010
457
458 #define ACPI_DBG2_1394_STANDARD 0x0000
459
460 #define ACPI_DBG2_USB_XHCI 0x0000
461 #define ACPI_DBG2_USB_EHCI 0x0001
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471
472 struct acpi_table_dbgp {
473 struct acpi_table_header header;
474 u8 type;
475 u8 reserved[3];
476 struct acpi_generic_address debug_port;
477 };
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488
489 struct acpi_table_dmar {
490 struct acpi_table_header header;
491 u8 width;
492 u8 flags;
493 u8 reserved[10];
494 };
495
496
497
498 #define ACPI_DMAR_INTR_REMAP (1)
499 #define ACPI_DMAR_X2APIC_OPT_OUT (1<<1)
500 #define ACPI_DMAR_X2APIC_MODE (1<<2)
501
502
503
504 struct acpi_dmar_header {
505 u16 type;
506 u16 length;
507 };
508
509
510
511 enum acpi_dmar_type {
512 ACPI_DMAR_TYPE_HARDWARE_UNIT = 0,
513 ACPI_DMAR_TYPE_RESERVED_MEMORY = 1,
514 ACPI_DMAR_TYPE_ROOT_ATS = 2,
515 ACPI_DMAR_TYPE_HARDWARE_AFFINITY = 3,
516 ACPI_DMAR_TYPE_NAMESPACE = 4,
517 ACPI_DMAR_TYPE_RESERVED = 5
518 };
519
520
521
522 struct acpi_dmar_device_scope {
523 u8 entry_type;
524 u8 length;
525 u16 reserved;
526 u8 enumeration_id;
527 u8 bus;
528 };
529
530
531
532 enum acpi_dmar_scope_type {
533 ACPI_DMAR_SCOPE_TYPE_NOT_USED = 0,
534 ACPI_DMAR_SCOPE_TYPE_ENDPOINT = 1,
535 ACPI_DMAR_SCOPE_TYPE_BRIDGE = 2,
536 ACPI_DMAR_SCOPE_TYPE_IOAPIC = 3,
537 ACPI_DMAR_SCOPE_TYPE_HPET = 4,
538 ACPI_DMAR_SCOPE_TYPE_NAMESPACE = 5,
539 ACPI_DMAR_SCOPE_TYPE_RESERVED = 6
540 };
541
542 struct acpi_dmar_pci_path {
543 u8 device;
544 u8 function;
545 };
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552
553 struct acpi_dmar_hardware_unit {
554 struct acpi_dmar_header header;
555 u8 flags;
556 u8 reserved;
557 u16 segment;
558 u64 address;
559 };
560
561
562
563 #define ACPI_DMAR_INCLUDE_ALL (1)
564
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566
567 struct acpi_dmar_reserved_memory {
568 struct acpi_dmar_header header;
569 u16 reserved;
570 u16 segment;
571 u64 base_address;
572 u64 end_address;
573 };
574
575
576
577 #define ACPI_DMAR_ALLOW_ALL (1)
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581 struct acpi_dmar_atsr {
582 struct acpi_dmar_header header;
583 u8 flags;
584 u8 reserved;
585 u16 segment;
586 };
587
588
589
590 #define ACPI_DMAR_ALL_PORTS (1)
591
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594 struct acpi_dmar_rhsa {
595 struct acpi_dmar_header header;
596 u32 reserved;
597 u64 base_address;
598 u32 proximity_domain;
599 };
600
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603 struct acpi_dmar_andd {
604 struct acpi_dmar_header header;
605 u8 reserved[3];
606 u8 device_number;
607 char device_name[1];
608 };
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617
618 struct acpi_table_drtm {
619 struct acpi_table_header header;
620 u64 entry_base_address;
621 u64 entry_length;
622 u32 entry_address32;
623 u64 entry_address64;
624 u64 exit_address;
625 u64 log_area_address;
626 u32 log_area_length;
627 u64 arch_dependent_address;
628 u32 flags;
629 };
630
631
632
633 #define ACPI_DRTM_ACCESS_ALLOWED (1)
634 #define ACPI_DRTM_ENABLE_GAP_CODE (1<<1)
635 #define ACPI_DRTM_INCOMPLETE_MEASUREMENTS (1<<2)
636 #define ACPI_DRTM_AUTHORITY_ORDER (1<<3)
637
638
639
640 struct acpi_drtm_vtable_list {
641 u32 validated_table_count;
642 u64 validated_tables[1];
643 };
644
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647
648
649 struct acpi_drtm_resource {
650 u8 size[7];
651 u8 type;
652 u64 address;
653 };
654
655 struct acpi_drtm_resource_list {
656 u32 resource_count;
657 struct acpi_drtm_resource resources[1];
658 };
659
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662 struct acpi_drtm_dps_id {
663 u32 dps_id_length;
664 u8 dps_id[16];
665 };
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674 struct acpi_table_ecdt {
675 struct acpi_table_header header;
676 struct acpi_generic_address control;
677 struct acpi_generic_address data;
678 u32 uid;
679 u8 gpe;
680 u8 id[1];
681 };
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690 struct acpi_table_einj {
691 struct acpi_table_header header;
692 u32 header_length;
693 u8 flags;
694 u8 reserved[3];
695 u32 entries;
696 };
697
698
699
700 struct acpi_einj_entry {
701 struct acpi_whea_header whea_header;
702 };
703
704
705
706 #define ACPI_EINJ_PRESERVE (1)
707
708
709
710 enum acpi_einj_actions {
711 ACPI_EINJ_BEGIN_OPERATION = 0,
712 ACPI_EINJ_GET_TRIGGER_TABLE = 1,
713 ACPI_EINJ_SET_ERROR_TYPE = 2,
714 ACPI_EINJ_GET_ERROR_TYPE = 3,
715 ACPI_EINJ_END_OPERATION = 4,
716 ACPI_EINJ_EXECUTE_OPERATION = 5,
717 ACPI_EINJ_CHECK_BUSY_STATUS = 6,
718 ACPI_EINJ_GET_COMMAND_STATUS = 7,
719 ACPI_EINJ_SET_ERROR_TYPE_WITH_ADDRESS = 8,
720 ACPI_EINJ_GET_EXECUTE_TIMINGS = 9,
721 ACPI_EINJ_ACTION_RESERVED = 10,
722 ACPI_EINJ_TRIGGER_ERROR = 0xFF
723 };
724
725
726
727 enum acpi_einj_instructions {
728 ACPI_EINJ_READ_REGISTER = 0,
729 ACPI_EINJ_READ_REGISTER_VALUE = 1,
730 ACPI_EINJ_WRITE_REGISTER = 2,
731 ACPI_EINJ_WRITE_REGISTER_VALUE = 3,
732 ACPI_EINJ_NOOP = 4,
733 ACPI_EINJ_FLUSH_CACHELINE = 5,
734 ACPI_EINJ_INSTRUCTION_RESERVED = 6
735 };
736
737 struct acpi_einj_error_type_with_addr {
738 u32 error_type;
739 u32 vendor_struct_offset;
740 u32 flags;
741 u32 apic_id;
742 u64 address;
743 u64 range;
744 u32 pcie_id;
745 };
746
747 struct acpi_einj_vendor {
748 u32 length;
749 u32 pcie_id;
750 u16 vendor_id;
751 u16 device_id;
752 u8 revision_id;
753 u8 reserved[3];
754 };
755
756
757
758 struct acpi_einj_trigger {
759 u32 header_size;
760 u32 revision;
761 u32 table_size;
762 u32 entry_count;
763 };
764
765
766
767 enum acpi_einj_command_status {
768 ACPI_EINJ_SUCCESS = 0,
769 ACPI_EINJ_FAILURE = 1,
770 ACPI_EINJ_INVALID_ACCESS = 2,
771 ACPI_EINJ_STATUS_RESERVED = 3
772 };
773
774
775
776 #define ACPI_EINJ_PROCESSOR_CORRECTABLE (1)
777 #define ACPI_EINJ_PROCESSOR_UNCORRECTABLE (1<<1)
778 #define ACPI_EINJ_PROCESSOR_FATAL (1<<2)
779 #define ACPI_EINJ_MEMORY_CORRECTABLE (1<<3)
780 #define ACPI_EINJ_MEMORY_UNCORRECTABLE (1<<4)
781 #define ACPI_EINJ_MEMORY_FATAL (1<<5)
782 #define ACPI_EINJ_PCIX_CORRECTABLE (1<<6)
783 #define ACPI_EINJ_PCIX_UNCORRECTABLE (1<<7)
784 #define ACPI_EINJ_PCIX_FATAL (1<<8)
785 #define ACPI_EINJ_PLATFORM_CORRECTABLE (1<<9)
786 #define ACPI_EINJ_PLATFORM_UNCORRECTABLE (1<<10)
787 #define ACPI_EINJ_PLATFORM_FATAL (1<<11)
788 #define ACPI_EINJ_VENDOR_DEFINED (1<<31)
789
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796
797 struct acpi_table_erst {
798 struct acpi_table_header header;
799 u32 header_length;
800 u32 reserved;
801 u32 entries;
802 };
803
804
805
806 struct acpi_erst_entry {
807 struct acpi_whea_header whea_header;
808 };
809
810
811
812 #define ACPI_ERST_PRESERVE (1)
813
814
815
816 enum acpi_erst_actions {
817 ACPI_ERST_BEGIN_WRITE = 0,
818 ACPI_ERST_BEGIN_READ = 1,
819 ACPI_ERST_BEGIN_CLEAR = 2,
820 ACPI_ERST_END = 3,
821 ACPI_ERST_SET_RECORD_OFFSET = 4,
822 ACPI_ERST_EXECUTE_OPERATION = 5,
823 ACPI_ERST_CHECK_BUSY_STATUS = 6,
824 ACPI_ERST_GET_COMMAND_STATUS = 7,
825 ACPI_ERST_GET_RECORD_ID = 8,
826 ACPI_ERST_SET_RECORD_ID = 9,
827 ACPI_ERST_GET_RECORD_COUNT = 10,
828 ACPI_ERST_BEGIN_DUMMY_WRIITE = 11,
829 ACPI_ERST_NOT_USED = 12,
830 ACPI_ERST_GET_ERROR_RANGE = 13,
831 ACPI_ERST_GET_ERROR_LENGTH = 14,
832 ACPI_ERST_GET_ERROR_ATTRIBUTES = 15,
833 ACPI_ERST_EXECUTE_TIMINGS = 16,
834 ACPI_ERST_ACTION_RESERVED = 17
835 };
836
837
838
839 enum acpi_erst_instructions {
840 ACPI_ERST_READ_REGISTER = 0,
841 ACPI_ERST_READ_REGISTER_VALUE = 1,
842 ACPI_ERST_WRITE_REGISTER = 2,
843 ACPI_ERST_WRITE_REGISTER_VALUE = 3,
844 ACPI_ERST_NOOP = 4,
845 ACPI_ERST_LOAD_VAR1 = 5,
846 ACPI_ERST_LOAD_VAR2 = 6,
847 ACPI_ERST_STORE_VAR1 = 7,
848 ACPI_ERST_ADD = 8,
849 ACPI_ERST_SUBTRACT = 9,
850 ACPI_ERST_ADD_VALUE = 10,
851 ACPI_ERST_SUBTRACT_VALUE = 11,
852 ACPI_ERST_STALL = 12,
853 ACPI_ERST_STALL_WHILE_TRUE = 13,
854 ACPI_ERST_SKIP_NEXT_IF_TRUE = 14,
855 ACPI_ERST_GOTO = 15,
856 ACPI_ERST_SET_SRC_ADDRESS_BASE = 16,
857 ACPI_ERST_SET_DST_ADDRESS_BASE = 17,
858 ACPI_ERST_MOVE_DATA = 18,
859 ACPI_ERST_INSTRUCTION_RESERVED = 19
860 };
861
862
863
864 enum acpi_erst_command_status {
865 ACPI_ERST_SUCESS = 0,
866 ACPI_ERST_NO_SPACE = 1,
867 ACPI_ERST_NOT_AVAILABLE = 2,
868 ACPI_ERST_FAILURE = 3,
869 ACPI_ERST_RECORD_EMPTY = 4,
870 ACPI_ERST_NOT_FOUND = 5,
871 ACPI_ERST_STATUS_RESERVED = 6
872 };
873
874
875
876 struct acpi_erst_info {
877 u16 signature;
878 u8 data[48];
879 };
880
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885
886
887
888 struct acpi_table_fpdt {
889 struct acpi_table_header header;
890 };
891
892
893
894 struct acpi_fpdt_header {
895 u16 type;
896 u8 length;
897 u8 revision;
898 };
899
900
901
902 enum acpi_fpdt_type {
903 ACPI_FPDT_TYPE_BOOT = 0,
904 ACPI_FPDT_TYPE_S3PERF = 1
905 };
906
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911
912
913 struct acpi_fpdt_boot_pointer {
914 struct acpi_fpdt_header header;
915 u8 reserved[4];
916 u64 address;
917 };
918
919
920
921 struct acpi_fpdt_s3pt_pointer {
922 struct acpi_fpdt_header header;
923 u8 reserved[4];
924 u64 address;
925 };
926
927
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929
930
931 struct acpi_table_s3pt {
932 u8 signature[4];
933 u32 length;
934 };
935
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939
940
941
942 enum acpi_s3pt_type {
943 ACPI_S3PT_TYPE_RESUME = 0,
944 ACPI_S3PT_TYPE_SUSPEND = 1,
945 ACPI_FPDT_BOOT_PERFORMANCE = 2
946 };
947
948 struct acpi_s3pt_resume {
949 struct acpi_fpdt_header header;
950 u32 resume_count;
951 u64 full_resume;
952 u64 average_resume;
953 };
954
955 struct acpi_s3pt_suspend {
956 struct acpi_fpdt_header header;
957 u64 suspend_start;
958 u64 suspend_end;
959 };
960
961
962
963
964 struct acpi_fpdt_boot {
965 struct acpi_fpdt_header header;
966 u8 reserved[4];
967 u64 reset_end;
968 u64 load_start;
969 u64 startup_start;
970 u64 exit_services_entry;
971 u64 exit_services_exit;
972 };
973
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978
979
980
981 struct acpi_table_gtdt {
982 struct acpi_table_header header;
983 u64 counter_block_addresss;
984 u32 reserved;
985 u32 secure_el1_interrupt;
986 u32 secure_el1_flags;
987 u32 non_secure_el1_interrupt;
988 u32 non_secure_el1_flags;
989 u32 virtual_timer_interrupt;
990 u32 virtual_timer_flags;
991 u32 non_secure_el2_interrupt;
992 u32 non_secure_el2_flags;
993 u64 counter_read_block_address;
994 u32 platform_timer_count;
995 u32 platform_timer_offset;
996 };
997
998
999
1000 #define ACPI_GTDT_INTERRUPT_MODE (1)
1001 #define ACPI_GTDT_INTERRUPT_POLARITY (1<<1)
1002 #define ACPI_GTDT_ALWAYS_ON (1<<2)
1003
1004 struct acpi_gtdt_el2 {
1005 u32 virtual_el2_timer_gsiv;
1006 u32 virtual_el2_timer_flags;
1007 };
1008
1009
1010
1011 struct acpi_gtdt_header {
1012 u8 type;
1013 u16 length;
1014 };
1015
1016
1017
1018 enum acpi_gtdt_type {
1019 ACPI_GTDT_TYPE_TIMER_BLOCK = 0,
1020 ACPI_GTDT_TYPE_WATCHDOG = 1,
1021 ACPI_GTDT_TYPE_RESERVED = 2
1022 };
1023
1024
1025
1026
1027
1028 struct acpi_gtdt_timer_block {
1029 struct acpi_gtdt_header header;
1030 u8 reserved;
1031 u64 block_address;
1032 u32 timer_count;
1033 u32 timer_offset;
1034 };
1035
1036
1037
1038 struct acpi_gtdt_timer_entry {
1039 u8 frame_number;
1040 u8 reserved[3];
1041 u64 base_address;
1042 u64 el0_base_address;
1043 u32 timer_interrupt;
1044 u32 timer_flags;
1045 u32 virtual_timer_interrupt;
1046 u32 virtual_timer_flags;
1047 u32 common_flags;
1048 };
1049
1050
1051
1052 #define ACPI_GTDT_GT_IRQ_MODE (1)
1053 #define ACPI_GTDT_GT_IRQ_POLARITY (1<<1)
1054
1055
1056
1057 #define ACPI_GTDT_GT_IS_SECURE_TIMER (1)
1058 #define ACPI_GTDT_GT_ALWAYS_ON (1<<1)
1059
1060
1061
1062 struct acpi_gtdt_watchdog {
1063 struct acpi_gtdt_header header;
1064 u8 reserved;
1065 u64 refresh_frame_address;
1066 u64 control_frame_address;
1067 u32 timer_interrupt;
1068 u32 timer_flags;
1069 };
1070
1071
1072
1073 #define ACPI_GTDT_WATCHDOG_IRQ_MODE (1)
1074 #define ACPI_GTDT_WATCHDOG_IRQ_POLARITY (1<<1)
1075 #define ACPI_GTDT_WATCHDOG_SECURE (1<<2)
1076
1077
1078
1079
1080
1081
1082
1083
1084 struct acpi_table_hest {
1085 struct acpi_table_header header;
1086 u32 error_source_count;
1087 };
1088
1089
1090
1091 struct acpi_hest_header {
1092 u16 type;
1093 u16 source_id;
1094 };
1095
1096
1097
1098 enum acpi_hest_types {
1099 ACPI_HEST_TYPE_IA32_CHECK = 0,
1100 ACPI_HEST_TYPE_IA32_CORRECTED_CHECK = 1,
1101 ACPI_HEST_TYPE_IA32_NMI = 2,
1102 ACPI_HEST_TYPE_NOT_USED3 = 3,
1103 ACPI_HEST_TYPE_NOT_USED4 = 4,
1104 ACPI_HEST_TYPE_NOT_USED5 = 5,
1105 ACPI_HEST_TYPE_AER_ROOT_PORT = 6,
1106 ACPI_HEST_TYPE_AER_ENDPOINT = 7,
1107 ACPI_HEST_TYPE_AER_BRIDGE = 8,
1108 ACPI_HEST_TYPE_GENERIC_ERROR = 9,
1109 ACPI_HEST_TYPE_GENERIC_ERROR_V2 = 10,
1110 ACPI_HEST_TYPE_IA32_DEFERRED_CHECK = 11,
1111 ACPI_HEST_TYPE_RESERVED = 12
1112 };
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122 struct acpi_hest_ia_error_bank {
1123 u8 bank_number;
1124 u8 clear_status_on_init;
1125 u8 status_format;
1126 u8 reserved;
1127 u32 control_register;
1128 u64 control_data;
1129 u32 status_register;
1130 u32 address_register;
1131 u32 misc_register;
1132 };
1133
1134
1135
1136 struct acpi_hest_aer_common {
1137 u16 reserved1;
1138 u8 flags;
1139 u8 enabled;
1140 u32 records_to_preallocate;
1141 u32 max_sections_per_record;
1142 u32 bus;
1143 u16 device;
1144 u16 function;
1145 u16 device_control;
1146 u16 reserved2;
1147 u32 uncorrectable_mask;
1148 u32 uncorrectable_severity;
1149 u32 correctable_mask;
1150 u32 advanced_capabilities;
1151 };
1152
1153
1154
1155 #define ACPI_HEST_FIRMWARE_FIRST (1)
1156 #define ACPI_HEST_GLOBAL (1<<1)
1157 #define ACPI_HEST_GHES_ASSIST (1<<2)
1158
1159
1160
1161
1162
1163
1164 #define ACPI_HEST_BUS(bus) ((bus) & 0xFF)
1165 #define ACPI_HEST_SEGMENT(bus) (((bus) >> 8) & 0xFFFF)
1166
1167
1168
1169 struct acpi_hest_notify {
1170 u8 type;
1171 u8 length;
1172 u16 config_write_enable;
1173 u32 poll_interval;
1174 u32 vector;
1175 u32 polling_threshold_value;
1176 u32 polling_threshold_window;
1177 u32 error_threshold_value;
1178 u32 error_threshold_window;
1179 };
1180
1181
1182
1183 enum acpi_hest_notify_types {
1184 ACPI_HEST_NOTIFY_POLLED = 0,
1185 ACPI_HEST_NOTIFY_EXTERNAL = 1,
1186 ACPI_HEST_NOTIFY_LOCAL = 2,
1187 ACPI_HEST_NOTIFY_SCI = 3,
1188 ACPI_HEST_NOTIFY_NMI = 4,
1189 ACPI_HEST_NOTIFY_CMCI = 5,
1190 ACPI_HEST_NOTIFY_MCE = 6,
1191 ACPI_HEST_NOTIFY_GPIO = 7,
1192 ACPI_HEST_NOTIFY_SEA = 8,
1193 ACPI_HEST_NOTIFY_SEI = 9,
1194 ACPI_HEST_NOTIFY_GSIV = 10,
1195 ACPI_HEST_NOTIFY_SOFTWARE_DELEGATED = 11,
1196 ACPI_HEST_NOTIFY_RESERVED = 12
1197 };
1198
1199
1200
1201 #define ACPI_HEST_TYPE (1)
1202 #define ACPI_HEST_POLL_INTERVAL (1<<1)
1203 #define ACPI_HEST_POLL_THRESHOLD_VALUE (1<<2)
1204 #define ACPI_HEST_POLL_THRESHOLD_WINDOW (1<<3)
1205 #define ACPI_HEST_ERR_THRESHOLD_VALUE (1<<4)
1206 #define ACPI_HEST_ERR_THRESHOLD_WINDOW (1<<5)
1207
1208
1209
1210
1211
1212
1213
1214 struct acpi_hest_ia_machine_check {
1215 struct acpi_hest_header header;
1216 u16 reserved1;
1217 u8 flags;
1218 u8 enabled;
1219 u32 records_to_preallocate;
1220 u32 max_sections_per_record;
1221 u64 global_capability_data;
1222 u64 global_control_data;
1223 u8 num_hardware_banks;
1224 u8 reserved3[7];
1225 };
1226
1227
1228
1229 struct acpi_hest_ia_corrected {
1230 struct acpi_hest_header header;
1231 u16 reserved1;
1232 u8 flags;
1233 u8 enabled;
1234 u32 records_to_preallocate;
1235 u32 max_sections_per_record;
1236 struct acpi_hest_notify notify;
1237 u8 num_hardware_banks;
1238 u8 reserved2[3];
1239 };
1240
1241
1242
1243 struct acpi_hest_ia_nmi {
1244 struct acpi_hest_header header;
1245 u32 reserved;
1246 u32 records_to_preallocate;
1247 u32 max_sections_per_record;
1248 u32 max_raw_data_length;
1249 };
1250
1251
1252
1253
1254
1255 struct acpi_hest_aer_root {
1256 struct acpi_hest_header header;
1257 struct acpi_hest_aer_common aer;
1258 u32 root_error_command;
1259 };
1260
1261
1262
1263 struct acpi_hest_aer {
1264 struct acpi_hest_header header;
1265 struct acpi_hest_aer_common aer;
1266 };
1267
1268
1269
1270 struct acpi_hest_aer_bridge {
1271 struct acpi_hest_header header;
1272 struct acpi_hest_aer_common aer;
1273 u32 uncorrectable_mask2;
1274 u32 uncorrectable_severity2;
1275 u32 advanced_capabilities2;
1276 };
1277
1278
1279
1280 struct acpi_hest_generic {
1281 struct acpi_hest_header header;
1282 u16 related_source_id;
1283 u8 reserved;
1284 u8 enabled;
1285 u32 records_to_preallocate;
1286 u32 max_sections_per_record;
1287 u32 max_raw_data_length;
1288 struct acpi_generic_address error_status_address;
1289 struct acpi_hest_notify notify;
1290 u32 error_block_length;
1291 };
1292
1293
1294
1295 struct acpi_hest_generic_v2 {
1296 struct acpi_hest_header header;
1297 u16 related_source_id;
1298 u8 reserved;
1299 u8 enabled;
1300 u32 records_to_preallocate;
1301 u32 max_sections_per_record;
1302 u32 max_raw_data_length;
1303 struct acpi_generic_address error_status_address;
1304 struct acpi_hest_notify notify;
1305 u32 error_block_length;
1306 struct acpi_generic_address read_ack_register;
1307 u64 read_ack_preserve;
1308 u64 read_ack_write;
1309 };
1310
1311
1312
1313 struct acpi_hest_generic_status {
1314 u32 block_status;
1315 u32 raw_data_offset;
1316 u32 raw_data_length;
1317 u32 data_length;
1318 u32 error_severity;
1319 };
1320
1321
1322
1323 #define ACPI_HEST_UNCORRECTABLE (1)
1324 #define ACPI_HEST_CORRECTABLE (1<<1)
1325 #define ACPI_HEST_MULTIPLE_UNCORRECTABLE (1<<2)
1326 #define ACPI_HEST_MULTIPLE_CORRECTABLE (1<<3)
1327 #define ACPI_HEST_ERROR_ENTRY_COUNT (0xFF<<4)
1328
1329
1330
1331 struct acpi_hest_generic_data {
1332 u8 section_type[16];
1333 u32 error_severity;
1334 u16 revision;
1335 u8 validation_bits;
1336 u8 flags;
1337 u32 error_data_length;
1338 u8 fru_id[16];
1339 u8 fru_text[20];
1340 };
1341
1342
1343
1344 struct acpi_hest_generic_data_v300 {
1345 u8 section_type[16];
1346 u32 error_severity;
1347 u16 revision;
1348 u8 validation_bits;
1349 u8 flags;
1350 u32 error_data_length;
1351 u8 fru_id[16];
1352 u8 fru_text[20];
1353 u64 time_stamp;
1354 };
1355
1356
1357
1358 #define ACPI_HEST_GEN_ERROR_RECOVERABLE 0
1359 #define ACPI_HEST_GEN_ERROR_FATAL 1
1360 #define ACPI_HEST_GEN_ERROR_CORRECTED 2
1361 #define ACPI_HEST_GEN_ERROR_NONE 3
1362
1363
1364
1365 #define ACPI_HEST_GEN_VALID_FRU_ID (1)
1366 #define ACPI_HEST_GEN_VALID_FRU_STRING (1<<1)
1367 #define ACPI_HEST_GEN_VALID_TIMESTAMP (1<<2)
1368
1369
1370
1371 struct acpi_hest_ia_deferred_check {
1372 struct acpi_hest_header header;
1373 u16 reserved1;
1374 u8 flags;
1375 u8 enabled;
1376 u32 records_to_preallocate;
1377 u32 max_sections_per_record;
1378 struct acpi_hest_notify notify;
1379 u8 num_hardware_banks;
1380 u8 reserved2[3];
1381 };
1382
1383
1384
1385
1386
1387
1388
1389
1390 struct acpi_table_hmat {
1391 struct acpi_table_header header;
1392 u32 reserved;
1393 };
1394
1395
1396
1397 enum acpi_hmat_type {
1398 ACPI_HMAT_TYPE_PROXIMITY = 0,
1399 ACPI_HMAT_TYPE_LOCALITY = 1,
1400 ACPI_HMAT_TYPE_CACHE = 2,
1401 ACPI_HMAT_TYPE_RESERVED = 3
1402 };
1403
1404 struct acpi_hmat_structure {
1405 u16 type;
1406 u16 reserved;
1407 u32 length;
1408 };
1409
1410
1411
1412
1413
1414
1415
1416 struct acpi_hmat_proximity_domain {
1417 struct acpi_hmat_structure header;
1418 u16 flags;
1419 u16 reserved1;
1420 u32 processor_PD;
1421 u32 memory_PD;
1422 u32 reserved2;
1423 u64 reserved3;
1424 u64 reserved4;
1425 };
1426
1427
1428
1429 #define ACPI_HMAT_PROCESSOR_PD_VALID (1)
1430 #define ACPI_HMAT_MEMORY_PD_VALID (1<<1)
1431 #define ACPI_HMAT_RESERVATION_HINT (1<<2)
1432
1433
1434
1435 struct acpi_hmat_locality {
1436 struct acpi_hmat_structure header;
1437 u8 flags;
1438 u8 data_type;
1439 u16 reserved1;
1440 u32 number_of_initiator_Pds;
1441 u32 number_of_target_Pds;
1442 u32 reserved2;
1443 u64 entry_base_unit;
1444 };
1445
1446
1447
1448 #define ACPI_HMAT_MEMORY_HIERARCHY (0x0F)
1449
1450
1451
1452 #define ACPI_HMAT_MEMORY 0
1453 #define ACPI_HMAT_LAST_LEVEL_CACHE 1
1454 #define ACPI_HMAT_1ST_LEVEL_CACHE 2
1455 #define ACPI_HMAT_2ND_LEVEL_CACHE 3
1456 #define ACPI_HMAT_3RD_LEVEL_CACHE 4
1457
1458
1459
1460 #define ACPI_HMAT_ACCESS_LATENCY 0
1461 #define ACPI_HMAT_READ_LATENCY 1
1462 #define ACPI_HMAT_WRITE_LATENCY 2
1463 #define ACPI_HMAT_ACCESS_BANDWIDTH 3
1464 #define ACPI_HMAT_READ_BANDWIDTH 4
1465 #define ACPI_HMAT_WRITE_BANDWIDTH 5
1466
1467
1468
1469 struct acpi_hmat_cache {
1470 struct acpi_hmat_structure header;
1471 u32 memory_PD;
1472 u32 reserved1;
1473 u64 cache_size;
1474 u32 cache_attributes;
1475 u16 reserved2;
1476 u16 number_of_SMBIOShandles;
1477 };
1478
1479
1480
1481 #define ACPI_HMAT_TOTAL_CACHE_LEVEL (0x0000000F)
1482 #define ACPI_HMAT_CACHE_LEVEL (0x000000F0)
1483 #define ACPI_HMAT_CACHE_ASSOCIATIVITY (0x00000F00)
1484 #define ACPI_HMAT_WRITE_POLICY (0x0000F000)
1485 #define ACPI_HMAT_CACHE_LINE_SIZE (0xFFFF0000)
1486
1487
1488
1489 #define ACPI_HMAT_CA_NONE (0)
1490 #define ACPI_HMAT_CA_DIRECT_MAPPED (1)
1491 #define ACPI_HMAT_CA_COMPLEX_CACHE_INDEXING (2)
1492
1493
1494
1495 #define ACPI_HMAT_CP_NONE (0)
1496 #define ACPI_HMAT_CP_WB (1)
1497 #define ACPI_HMAT_CP_WT (2)
1498
1499
1500
1501
1502
1503
1504
1505
1506
1507
1508
1509 struct acpi_table_hpet {
1510 struct acpi_table_header header;
1511 u32 id;
1512 struct acpi_generic_address address;
1513 u8 sequence;
1514 u16 minimum_tick;
1515 u8 flags;
1516 };
1517
1518
1519
1520 #define ACPI_HPET_PAGE_PROTECT_MASK (3)
1521
1522
1523
1524 enum acpi_hpet_page_protect {
1525 ACPI_HPET_NO_PAGE_PROTECT = 0,
1526 ACPI_HPET_PAGE_PROTECT4 = 1,
1527 ACPI_HPET_PAGE_PROTECT64 = 2
1528 };
1529
1530
1531
1532
1533
1534
1535
1536
1537
1538
1539
1540
1541
1542
1543 struct acpi_table_ibft {
1544 struct acpi_table_header header;
1545 u8 reserved[12];
1546 };
1547
1548
1549
1550 struct acpi_ibft_header {
1551 u8 type;
1552 u8 version;
1553 u16 length;
1554 u8 index;
1555 u8 flags;
1556 };
1557
1558
1559
1560 enum acpi_ibft_type {
1561 ACPI_IBFT_TYPE_NOT_USED = 0,
1562 ACPI_IBFT_TYPE_CONTROL = 1,
1563 ACPI_IBFT_TYPE_INITIATOR = 2,
1564 ACPI_IBFT_TYPE_NIC = 3,
1565 ACPI_IBFT_TYPE_TARGET = 4,
1566 ACPI_IBFT_TYPE_EXTENSIONS = 5,
1567 ACPI_IBFT_TYPE_RESERVED = 6
1568 };
1569
1570
1571
1572 struct acpi_ibft_control {
1573 struct acpi_ibft_header header;
1574 u16 extensions;
1575 u16 initiator_offset;
1576 u16 nic0_offset;
1577 u16 target0_offset;
1578 u16 nic1_offset;
1579 u16 target1_offset;
1580 };
1581
1582 struct acpi_ibft_initiator {
1583 struct acpi_ibft_header header;
1584 u8 sns_server[16];
1585 u8 slp_server[16];
1586 u8 primary_server[16];
1587 u8 secondary_server[16];
1588 u16 name_length;
1589 u16 name_offset;
1590 };
1591
1592 struct acpi_ibft_nic {
1593 struct acpi_ibft_header header;
1594 u8 ip_address[16];
1595 u8 subnet_mask_prefix;
1596 u8 origin;
1597 u8 gateway[16];
1598 u8 primary_dns[16];
1599 u8 secondary_dns[16];
1600 u8 dhcp[16];
1601 u16 vlan;
1602 u8 mac_address[6];
1603 u16 pci_address;
1604 u16 name_length;
1605 u16 name_offset;
1606 };
1607
1608 struct acpi_ibft_target {
1609 struct acpi_ibft_header header;
1610 u8 target_ip_address[16];
1611 u16 target_ip_socket;
1612 u8 target_boot_lun[8];
1613 u8 chap_type;
1614 u8 nic_association;
1615 u16 target_name_length;
1616 u16 target_name_offset;
1617 u16 chap_name_length;
1618 u16 chap_name_offset;
1619 u16 chap_secret_length;
1620 u16 chap_secret_offset;
1621 u16 reverse_chap_name_length;
1622 u16 reverse_chap_name_offset;
1623 u16 reverse_chap_secret_length;
1624 u16 reverse_chap_secret_offset;
1625 };
1626
1627
1628
1629 #pragma pack()
1630
1631 #endif