1
2
3
4
5
6
7
8
9
10 #ifndef __SOC_ATMEL_TCB_H
11 #define __SOC_ATMEL_TCB_H
12
13 #include <linux/compiler.h>
14 #include <linux/list.h>
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34 struct clk;
35
36
37
38
39
40 struct atmel_tcb_config {
41 size_t counter_width;
42 };
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63 struct atmel_tc {
64 struct platform_device *pdev;
65 void __iomem *regs;
66 int id;
67 const struct atmel_tcb_config *tcb_config;
68 int irq[3];
69 struct clk *clk[3];
70 struct clk *slow_clk;
71 struct list_head node;
72 bool allocated;
73 };
74
75 extern struct atmel_tc *atmel_tc_alloc(unsigned block);
76 extern void atmel_tc_free(struct atmel_tc *tc);
77
78
79 extern const u8 atmel_tc_divisors[5];
80
81
82
83
84
85
86
87
88
89
90
91
92 #define ATMEL_TC_BCR 0xc0
93 #define ATMEL_TC_SYNC (1 << 0)
94
95 #define ATMEL_TC_BMR 0xc4
96 #define ATMEL_TC_TC0XC0S (3 << 0)
97 #define ATMEL_TC_TC0XC0S_TCLK0 (0 << 0)
98 #define ATMEL_TC_TC0XC0S_NONE (1 << 0)
99 #define ATMEL_TC_TC0XC0S_TIOA1 (2 << 0)
100 #define ATMEL_TC_TC0XC0S_TIOA2 (3 << 0)
101 #define ATMEL_TC_TC1XC1S (3 << 2)
102 #define ATMEL_TC_TC1XC1S_TCLK1 (0 << 2)
103 #define ATMEL_TC_TC1XC1S_NONE (1 << 2)
104 #define ATMEL_TC_TC1XC1S_TIOA0 (2 << 2)
105 #define ATMEL_TC_TC1XC1S_TIOA2 (3 << 2)
106 #define ATMEL_TC_TC2XC2S (3 << 4)
107 #define ATMEL_TC_TC2XC2S_TCLK2 (0 << 4)
108 #define ATMEL_TC_TC2XC2S_NONE (1 << 4)
109 #define ATMEL_TC_TC2XC2S_TIOA0 (2 << 4)
110 #define ATMEL_TC_TC2XC2S_TIOA1 (3 << 4)
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131 #define ATMEL_TC_CHAN(idx) ((idx)*0x40)
132 #define ATMEL_TC_REG(idx, reg) (ATMEL_TC_CHAN(idx) + ATMEL_TC_ ## reg)
133
134 #define ATMEL_TC_CCR 0x00
135 #define ATMEL_TC_CLKEN (1 << 0)
136 #define ATMEL_TC_CLKDIS (1 << 1)
137 #define ATMEL_TC_SWTRG (1 << 2)
138
139 #define ATMEL_TC_CMR 0x04
140
141
142 #define ATMEL_TC_TCCLKS (7 << 0)
143 #define ATMEL_TC_TIMER_CLOCK1 (0 << 0)
144 #define ATMEL_TC_TIMER_CLOCK2 (1 << 0)
145 #define ATMEL_TC_TIMER_CLOCK3 (2 << 0)
146 #define ATMEL_TC_TIMER_CLOCK4 (3 << 0)
147 #define ATMEL_TC_TIMER_CLOCK5 (4 << 0)
148 #define ATMEL_TC_XC0 (5 << 0)
149 #define ATMEL_TC_XC1 (6 << 0)
150 #define ATMEL_TC_XC2 (7 << 0)
151 #define ATMEL_TC_CLKI (1 << 3)
152 #define ATMEL_TC_BURST (3 << 4)
153 #define ATMEL_TC_GATE_NONE (0 << 4)
154 #define ATMEL_TC_GATE_XC0 (1 << 4)
155 #define ATMEL_TC_GATE_XC1 (2 << 4)
156 #define ATMEL_TC_GATE_XC2 (3 << 4)
157 #define ATMEL_TC_WAVE (1 << 15)
158
159
160 #define ATMEL_TC_LDBSTOP (1 << 6)
161 #define ATMEL_TC_LDBDIS (1 << 7)
162 #define ATMEL_TC_ETRGEDG (3 << 8)
163 #define ATMEL_TC_ETRGEDG_NONE (0 << 8)
164 #define ATMEL_TC_ETRGEDG_RISING (1 << 8)
165 #define ATMEL_TC_ETRGEDG_FALLING (2 << 8)
166 #define ATMEL_TC_ETRGEDG_BOTH (3 << 8)
167 #define ATMEL_TC_ABETRG (1 << 10)
168 #define ATMEL_TC_CPCTRG (1 << 14)
169 #define ATMEL_TC_LDRA (3 << 16)
170 #define ATMEL_TC_LDRA_NONE (0 << 16)
171 #define ATMEL_TC_LDRA_RISING (1 << 16)
172 #define ATMEL_TC_LDRA_FALLING (2 << 16)
173 #define ATMEL_TC_LDRA_BOTH (3 << 16)
174 #define ATMEL_TC_LDRB (3 << 18)
175 #define ATMEL_TC_LDRB_NONE (0 << 18)
176 #define ATMEL_TC_LDRB_RISING (1 << 18)
177 #define ATMEL_TC_LDRB_FALLING (2 << 18)
178 #define ATMEL_TC_LDRB_BOTH (3 << 18)
179
180
181 #define ATMEL_TC_CPCSTOP (1 << 6)
182 #define ATMEL_TC_CPCDIS (1 << 7)
183 #define ATMEL_TC_EEVTEDG (3 << 8)
184 #define ATMEL_TC_EEVTEDG_NONE (0 << 8)
185 #define ATMEL_TC_EEVTEDG_RISING (1 << 8)
186 #define ATMEL_TC_EEVTEDG_FALLING (2 << 8)
187 #define ATMEL_TC_EEVTEDG_BOTH (3 << 8)
188 #define ATMEL_TC_EEVT (3 << 10)
189 #define ATMEL_TC_EEVT_TIOB (0 << 10)
190 #define ATMEL_TC_EEVT_XC0 (1 << 10)
191 #define ATMEL_TC_EEVT_XC1 (2 << 10)
192 #define ATMEL_TC_EEVT_XC2 (3 << 10)
193 #define ATMEL_TC_ENETRG (1 << 12)
194 #define ATMEL_TC_WAVESEL (3 << 13)
195 #define ATMEL_TC_WAVESEL_UP (0 << 13)
196 #define ATMEL_TC_WAVESEL_UPDOWN (1 << 13)
197 #define ATMEL_TC_WAVESEL_UP_AUTO (2 << 13)
198 #define ATMEL_TC_WAVESEL_UPDOWN_AUTO (3 << 13)
199 #define ATMEL_TC_ACPA (3 << 16)
200 #define ATMEL_TC_ACPA_NONE (0 << 16)
201 #define ATMEL_TC_ACPA_SET (1 << 16)
202 #define ATMEL_TC_ACPA_CLEAR (2 << 16)
203 #define ATMEL_TC_ACPA_TOGGLE (3 << 16)
204 #define ATMEL_TC_ACPC (3 << 18)
205 #define ATMEL_TC_ACPC_NONE (0 << 18)
206 #define ATMEL_TC_ACPC_SET (1 << 18)
207 #define ATMEL_TC_ACPC_CLEAR (2 << 18)
208 #define ATMEL_TC_ACPC_TOGGLE (3 << 18)
209 #define ATMEL_TC_AEEVT (3 << 20)
210 #define ATMEL_TC_AEEVT_NONE (0 << 20)
211 #define ATMEL_TC_AEEVT_SET (1 << 20)
212 #define ATMEL_TC_AEEVT_CLEAR (2 << 20)
213 #define ATMEL_TC_AEEVT_TOGGLE (3 << 20)
214 #define ATMEL_TC_ASWTRG (3 << 22)
215 #define ATMEL_TC_ASWTRG_NONE (0 << 22)
216 #define ATMEL_TC_ASWTRG_SET (1 << 22)
217 #define ATMEL_TC_ASWTRG_CLEAR (2 << 22)
218 #define ATMEL_TC_ASWTRG_TOGGLE (3 << 22)
219 #define ATMEL_TC_BCPB (3 << 24)
220 #define ATMEL_TC_BCPB_NONE (0 << 24)
221 #define ATMEL_TC_BCPB_SET (1 << 24)
222 #define ATMEL_TC_BCPB_CLEAR (2 << 24)
223 #define ATMEL_TC_BCPB_TOGGLE (3 << 24)
224 #define ATMEL_TC_BCPC (3 << 26)
225 #define ATMEL_TC_BCPC_NONE (0 << 26)
226 #define ATMEL_TC_BCPC_SET (1 << 26)
227 #define ATMEL_TC_BCPC_CLEAR (2 << 26)
228 #define ATMEL_TC_BCPC_TOGGLE (3 << 26)
229 #define ATMEL_TC_BEEVT (3 << 28)
230 #define ATMEL_TC_BEEVT_NONE (0 << 28)
231 #define ATMEL_TC_BEEVT_SET (1 << 28)
232 #define ATMEL_TC_BEEVT_CLEAR (2 << 28)
233 #define ATMEL_TC_BEEVT_TOGGLE (3 << 28)
234 #define ATMEL_TC_BSWTRG (3 << 30)
235 #define ATMEL_TC_BSWTRG_NONE (0 << 30)
236 #define ATMEL_TC_BSWTRG_SET (1 << 30)
237 #define ATMEL_TC_BSWTRG_CLEAR (2 << 30)
238 #define ATMEL_TC_BSWTRG_TOGGLE (3 << 30)
239
240 #define ATMEL_TC_CV 0x10
241 #define ATMEL_TC_RA 0x14
242 #define ATMEL_TC_RB 0x18
243 #define ATMEL_TC_RC 0x1c
244
245 #define ATMEL_TC_SR 0x20
246
247 #define ATMEL_TC_CLKSTA (1 << 16)
248 #define ATMEL_TC_MTIOA (1 << 17)
249 #define ATMEL_TC_MTIOB (1 << 18)
250
251 #define ATMEL_TC_IER 0x24
252 #define ATMEL_TC_IDR 0x28
253 #define ATMEL_TC_IMR 0x2c
254
255
256 #define ATMEL_TC_COVFS (1 << 0)
257 #define ATMEL_TC_LOVRS (1 << 1)
258 #define ATMEL_TC_CPAS (1 << 2)
259 #define ATMEL_TC_CPBS (1 << 3)
260 #define ATMEL_TC_CPCS (1 << 4)
261 #define ATMEL_TC_LDRAS (1 << 5)
262 #define ATMEL_TC_LDRBS (1 << 6)
263 #define ATMEL_TC_ETRGS (1 << 7)
264 #define ATMEL_TC_ALL_IRQ (ATMEL_TC_COVFS | ATMEL_TC_LOVRS | \
265 ATMEL_TC_CPAS | ATMEL_TC_CPBS | \
266 ATMEL_TC_CPCS | ATMEL_TC_LDRAS | \
267 ATMEL_TC_LDRBS | ATMEL_TC_ETRGS) \
268
269
270 #endif