root/include/soc/qcom/tcs.h

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INCLUDED FROM


   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
   4  */
   5 
   6 #ifndef __SOC_QCOM_TCS_H__
   7 #define __SOC_QCOM_TCS_H__
   8 
   9 #define MAX_RPMH_PAYLOAD        16
  10 
  11 /**
  12  * rpmh_state: state for the request
  13  *
  14  * RPMH_SLEEP_STATE:       State of the resource when the processor subsystem
  15  *                         is powered down. There is no client using the
  16  *                         resource actively.
  17  * RPMH_WAKE_ONLY_STATE:   Resume resource state to the value previously
  18  *                         requested before the processor was powered down.
  19  * RPMH_ACTIVE_ONLY_STATE: Active or AMC mode requests. Resource state
  20  *                         is aggregated immediately.
  21  */
  22 enum rpmh_state {
  23         RPMH_SLEEP_STATE,
  24         RPMH_WAKE_ONLY_STATE,
  25         RPMH_ACTIVE_ONLY_STATE,
  26 };
  27 
  28 /**
  29  * struct tcs_cmd: an individual request to RPMH.
  30  *
  31  * @addr: the address of the resource slv_id:18:16 | offset:0:15
  32  * @data: the resource state request
  33  * @wait: wait for this request to be complete before sending the next
  34  */
  35 struct tcs_cmd {
  36         u32 addr;
  37         u32 data;
  38         u32 wait;
  39 };
  40 
  41 /**
  42  * struct tcs_request: A set of tcs_cmds sent together in a TCS
  43  *
  44  * @state:          state for the request.
  45  * @wait_for_compl: wait until we get a response from the h/w accelerator
  46  * @num_cmds:       the number of @cmds in this request
  47  * @cmds:           an array of tcs_cmds
  48  */
  49 struct tcs_request {
  50         enum rpmh_state state;
  51         u32 wait_for_compl;
  52         u32 num_cmds;
  53         struct tcs_cmd *cmds;
  54 };
  55 
  56 #define BCM_TCS_CMD_COMMIT_SHFT         30
  57 #define BCM_TCS_CMD_COMMIT_MASK         0x40000000
  58 #define BCM_TCS_CMD_VALID_SHFT          29
  59 #define BCM_TCS_CMD_VALID_MASK          0x20000000
  60 #define BCM_TCS_CMD_VOTE_X_SHFT         14
  61 #define BCM_TCS_CMD_VOTE_MASK           0x3fff
  62 #define BCM_TCS_CMD_VOTE_Y_SHFT         0
  63 #define BCM_TCS_CMD_VOTE_Y_MASK         0xfffc000
  64 
  65 /* Construct a Bus Clock Manager (BCM) specific TCS command */
  66 #define BCM_TCS_CMD(commit, valid, vote_x, vote_y)              \
  67         (((commit) << BCM_TCS_CMD_COMMIT_SHFT) |                \
  68         ((valid) << BCM_TCS_CMD_VALID_SHFT) |                   \
  69         ((cpu_to_le32(vote_x) &                                 \
  70         BCM_TCS_CMD_VOTE_MASK) << BCM_TCS_CMD_VOTE_X_SHFT) |    \
  71         ((cpu_to_le32(vote_y) &                                 \
  72         BCM_TCS_CMD_VOTE_MASK) << BCM_TCS_CMD_VOTE_Y_SHFT))
  73 
  74 #endif /* __SOC_QCOM_TCS_H__ */

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