root/include/soc/fsl/qe/ucc_fast.h

INCLUDED FROM

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2 /*
   3  * Internal header file for UCC FAST unit routines.
   4  *
   5  * Copyright (C) 2006 Freescale Semiconductor, Inc. All rights reserved.
   6  *
   7  * Authors:     Shlomi Gridish <gridish@freescale.com>
   8  *              Li Yang <leoli@freescale.com>
   9  */
  10 #ifndef __UCC_FAST_H__
  11 #define __UCC_FAST_H__
  12 
  13 #include <linux/kernel.h>
  14 
  15 #include <soc/fsl/qe/immap_qe.h>
  16 #include <soc/fsl/qe/qe.h>
  17 
  18 #include <soc/fsl/qe/ucc.h>
  19 
  20 /* Receive BD's status and length*/
  21 #define R_E     0x80000000      /* buffer empty */
  22 #define R_W     0x20000000      /* wrap bit */
  23 #define R_I     0x10000000      /* interrupt on reception */
  24 #define R_L     0x08000000      /* last */
  25 #define R_F     0x04000000      /* first */
  26 
  27 /* transmit BD's status and length*/
  28 #define T_R     0x80000000      /* ready bit */
  29 #define T_W     0x20000000      /* wrap bit */
  30 #define T_I     0x10000000      /* interrupt on completion */
  31 #define T_L     0x08000000      /* last */
  32 
  33 /* Receive BD's status */
  34 #define R_E_S   0x8000  /* buffer empty */
  35 #define R_W_S   0x2000  /* wrap bit */
  36 #define R_I_S   0x1000  /* interrupt on reception */
  37 #define R_L_S   0x0800  /* last */
  38 #define R_F_S   0x0400  /* first */
  39 #define R_CM_S  0x0200  /* continuous mode */
  40 #define R_LG_S  0x0020  /* frame length */
  41 #define R_NO_S  0x0010  /* nonoctet */
  42 #define R_AB_S  0x0008  /* abort */
  43 #define R_CR_S  0x0004  /* crc */
  44 #define R_OV_S  0x0002  /* overrun */
  45 #define R_CD_S  0x0001  /* carrier detect */
  46 
  47 /* transmit BD's status */
  48 #define T_R_S   0x8000  /* ready bit */
  49 #define T_W_S   0x2000  /* wrap bit */
  50 #define T_I_S   0x1000  /* interrupt on completion */
  51 #define T_L_S   0x0800  /* last */
  52 #define T_TC_S  0x0400  /* crc */
  53 #define T_TM_S  0x0200  /* continuous mode */
  54 #define T_UN_S  0x0002  /* hdlc underrun */
  55 #define T_CT_S  0x0001  /* hdlc carrier lost */
  56 
  57 /* Rx Data buffer must be 4 bytes aligned in most cases */
  58 #define UCC_FAST_RX_ALIGN                       4
  59 #define UCC_FAST_MRBLR_ALIGNMENT                4
  60 #define UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT       8
  61 
  62 /* Sizes */
  63 #define UCC_FAST_URFS_MIN_VAL                           0x88
  64 #define UCC_FAST_RECEIVE_VIRTUAL_FIFO_SIZE_FUDGE_FACTOR 8
  65 
  66 /* ucc_fast_channel_protocol_mode - UCC FAST mode */
  67 enum ucc_fast_channel_protocol_mode {
  68         UCC_FAST_PROTOCOL_MODE_HDLC = 0x00000000,
  69         UCC_FAST_PROTOCOL_MODE_RESERVED01 = 0x00000001,
  70         UCC_FAST_PROTOCOL_MODE_RESERVED_QMC = 0x00000002,
  71         UCC_FAST_PROTOCOL_MODE_RESERVED02 = 0x00000003,
  72         UCC_FAST_PROTOCOL_MODE_RESERVED_UART = 0x00000004,
  73         UCC_FAST_PROTOCOL_MODE_RESERVED03 = 0x00000005,
  74         UCC_FAST_PROTOCOL_MODE_RESERVED_EX_MAC_1 = 0x00000006,
  75         UCC_FAST_PROTOCOL_MODE_RESERVED_EX_MAC_2 = 0x00000007,
  76         UCC_FAST_PROTOCOL_MODE_RESERVED_BISYNC = 0x00000008,
  77         UCC_FAST_PROTOCOL_MODE_RESERVED04 = 0x00000009,
  78         UCC_FAST_PROTOCOL_MODE_ATM = 0x0000000A,
  79         UCC_FAST_PROTOCOL_MODE_RESERVED05 = 0x0000000B,
  80         UCC_FAST_PROTOCOL_MODE_ETHERNET = 0x0000000C,
  81         UCC_FAST_PROTOCOL_MODE_RESERVED06 = 0x0000000D,
  82         UCC_FAST_PROTOCOL_MODE_POS = 0x0000000E,
  83         UCC_FAST_PROTOCOL_MODE_RESERVED07 = 0x0000000F
  84 };
  85 
  86 /* ucc_fast_transparent_txrx - UCC Fast Transparent TX & RX */
  87 enum ucc_fast_transparent_txrx {
  88         UCC_FAST_GUMR_TRANSPARENT_TTX_TRX_NORMAL = 0x00000000,
  89         UCC_FAST_GUMR_TRANSPARENT_TTX_TRX_TRANSPARENT = 0x18000000
  90 };
  91 
  92 /* UCC fast diagnostic mode */
  93 enum ucc_fast_diag_mode {
  94         UCC_FAST_DIAGNOSTIC_NORMAL = 0x0,
  95         UCC_FAST_DIAGNOSTIC_LOCAL_LOOP_BACK = 0x40000000,
  96         UCC_FAST_DIAGNOSTIC_AUTO_ECHO = 0x80000000,
  97         UCC_FAST_DIAGNOSTIC_LOOP_BACK_AND_ECHO = 0xC0000000
  98 };
  99 
 100 /* UCC fast Sync length (transparent mode only) */
 101 enum ucc_fast_sync_len {
 102         UCC_FAST_SYNC_LEN_NOT_USED = 0x0,
 103         UCC_FAST_SYNC_LEN_AUTOMATIC = 0x00004000,
 104         UCC_FAST_SYNC_LEN_8_BIT = 0x00008000,
 105         UCC_FAST_SYNC_LEN_16_BIT = 0x0000C000
 106 };
 107 
 108 /* UCC fast RTS mode */
 109 enum ucc_fast_ready_to_send {
 110         UCC_FAST_SEND_IDLES_BETWEEN_FRAMES = 0x00000000,
 111         UCC_FAST_SEND_FLAGS_BETWEEN_FRAMES = 0x00002000
 112 };
 113 
 114 /* UCC fast receiver decoding mode */
 115 enum ucc_fast_rx_decoding_method {
 116         UCC_FAST_RX_ENCODING_NRZ = 0x00000000,
 117         UCC_FAST_RX_ENCODING_NRZI = 0x00000800,
 118         UCC_FAST_RX_ENCODING_RESERVED0 = 0x00001000,
 119         UCC_FAST_RX_ENCODING_RESERVED1 = 0x00001800
 120 };
 121 
 122 /* UCC fast transmitter encoding mode */
 123 enum ucc_fast_tx_encoding_method {
 124         UCC_FAST_TX_ENCODING_NRZ = 0x00000000,
 125         UCC_FAST_TX_ENCODING_NRZI = 0x00000100,
 126         UCC_FAST_TX_ENCODING_RESERVED0 = 0x00000200,
 127         UCC_FAST_TX_ENCODING_RESERVED1 = 0x00000300
 128 };
 129 
 130 /* UCC fast CRC length */
 131 enum ucc_fast_transparent_tcrc {
 132         UCC_FAST_16_BIT_CRC = 0x00000000,
 133         UCC_FAST_CRC_RESERVED0 = 0x00000040,
 134         UCC_FAST_32_BIT_CRC = 0x00000080,
 135         UCC_FAST_CRC_RESERVED1 = 0x000000C0
 136 };
 137 
 138 /* Fast UCC initialization structure */
 139 struct ucc_fast_info {
 140         int ucc_num;
 141         int tdm_num;
 142         enum qe_clock rx_clock;
 143         enum qe_clock tx_clock;
 144         enum qe_clock rx_sync;
 145         enum qe_clock tx_sync;
 146         resource_size_t regs;
 147         int irq;
 148         u32 uccm_mask;
 149         int bd_mem_part;
 150         int brkpt_support;
 151         int grant_support;
 152         int tsa;
 153         int cdp;
 154         int cds;
 155         int ctsp;
 156         int ctss;
 157         int tci;
 158         int txsy;
 159         int rtsm;
 160         int revd;
 161         int rsyn;
 162         u16 max_rx_buf_length;
 163         u16 urfs;
 164         u16 urfet;
 165         u16 urfset;
 166         u16 utfs;
 167         u16 utfet;
 168         u16 utftt;
 169         u16 ufpt;
 170         enum ucc_fast_channel_protocol_mode mode;
 171         enum ucc_fast_transparent_txrx ttx_trx;
 172         enum ucc_fast_tx_encoding_method tenc;
 173         enum ucc_fast_rx_decoding_method renc;
 174         enum ucc_fast_transparent_tcrc tcrc;
 175         enum ucc_fast_sync_len synl;
 176 };
 177 
 178 struct ucc_fast_private {
 179         struct ucc_fast_info *uf_info;
 180         struct ucc_fast __iomem *uf_regs; /* a pointer to the UCC regs. */
 181         u32 __iomem *p_ucce;    /* a pointer to the event register in memory. */
 182         u32 __iomem *p_uccm;    /* a pointer to the mask register in memory. */
 183 #ifdef CONFIG_UGETH_TX_ON_DEMAND
 184         u16 __iomem *p_utodr;   /* pointer to the transmit on demand register */
 185 #endif
 186         int enabled_tx;         /* Whether channel is enabled for Tx (ENT) */
 187         int enabled_rx;         /* Whether channel is enabled for Rx (ENR) */
 188         int stopped_tx;         /* Whether channel has been stopped for Tx
 189                                    (STOP_TX, etc.) */
 190         int stopped_rx;         /* Whether channel has been stopped for Rx */
 191         u32 ucc_fast_tx_virtual_fifo_base_offset;/* pointer to base of Tx
 192                                                     virtual fifo */
 193         u32 ucc_fast_rx_virtual_fifo_base_offset;/* pointer to base of Rx
 194                                                     virtual fifo */
 195 #ifdef STATISTICS
 196         u32 tx_frames;          /* Transmitted frames counter. */
 197         u32 rx_frames;          /* Received frames counter (only frames
 198                                    passed to application). */
 199         u32 tx_discarded;       /* Discarded tx frames counter (frames that
 200                                    were discarded by the driver due to errors).
 201                                    */
 202         u32 rx_discarded;       /* Discarded rx frames counter (frames that
 203                                    were discarded by the driver due to errors).
 204                                    */
 205 #endif                          /* STATISTICS */
 206         u16 mrblr;              /* maximum receive buffer length */
 207 };
 208 
 209 /* ucc_fast_init
 210  * Initializes Fast UCC according to user provided parameters.
 211  *
 212  * uf_info  - (In) pointer to the fast UCC info structure.
 213  * uccf_ret - (Out) pointer to the fast UCC structure.
 214  */
 215 int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** uccf_ret);
 216 
 217 /* ucc_fast_free
 218  * Frees all resources for fast UCC.
 219  *
 220  * uccf - (In) pointer to the fast UCC structure.
 221  */
 222 void ucc_fast_free(struct ucc_fast_private * uccf);
 223 
 224 /* ucc_fast_enable
 225  * Enables a fast UCC port.
 226  * This routine enables Tx and/or Rx through the General UCC Mode Register.
 227  *
 228  * uccf - (In) pointer to the fast UCC structure.
 229  * mode - (In) TX, RX, or both.
 230  */
 231 void ucc_fast_enable(struct ucc_fast_private * uccf, enum comm_dir mode);
 232 
 233 /* ucc_fast_disable
 234  * Disables a fast UCC port.
 235  * This routine disables Tx and/or Rx through the General UCC Mode Register.
 236  *
 237  * uccf - (In) pointer to the fast UCC structure.
 238  * mode - (In) TX, RX, or both.
 239  */
 240 void ucc_fast_disable(struct ucc_fast_private * uccf, enum comm_dir mode);
 241 
 242 /* ucc_fast_irq
 243  * Handles interrupts on fast UCC.
 244  * Called from the general interrupt routine to handle interrupts on fast UCC.
 245  *
 246  * uccf - (In) pointer to the fast UCC structure.
 247  */
 248 void ucc_fast_irq(struct ucc_fast_private * uccf);
 249 
 250 /* ucc_fast_transmit_on_demand
 251  * Immediately forces a poll of the transmitter for data to be sent.
 252  * Typically, the hardware performs a periodic poll for data that the
 253  * transmit routine has set up to be transmitted. In cases where
 254  * this polling cycle is not soon enough, this optional routine can
 255  * be invoked to force a poll right away, instead. Proper use for
 256  * each transmission for which this functionality is desired is to
 257  * call the transmit routine and then this routine right after.
 258  *
 259  * uccf - (In) pointer to the fast UCC structure.
 260  */
 261 void ucc_fast_transmit_on_demand(struct ucc_fast_private * uccf);
 262 
 263 u32 ucc_fast_get_qe_cr_subblock(int uccf_num);
 264 
 265 void ucc_fast_dump_regs(struct ucc_fast_private * uccf);
 266 
 267 #endif                          /* __UCC_FAST_H__ */