root/include/video/w100fb.h

INCLUDED FROM

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  *  Support for the w100 frame buffer.
   4  *
   5  *  Copyright (c) 2004-2005 Richard Purdie
   6  *  Copyright (c) 2005 Ian Molton
   7  */
   8 
   9 #define W100_GPIO_PORT_A        0
  10 #define W100_GPIO_PORT_B        1
  11 
  12 #define CLK_SRC_XTAL  0
  13 #define CLK_SRC_PLL   1
  14 
  15 struct w100fb_par;
  16 
  17 unsigned long w100fb_gpio_read(int port);
  18 void w100fb_gpio_write(int port, unsigned long value);
  19 unsigned long w100fb_get_hsynclen(struct device *dev);
  20 
  21 /* LCD Specific Routines and Config */
  22 struct w100_tg_info {
  23         void (*change)(struct w100fb_par*);
  24         void (*suspend)(struct w100fb_par*);
  25         void (*resume)(struct w100fb_par*);
  26 };
  27 
  28 /* General Platform Specific w100 Register Values */
  29 struct w100_gen_regs {
  30         unsigned long lcd_format;
  31         unsigned long lcdd_cntl1;
  32         unsigned long lcdd_cntl2;
  33         unsigned long genlcd_cntl1;
  34         unsigned long genlcd_cntl2;
  35         unsigned long genlcd_cntl3;
  36 };
  37 
  38 struct w100_gpio_regs {
  39         unsigned long init_data1;
  40         unsigned long init_data2;
  41         unsigned long gpio_dir1;
  42         unsigned long gpio_oe1;
  43         unsigned long gpio_dir2;
  44         unsigned long gpio_oe2;
  45 };
  46 
  47 /* Optional External Memory Configuration */
  48 struct w100_mem_info {
  49         unsigned long ext_cntl;
  50         unsigned long sdram_mode_reg;
  51         unsigned long ext_timing_cntl;
  52         unsigned long io_cntl;
  53         unsigned int size;
  54 };
  55 
  56 struct w100_bm_mem_info {
  57         unsigned long ext_mem_bw;
  58         unsigned long offset;
  59         unsigned long ext_timing_ctl;
  60         unsigned long ext_cntl;
  61         unsigned long mode_reg;
  62         unsigned long io_cntl;
  63         unsigned long config;
  64 };
  65 
  66 /* LCD Mode definition */
  67 struct w100_mode {
  68         unsigned int xres;
  69         unsigned int yres;
  70         unsigned short left_margin;
  71         unsigned short right_margin;
  72         unsigned short upper_margin;
  73         unsigned short lower_margin;
  74         unsigned long crtc_ss;
  75         unsigned long crtc_ls;
  76         unsigned long crtc_gs;
  77         unsigned long crtc_vpos_gs;
  78         unsigned long crtc_rev;
  79         unsigned long crtc_dclk;
  80         unsigned long crtc_gclk;
  81         unsigned long crtc_goe;
  82         unsigned long crtc_ps1_active;
  83         char pll_freq;
  84         char fast_pll_freq;
  85         int sysclk_src;
  86         int sysclk_divider;
  87         int pixclk_src;
  88         int pixclk_divider;
  89         int pixclk_divider_rotated;
  90 };
  91 
  92 struct w100_pll_info {
  93         uint16_t freq;  /* desired Fout for PLL (Mhz) */
  94         uint8_t M;      /* input divider */
  95         uint8_t N_int;  /* VCO multiplier */
  96         uint8_t N_fac;  /* VCO multiplier fractional part */
  97         uint8_t tfgoal;
  98         uint8_t lock_time;
  99 };
 100 
 101 /* Initial Video mode orientation flags */
 102 #define INIT_MODE_ROTATED  0x1
 103 #define INIT_MODE_FLIPPED  0x2
 104 
 105 /*
 106  * This structure describes the machine which we are running on.
 107  * It is set by machine specific code and used in the probe routine
 108  * of drivers/video/w100fb.c
 109  */
 110 struct w100fb_mach_info {
 111         /* General Platform Specific Registers */
 112         struct w100_gen_regs *regs;
 113         /* Table of modes the LCD is capable of */
 114         struct w100_mode *modelist;
 115         unsigned int num_modes;
 116         /* Hooks for any platform specific tg/lcd code (optional) */
 117         struct w100_tg_info *tg;
 118         /* External memory definition (if present) */
 119         struct w100_mem_info *mem;
 120         /* Additional External memory definition (if present) */
 121         struct w100_bm_mem_info *bm_mem;
 122         /* GPIO definitions (optional) */
 123         struct w100_gpio_regs *gpio;
 124         /* Initial Mode flags */
 125         unsigned int init_mode;
 126         /* Xtal Frequency */
 127         unsigned int xtal_freq;
 128         /* Enable Xtal input doubler (1 == enable) */
 129         unsigned int xtal_dbl;
 130 };
 131 
 132 /* General frame buffer data structure */
 133 struct w100fb_par {
 134         unsigned int chip_id;
 135         unsigned int xres;
 136         unsigned int yres;
 137         unsigned int extmem_active;
 138         unsigned int flip;
 139         unsigned int blanked;
 140         unsigned int fastpll_mode;
 141         unsigned long hsync_len;
 142         struct w100_mode *mode;
 143         struct w100_pll_info *pll_table;
 144         struct w100fb_mach_info *mach;
 145         uint32_t *saved_intmem;
 146         uint32_t *saved_extmem;
 147 };