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33 #ifndef MLX5_USER_IOCTL_VERBS_H
34 #define MLX5_USER_IOCTL_VERBS_H
35
36 #include <linux/types.h>
37
38 enum mlx5_ib_uapi_flow_action_flags {
39 MLX5_IB_UAPI_FLOW_ACTION_FLAGS_REQUIRE_METADATA = 1 << 0,
40 };
41
42 enum mlx5_ib_uapi_flow_table_type {
43 MLX5_IB_UAPI_FLOW_TABLE_TYPE_NIC_RX = 0x0,
44 MLX5_IB_UAPI_FLOW_TABLE_TYPE_NIC_TX = 0x1,
45 MLX5_IB_UAPI_FLOW_TABLE_TYPE_FDB = 0x2,
46 MLX5_IB_UAPI_FLOW_TABLE_TYPE_RDMA_RX = 0x3,
47 };
48
49 enum mlx5_ib_uapi_flow_action_packet_reformat_type {
50 MLX5_IB_UAPI_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2 = 0x0,
51 MLX5_IB_UAPI_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL = 0x1,
52 MLX5_IB_UAPI_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 = 0x2,
53 MLX5_IB_UAPI_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL = 0x3,
54 };
55
56 struct mlx5_ib_uapi_devx_async_cmd_hdr {
57 __aligned_u64 wr_id;
58 __u8 out_data[];
59 };
60
61 enum mlx5_ib_uapi_dm_type {
62 MLX5_IB_UAPI_DM_TYPE_MEMIC,
63 MLX5_IB_UAPI_DM_TYPE_STEERING_SW_ICM,
64 MLX5_IB_UAPI_DM_TYPE_HEADER_MODIFY_SW_ICM,
65 };
66
67 enum mlx5_ib_uapi_devx_create_event_channel_flags {
68 MLX5_IB_UAPI_DEVX_CR_EV_CH_FLAGS_OMIT_DATA = 1 << 0,
69 };
70
71 struct mlx5_ib_uapi_devx_async_event_hdr {
72 __aligned_u64 cookie;
73 __u8 out_data[];
74 };
75
76 #endif
77