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43 #ifndef _DT_BINDINGS_CLK_SUN8I_A23_A33_H_
44 #define _DT_BINDINGS_CLK_SUN8I_A23_A33_H_
45
46 #define CLK_CPUX 18
47
48 #define CLK_BUS_MIPI_DSI 23
49 #define CLK_BUS_SS 24
50 #define CLK_BUS_DMA 25
51 #define CLK_BUS_MMC0 26
52 #define CLK_BUS_MMC1 27
53 #define CLK_BUS_MMC2 28
54 #define CLK_BUS_NAND 29
55 #define CLK_BUS_DRAM 30
56 #define CLK_BUS_HSTIMER 31
57 #define CLK_BUS_SPI0 32
58 #define CLK_BUS_SPI1 33
59 #define CLK_BUS_OTG 34
60 #define CLK_BUS_EHCI 35
61 #define CLK_BUS_OHCI 36
62 #define CLK_BUS_VE 37
63 #define CLK_BUS_LCD 38
64 #define CLK_BUS_CSI 39
65 #define CLK_BUS_DE_BE 40
66 #define CLK_BUS_DE_FE 41
67 #define CLK_BUS_GPU 42
68 #define CLK_BUS_MSGBOX 43
69 #define CLK_BUS_SPINLOCK 44
70 #define CLK_BUS_DRC 45
71 #define CLK_BUS_SAT 46
72 #define CLK_BUS_CODEC 47
73 #define CLK_BUS_PIO 48
74 #define CLK_BUS_I2S0 49
75 #define CLK_BUS_I2S1 50
76 #define CLK_BUS_I2C0 51
77 #define CLK_BUS_I2C1 52
78 #define CLK_BUS_I2C2 53
79 #define CLK_BUS_UART0 54
80 #define CLK_BUS_UART1 55
81 #define CLK_BUS_UART2 56
82 #define CLK_BUS_UART3 57
83 #define CLK_BUS_UART4 58
84 #define CLK_NAND 59
85 #define CLK_MMC0 60
86 #define CLK_MMC0_SAMPLE 61
87 #define CLK_MMC0_OUTPUT 62
88 #define CLK_MMC1 63
89 #define CLK_MMC1_SAMPLE 64
90 #define CLK_MMC1_OUTPUT 65
91 #define CLK_MMC2 66
92 #define CLK_MMC2_SAMPLE 67
93 #define CLK_MMC2_OUTPUT 68
94 #define CLK_SS 69
95 #define CLK_SPI0 70
96 #define CLK_SPI1 71
97 #define CLK_I2S0 72
98 #define CLK_I2S1 73
99 #define CLK_USB_PHY0 74
100 #define CLK_USB_PHY1 75
101 #define CLK_USB_HSIC 76
102 #define CLK_USB_HSIC_12M 77
103 #define CLK_USB_OHCI 78
104
105 #define CLK_DRAM_VE 80
106 #define CLK_DRAM_CSI 81
107 #define CLK_DRAM_DRC 82
108 #define CLK_DRAM_DE_FE 83
109 #define CLK_DRAM_DE_BE 84
110 #define CLK_DE_BE 85
111 #define CLK_DE_FE 86
112 #define CLK_LCD_CH0 87
113 #define CLK_LCD_CH1 88
114 #define CLK_CSI_SCLK 89
115 #define CLK_CSI_MCLK 90
116 #define CLK_VE 91
117 #define CLK_AC_DIG 92
118 #define CLK_AC_DIG_4X 93
119 #define CLK_AVS 94
120
121 #define CLK_DSI_SCLK 96
122 #define CLK_DSI_DPHY 97
123 #define CLK_DRC 98
124 #define CLK_GPU 99
125 #define CLK_ATS 100
126
127 #endif