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9 #ifndef _SC_TYPES_H
10 #define _SC_TYPES_H
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15 enum imx_sc_ctrl {
16 IMX_SC_C_TEMP = 0,
17 IMX_SC_C_TEMP_HI = 1,
18 IMX_SC_C_TEMP_LOW = 2,
19 IMX_SC_C_PXL_LINK_MST1_ADDR = 3,
20 IMX_SC_C_PXL_LINK_MST2_ADDR = 4,
21 IMX_SC_C_PXL_LINK_MST_ENB = 5,
22 IMX_SC_C_PXL_LINK_MST1_ENB = 6,
23 IMX_SC_C_PXL_LINK_MST2_ENB = 7,
24 IMX_SC_C_PXL_LINK_SLV1_ADDR = 8,
25 IMX_SC_C_PXL_LINK_SLV2_ADDR = 9,
26 IMX_SC_C_PXL_LINK_MST_VLD = 10,
27 IMX_SC_C_PXL_LINK_MST1_VLD = 11,
28 IMX_SC_C_PXL_LINK_MST2_VLD = 12,
29 IMX_SC_C_SINGLE_MODE = 13,
30 IMX_SC_C_ID = 14,
31 IMX_SC_C_PXL_CLK_POLARITY = 15,
32 IMX_SC_C_LINESTATE = 16,
33 IMX_SC_C_PCIE_G_RST = 17,
34 IMX_SC_C_PCIE_BUTTON_RST = 18,
35 IMX_SC_C_PCIE_PERST = 19,
36 IMX_SC_C_PHY_RESET = 20,
37 IMX_SC_C_PXL_LINK_RATE_CORRECTION = 21,
38 IMX_SC_C_PANIC = 22,
39 IMX_SC_C_PRIORITY_GROUP = 23,
40 IMX_SC_C_TXCLK = 24,
41 IMX_SC_C_CLKDIV = 25,
42 IMX_SC_C_DISABLE_50 = 26,
43 IMX_SC_C_DISABLE_125 = 27,
44 IMX_SC_C_SEL_125 = 28,
45 IMX_SC_C_MODE = 29,
46 IMX_SC_C_SYNC_CTRL0 = 30,
47 IMX_SC_C_KACHUNK_CNT = 31,
48 IMX_SC_C_KACHUNK_SEL = 32,
49 IMX_SC_C_SYNC_CTRL1 = 33,
50 IMX_SC_C_DPI_RESET = 34,
51 IMX_SC_C_MIPI_RESET = 35,
52 IMX_SC_C_DUAL_MODE = 36,
53 IMX_SC_C_VOLTAGE = 37,
54 IMX_SC_C_PXL_LINK_SEL = 38,
55 IMX_SC_C_OFS_SEL = 39,
56 IMX_SC_C_OFS_AUDIO = 40,
57 IMX_SC_C_OFS_PERIPH = 41,
58 IMX_SC_C_OFS_IRQ = 42,
59 IMX_SC_C_RST0 = 43,
60 IMX_SC_C_RST1 = 44,
61 IMX_SC_C_SEL0 = 45,
62 IMX_SC_C_LAST
63 };
64
65 #endif