root/include/linux/mfd/arizona/pdata.h

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   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * Platform data for Arizona devices
   4  *
   5  * Copyright 2012 Wolfson Microelectronics. PLC.
   6  */
   7 
   8 #ifndef _ARIZONA_PDATA_H
   9 #define _ARIZONA_PDATA_H
  10 
  11 #include <dt-bindings/mfd/arizona.h>
  12 #include <linux/regulator/arizona-ldo1.h>
  13 #include <linux/regulator/arizona-micsupp.h>
  14 
  15 #define ARIZONA_GPN_DIR_MASK                     0x8000  /* GPN_DIR */
  16 #define ARIZONA_GPN_DIR_SHIFT                        15  /* GPN_DIR */
  17 #define ARIZONA_GPN_DIR_WIDTH                         1  /* GPN_DIR */
  18 #define ARIZONA_GPN_PU_MASK                      0x4000  /* GPN_PU */
  19 #define ARIZONA_GPN_PU_SHIFT                         14  /* GPN_PU */
  20 #define ARIZONA_GPN_PU_WIDTH                          1  /* GPN_PU */
  21 #define ARIZONA_GPN_PD_MASK                      0x2000  /* GPN_PD */
  22 #define ARIZONA_GPN_PD_SHIFT                         13  /* GPN_PD */
  23 #define ARIZONA_GPN_PD_WIDTH                          1  /* GPN_PD */
  24 #define ARIZONA_GPN_LVL_MASK                     0x0800  /* GPN_LVL */
  25 #define ARIZONA_GPN_LVL_SHIFT                        11  /* GPN_LVL */
  26 #define ARIZONA_GPN_LVL_WIDTH                         1  /* GPN_LVL */
  27 #define ARIZONA_GPN_POL_MASK                     0x0400  /* GPN_POL */
  28 #define ARIZONA_GPN_POL_SHIFT                        10  /* GPN_POL */
  29 #define ARIZONA_GPN_POL_WIDTH                         1  /* GPN_POL */
  30 #define ARIZONA_GPN_OP_CFG_MASK                  0x0200  /* GPN_OP_CFG */
  31 #define ARIZONA_GPN_OP_CFG_SHIFT                      9  /* GPN_OP_CFG */
  32 #define ARIZONA_GPN_OP_CFG_WIDTH                      1  /* GPN_OP_CFG */
  33 #define ARIZONA_GPN_DB_MASK                      0x0100  /* GPN_DB */
  34 #define ARIZONA_GPN_DB_SHIFT                          8  /* GPN_DB */
  35 #define ARIZONA_GPN_DB_WIDTH                          1  /* GPN_DB */
  36 #define ARIZONA_GPN_FN_MASK                      0x007F  /* GPN_FN - [6:0] */
  37 #define ARIZONA_GPN_FN_SHIFT                          0  /* GPN_FN - [6:0] */
  38 #define ARIZONA_GPN_FN_WIDTH                          7  /* GPN_FN - [6:0] */
  39 
  40 #define ARIZONA_MAX_GPIO 5
  41 
  42 #define ARIZONA_MAX_INPUT 4
  43 
  44 #define ARIZONA_MAX_MICBIAS 3
  45 
  46 #define ARIZONA_MAX_OUTPUT 6
  47 
  48 #define ARIZONA_MAX_AIF 3
  49 
  50 #define ARIZONA_HAP_ACT_ERM 0
  51 #define ARIZONA_HAP_ACT_LRA 2
  52 
  53 #define ARIZONA_MAX_PDM_SPK 2
  54 
  55 struct regulator_init_data;
  56 struct gpio_desc;
  57 
  58 struct arizona_micbias {
  59         int mV;                    /** Regulated voltage */
  60         unsigned int ext_cap:1;    /** External capacitor fitted */
  61         unsigned int discharge:1;  /** Actively discharge */
  62         unsigned int soft_start:1; /** Disable aggressive startup ramp rate */
  63         unsigned int bypass:1;     /** Use bypass mode */
  64 };
  65 
  66 struct arizona_micd_config {
  67         unsigned int src;
  68         unsigned int bias;
  69         bool gpio;
  70 };
  71 
  72 struct arizona_micd_range {
  73         int max;  /** Ohms */
  74         int key;  /** Key to report to input layer */
  75 };
  76 
  77 struct arizona_pdata {
  78         struct gpio_desc *reset;      /** GPIO controlling /RESET, if any */
  79 
  80         /** Regulator configuration for MICVDD */
  81         struct arizona_micsupp_pdata micvdd;
  82 
  83         /** Regulator configuration for LDO1 */
  84         struct arizona_ldo1_pdata ldo1;
  85 
  86         /** If a direct 32kHz clock is provided on an MCLK specify it here */
  87         int clk32k_src;
  88 
  89         /** Mode for primary IRQ (defaults to active low) */
  90         unsigned int irq_flags;
  91 
  92         /* Base GPIO */
  93         int gpio_base;
  94 
  95         /** Pin state for GPIO pins */
  96         unsigned int gpio_defaults[ARIZONA_MAX_GPIO];
  97 
  98         /**
  99          * Maximum number of channels clocks will be generated for,
 100          * useful for systems where and I2S bus with multiple data
 101          * lines is mastered.
 102          */
 103         unsigned int max_channels_clocked[ARIZONA_MAX_AIF];
 104 
 105         /** GPIO5 is used for jack detection */
 106         bool jd_gpio5;
 107 
 108         /** Internal pull on GPIO5 is disabled when used for jack detection */
 109         bool jd_gpio5_nopull;
 110 
 111         /** set to true if jackdet contact opens on insert */
 112         bool jd_invert;
 113 
 114         /** Use the headphone detect circuit to identify the accessory */
 115         bool hpdet_acc_id;
 116 
 117         /** Check for line output with HPDET method */
 118         bool hpdet_acc_id_line;
 119 
 120         /** GPIO used for mic isolation with HPDET */
 121         int hpdet_id_gpio;
 122 
 123         /** Channel to use for headphone detection */
 124         unsigned int hpdet_channel;
 125 
 126         /** Use software comparison to determine mic presence */
 127         bool micd_software_compare;
 128 
 129         /** Extra debounce timeout used during initial mic detection (ms) */
 130         unsigned int micd_detect_debounce;
 131 
 132         /** GPIO for mic detection polarity */
 133         int micd_pol_gpio;
 134 
 135         /** Mic detect ramp rate */
 136         unsigned int micd_bias_start_time;
 137 
 138         /** Mic detect sample rate */
 139         unsigned int micd_rate;
 140 
 141         /** Mic detect debounce level */
 142         unsigned int micd_dbtime;
 143 
 144         /** Mic detect timeout (ms) */
 145         unsigned int micd_timeout;
 146 
 147         /** Force MICBIAS on for mic detect */
 148         bool micd_force_micbias;
 149 
 150         /** Mic detect level parameters */
 151         const struct arizona_micd_range *micd_ranges;
 152         int num_micd_ranges;
 153 
 154         /** Headset polarity configurations */
 155         struct arizona_micd_config *micd_configs;
 156         int num_micd_configs;
 157 
 158         /** Reference voltage for DMIC inputs */
 159         int dmic_ref[ARIZONA_MAX_INPUT];
 160 
 161         /** MICBIAS configurations */
 162         struct arizona_micbias micbias[ARIZONA_MAX_MICBIAS];
 163 
 164         /**
 165          * Mode of input structures
 166          * One of the ARIZONA_INMODE_xxx values
 167          * wm5102/wm5110/wm8280/wm8997: [0]=IN1 [1]=IN2 [2]=IN3 [3]=IN4
 168          * wm8998: [0]=IN1A [1]=IN2A [2]=IN1B [3]=IN2B
 169          */
 170         int inmode[ARIZONA_MAX_INPUT];
 171 
 172         /** Mode for outputs */
 173         int out_mono[ARIZONA_MAX_OUTPUT];
 174 
 175         /** Limit output volumes */
 176         unsigned int out_vol_limit[2 * ARIZONA_MAX_OUTPUT];
 177 
 178         /** PDM speaker mute setting */
 179         unsigned int spk_mute[ARIZONA_MAX_PDM_SPK];
 180 
 181         /** PDM speaker format */
 182         unsigned int spk_fmt[ARIZONA_MAX_PDM_SPK];
 183 
 184         /** Haptic actuator type */
 185         unsigned int hap_act;
 186 
 187         /** GPIO for primary IRQ (used for edge triggered emulation) */
 188         int irq_gpio;
 189 
 190         /** General purpose switch control */
 191         unsigned int gpsw;
 192 };
 193 
 194 #endif

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