This source file includes following definitions.
- i2c_mfd_cell_to_core
- si476x_core_lock
- si476x_core_unlock
- hz_to_si476x
- si476x_to_hz
- hz_to_v4l2
- v4l2_to_hz
- v4l2_to_si476x
- si476x_to_v4l2
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12 #ifndef SI476X_CORE_H
13 #define SI476X_CORE_H
14
15 #include <linux/kfifo.h>
16 #include <linux/atomic.h>
17 #include <linux/i2c.h>
18 #include <linux/regmap.h>
19 #include <linux/mutex.h>
20 #include <linux/mfd/core.h>
21 #include <linux/videodev2.h>
22 #include <linux/regulator/consumer.h>
23
24 #include <linux/mfd/si476x-platform.h>
25 #include <linux/mfd/si476x-reports.h>
26
27
28 #define SI476X_DEFAULT_TIMEOUT 100000
29 #define SI476X_TIMEOUT_TUNE 700000
30 #define SI476X_TIMEOUT_POWER_UP 330000
31 #define SI476X_STATUS_POLL_US 0
32
33
34
35 enum si476x_freq_supported_chips {
36 SI476X_CHIP_SI4761 = 1,
37 SI476X_CHIP_SI4764,
38 SI476X_CHIP_SI4768,
39 };
40
41 enum si476x_part_revisions {
42 SI476X_REVISION_A10 = 0,
43 SI476X_REVISION_A20 = 1,
44 SI476X_REVISION_A30 = 2,
45 };
46
47 enum si476x_mfd_cells {
48 SI476X_RADIO_CELL = 0,
49 SI476X_CODEC_CELL,
50 SI476X_MFD_CELLS,
51 };
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69 enum si476x_power_state {
70 SI476X_POWER_DOWN = 0,
71 SI476X_POWER_UP_FULL = 1,
72 SI476X_POWER_INCONSISTENT = 2,
73 };
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115 struct si476x_core {
116 struct i2c_client *client;
117 struct regmap *regmap;
118 int chip_id;
119 struct mfd_cell cells[SI476X_MFD_CELLS];
120
121 struct mutex cmd_lock;
122 atomic_t users;
123
124 wait_queue_head_t rds_read_queue;
125 struct kfifo rds_fifo;
126 struct work_struct rds_fifo_drainer;
127 bool rds_drainer_is_working;
128 struct mutex rds_drainer_status_lock;
129
130 wait_queue_head_t command;
131 atomic_t cts;
132
133 wait_queue_head_t tuning;
134 atomic_t stc;
135
136 struct si476x_power_up_args power_up_parameters;
137
138 enum si476x_power_state power_state;
139
140 struct regulator_bulk_data supplies[4];
141
142 int gpio_reset;
143
144 struct si476x_pinmux pinmux;
145 enum si476x_phase_diversity_mode diversity_mode;
146
147 atomic_t is_alive;
148
149 struct delayed_work status_monitor;
150 #define SI476X_WORK_TO_CORE(w) container_of(to_delayed_work(w), \
151 struct si476x_core, \
152 status_monitor)
153
154 int revision;
155
156 int rds_fifo_depth;
157 };
158
159 static inline struct si476x_core *i2c_mfd_cell_to_core(struct device *dev)
160 {
161 struct i2c_client *client = to_i2c_client(dev->parent);
162 return i2c_get_clientdata(client);
163 }
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170 static inline void si476x_core_lock(struct si476x_core *core)
171 {
172 mutex_lock(&core->cmd_lock);
173 }
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179 static inline void si476x_core_unlock(struct si476x_core *core)
180 {
181 mutex_unlock(&core->cmd_lock);
182 }
183
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185
186 static inline u16 hz_to_si476x(struct si476x_core *core, int freq)
187 {
188 u16 result;
189
190 switch (core->power_up_parameters.func) {
191 default:
192 case SI476X_FUNC_FM_RECEIVER:
193 result = freq / 10000;
194 break;
195 case SI476X_FUNC_AM_RECEIVER:
196 result = freq / 1000;
197 break;
198 }
199
200 return result;
201 }
202
203 static inline int si476x_to_hz(struct si476x_core *core, u16 freq)
204 {
205 int result;
206
207 switch (core->power_up_parameters.func) {
208 default:
209 case SI476X_FUNC_FM_RECEIVER:
210 result = freq * 10000;
211 break;
212 case SI476X_FUNC_AM_RECEIVER:
213 result = freq * 1000;
214 break;
215 }
216
217 return result;
218 }
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223 static inline int hz_to_v4l2(int freq)
224 {
225 return (freq * 10) / 625;
226 }
227
228 static inline int v4l2_to_hz(int freq)
229 {
230 return (freq * 625) / 10;
231 }
232
233 static inline u16 v4l2_to_si476x(struct si476x_core *core, int freq)
234 {
235 return hz_to_si476x(core, v4l2_to_hz(freq));
236 }
237
238 static inline int si476x_to_v4l2(struct si476x_core *core, u16 freq)
239 {
240 return hz_to_v4l2(si476x_to_hz(core, freq));
241 }
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254 struct si476x_func_info {
255 struct {
256 u8 major, minor[2];
257 } firmware;
258 u16 patch_id;
259 enum si476x_func func;
260 };
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269 struct si476x_power_down_args {
270 bool xosc;
271 };
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285 enum si476x_tunemode {
286 SI476X_TM_VALIDATED_NORMAL_TUNE = 0,
287 SI476X_TM_INVALIDATED_FAST_TUNE = 1,
288 SI476X_TM_VALIDATED_AF_TUNE = 2,
289 SI476X_TM_VALIDATED_AF_CHECK = 3,
290 };
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300 enum si476x_smoothmetrics {
301 SI476X_SM_INITIALIZE_AUDIO = 0,
302 SI476X_SM_TRANSITION_AUDIO = 1,
303 };
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324 struct si476x_rds_status_report {
325 bool rdstpptyint, rdspiint, rdssyncint, rdsfifoint;
326 bool tpptyvalid, pivalid, rdssync, rdsfifolost;
327 bool tp;
328
329 u8 pty;
330 u16 pi;
331
332 u8 rdsfifoused;
333 u8 ble[4];
334
335 struct v4l2_rds_data rds[4];
336 };
337
338 struct si476x_rsq_status_args {
339 bool primary;
340 bool rsqack;
341 bool attune;
342 bool cancel;
343 bool stcack;
344 };
345
346 enum si476x_injside {
347 SI476X_INJSIDE_AUTO = 0,
348 SI476X_INJSIDE_LOW = 1,
349 SI476X_INJSIDE_HIGH = 2,
350 };
351
352 struct si476x_tune_freq_args {
353 bool zifsr;
354 bool hd;
355 enum si476x_injside injside;
356 int freq;
357 enum si476x_tunemode tunemode;
358 enum si476x_smoothmetrics smoothmetrics;
359 int antcap;
360 };
361
362 int si476x_core_stop(struct si476x_core *, bool);
363 int si476x_core_start(struct si476x_core *, bool);
364 int si476x_core_set_power_state(struct si476x_core *, enum si476x_power_state);
365 bool si476x_core_has_am(struct si476x_core *);
366 bool si476x_core_has_diversity(struct si476x_core *);
367 bool si476x_core_is_a_secondary_tuner(struct si476x_core *);
368 bool si476x_core_is_a_primary_tuner(struct si476x_core *);
369 bool si476x_core_is_in_am_receiver_mode(struct si476x_core *core);
370 bool si476x_core_is_powered_up(struct si476x_core *core);
371
372 enum si476x_i2c_type {
373 SI476X_I2C_SEND,
374 SI476X_I2C_RECV
375 };
376
377 int si476x_core_i2c_xfer(struct si476x_core *,
378 enum si476x_i2c_type,
379 char *, int);
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384 int si476x_core_cmd_func_info(struct si476x_core *, struct si476x_func_info *);
385 int si476x_core_cmd_set_property(struct si476x_core *, u16, u16);
386 int si476x_core_cmd_get_property(struct si476x_core *, u16);
387 int si476x_core_cmd_dig_audio_pin_cfg(struct si476x_core *,
388 enum si476x_dclk_config,
389 enum si476x_dfs_config,
390 enum si476x_dout_config,
391 enum si476x_xout_config);
392 int si476x_core_cmd_zif_pin_cfg(struct si476x_core *,
393 enum si476x_iqclk_config,
394 enum si476x_iqfs_config,
395 enum si476x_iout_config,
396 enum si476x_qout_config);
397 int si476x_core_cmd_ic_link_gpo_ctl_pin_cfg(struct si476x_core *,
398 enum si476x_icin_config,
399 enum si476x_icip_config,
400 enum si476x_icon_config,
401 enum si476x_icop_config);
402 int si476x_core_cmd_ana_audio_pin_cfg(struct si476x_core *,
403 enum si476x_lrout_config);
404 int si476x_core_cmd_intb_pin_cfg(struct si476x_core *, enum si476x_intb_config,
405 enum si476x_a1_config);
406 int si476x_core_cmd_fm_seek_start(struct si476x_core *, bool, bool);
407 int si476x_core_cmd_am_seek_start(struct si476x_core *, bool, bool);
408 int si476x_core_cmd_fm_rds_status(struct si476x_core *, bool, bool, bool,
409 struct si476x_rds_status_report *);
410 int si476x_core_cmd_fm_rds_blockcount(struct si476x_core *, bool,
411 struct si476x_rds_blockcount_report *);
412 int si476x_core_cmd_fm_tune_freq(struct si476x_core *,
413 struct si476x_tune_freq_args *);
414 int si476x_core_cmd_am_tune_freq(struct si476x_core *,
415 struct si476x_tune_freq_args *);
416 int si476x_core_cmd_am_rsq_status(struct si476x_core *,
417 struct si476x_rsq_status_args *,
418 struct si476x_rsq_status_report *);
419 int si476x_core_cmd_fm_rsq_status(struct si476x_core *,
420 struct si476x_rsq_status_args *,
421 struct si476x_rsq_status_report *);
422 int si476x_core_cmd_power_up(struct si476x_core *,
423 struct si476x_power_up_args *);
424 int si476x_core_cmd_power_down(struct si476x_core *,
425 struct si476x_power_down_args *);
426 int si476x_core_cmd_fm_phase_div_status(struct si476x_core *);
427 int si476x_core_cmd_fm_phase_diversity(struct si476x_core *,
428 enum si476x_phase_diversity_mode);
429
430 int si476x_core_cmd_fm_acf_status(struct si476x_core *,
431 struct si476x_acf_status_report *);
432 int si476x_core_cmd_am_acf_status(struct si476x_core *,
433 struct si476x_acf_status_report *);
434 int si476x_core_cmd_agc_status(struct si476x_core *,
435 struct si476x_agc_status_report *);
436
437 enum si476x_power_grid_type {
438 SI476X_POWER_GRID_50HZ = 0,
439 SI476X_POWER_GRID_60HZ,
440 };
441
442
443
444 enum si476x_interrupt_flags {
445 SI476X_STCIEN = (1 << 0),
446 SI476X_ACFIEN = (1 << 1),
447 SI476X_RDSIEN = (1 << 2),
448 SI476X_RSQIEN = (1 << 3),
449
450 SI476X_ERRIEN = (1 << 6),
451 SI476X_CTSIEN = (1 << 7),
452
453 SI476X_STCREP = (1 << 8),
454 SI476X_ACFREP = (1 << 9),
455 SI476X_RDSREP = (1 << 10),
456 SI476X_RSQREP = (1 << 11),
457 };
458
459 enum si476x_rdsint_sources {
460 SI476X_RDSTPPTY = (1 << 4),
461 SI476X_RDSPI = (1 << 3),
462 SI476X_RDSSYNC = (1 << 1),
463 SI476X_RDSRECV = (1 << 0),
464 };
465
466 enum si476x_status_response_bits {
467 SI476X_CTS = (1 << 7),
468 SI476X_ERR = (1 << 6),
469
470 SI476X_WB_ASQ_INT = (1 << 4),
471 SI476X_RSQ_INT = (1 << 3),
472
473 SI476X_FM_RDS_INT = (1 << 2),
474 SI476X_ACF_INT = (1 << 1),
475 SI476X_STC_INT = (1 << 0),
476 };
477
478
479
480 enum si476x_common_receiver_properties {
481 SI476X_PROP_INT_CTL_ENABLE = 0x0000,
482 SI476X_PROP_DIGITAL_IO_INPUT_SAMPLE_RATE = 0x0200,
483 SI476X_PROP_DIGITAL_IO_INPUT_FORMAT = 0x0201,
484 SI476X_PROP_DIGITAL_IO_OUTPUT_SAMPLE_RATE = 0x0202,
485 SI476X_PROP_DIGITAL_IO_OUTPUT_FORMAT = 0x0203,
486
487 SI476X_PROP_SEEK_BAND_BOTTOM = 0x1100,
488 SI476X_PROP_SEEK_BAND_TOP = 0x1101,
489 SI476X_PROP_SEEK_FREQUENCY_SPACING = 0x1102,
490
491 SI476X_PROP_VALID_MAX_TUNE_ERROR = 0x2000,
492 SI476X_PROP_VALID_SNR_THRESHOLD = 0x2003,
493 SI476X_PROP_VALID_RSSI_THRESHOLD = 0x2004,
494 };
495
496 enum si476x_am_receiver_properties {
497 SI476X_PROP_AUDIO_PWR_LINE_FILTER = 0x0303,
498 };
499
500 enum si476x_fm_receiver_properties {
501 SI476X_PROP_AUDIO_DEEMPHASIS = 0x0302,
502
503 SI476X_PROP_FM_RDS_INTERRUPT_SOURCE = 0x4000,
504 SI476X_PROP_FM_RDS_INTERRUPT_FIFO_COUNT = 0x4001,
505 SI476X_PROP_FM_RDS_CONFIG = 0x4002,
506 };
507
508 enum si476x_prop_audio_pwr_line_filter_bits {
509 SI476X_PROP_PWR_HARMONICS_MASK = 0x001f,
510 SI476X_PROP_PWR_GRID_MASK = 0x0100,
511 SI476X_PROP_PWR_ENABLE_MASK = 0x0200,
512 SI476X_PROP_PWR_GRID_50HZ = 0x0000,
513 SI476X_PROP_PWR_GRID_60HZ = 0x0100,
514 };
515
516 enum si476x_prop_fm_rds_config_bits {
517 SI476X_PROP_RDSEN_MASK = 0x1,
518 SI476X_PROP_RDSEN = 0x1,
519 };
520
521
522 struct regmap *devm_regmap_init_si476x(struct si476x_core *);
523
524 #endif