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6 #ifndef __LINUX_MFD_TC3589x_H
7 #define __LINUX_MFD_TC3589x_H
8
9 struct device;
10
11 enum tx3589x_block {
12 TC3589x_BLOCK_GPIO = 1 << 0,
13 TC3589x_BLOCK_KEYPAD = 1 << 1,
14 };
15
16 #define TC3589x_RSTCTRL_IRQRST (1 << 4)
17 #define TC3589x_RSTCTRL_TIMRST (1 << 3)
18 #define TC3589x_RSTCTRL_ROTRST (1 << 2)
19 #define TC3589x_RSTCTRL_KBDRST (1 << 1)
20 #define TC3589x_RSTCTRL_GPIRST (1 << 0)
21
22
23 #define TC3589x_KBDSETTLE_REG 0x01
24 #define TC3589x_KBDBOUNCE 0x02
25 #define TC3589x_KBDSIZE 0x03
26 #define TC3589x_KBCFG_LSB 0x04
27 #define TC3589x_KBCFG_MSB 0x05
28 #define TC3589x_KBDIC 0x08
29 #define TC3589x_KBDMSK 0x09
30 #define TC3589x_EVTCODE_FIFO 0x10
31 #define TC3589x_KBDMFS 0x8F
32
33 #define TC3589x_IRQST 0x91
34
35 #define TC3589x_MANFCODE_MAGIC 0x03
36 #define TC3589x_MANFCODE 0x80
37 #define TC3589x_VERSION 0x81
38 #define TC3589x_IOCFG 0xA7
39
40 #define TC3589x_CLKMODE 0x88
41 #define TC3589x_CLKCFG 0x89
42 #define TC3589x_CLKEN 0x8A
43
44 #define TC3589x_RSTCTRL 0x82
45 #define TC3589x_EXTRSTN 0x83
46 #define TC3589x_RSTINTCLR 0x84
47
48
49 #define TC3589x_IOCFG 0xA7
50 #define TC3589x_IOPULLCFG0_LSB 0xAA
51 #define TC3589x_IOPULLCFG0_MSB 0xAB
52 #define TC3589x_IOPULLCFG1_LSB 0xAC
53 #define TC3589x_IOPULLCFG1_MSB 0xAD
54 #define TC3589x_IOPULLCFG2_LSB 0xAE
55
56 #define TC3589x_GPIOIS0 0xC9
57 #define TC3589x_GPIOIS1 0xCA
58 #define TC3589x_GPIOIS2 0xCB
59 #define TC3589x_GPIOIBE0 0xCC
60 #define TC3589x_GPIOIBE1 0xCD
61 #define TC3589x_GPIOIBE2 0xCE
62 #define TC3589x_GPIOIEV0 0xCF
63 #define TC3589x_GPIOIEV1 0xD0
64 #define TC3589x_GPIOIEV2 0xD1
65 #define TC3589x_GPIOIE0 0xD2
66 #define TC3589x_GPIOIE1 0xD3
67 #define TC3589x_GPIOIE2 0xD4
68 #define TC3589x_GPIORIS0 0xD6
69 #define TC3589x_GPIORIS1 0xD7
70 #define TC3589x_GPIORIS2 0xD8
71 #define TC3589x_GPIOMIS0 0xD9
72 #define TC3589x_GPIOMIS1 0xDA
73 #define TC3589x_GPIOMIS2 0xDB
74 #define TC3589x_GPIOIC0 0xDC
75 #define TC3589x_GPIOIC1 0xDD
76 #define TC3589x_GPIOIC2 0xDE
77
78 #define TC3589x_GPIODATA0 0xC0
79 #define TC3589x_GPIOMASK0 0xc1
80 #define TC3589x_GPIODATA1 0xC2
81 #define TC3589x_GPIOMASK1 0xc3
82 #define TC3589x_GPIODATA2 0xC4
83 #define TC3589x_GPIOMASK2 0xC5
84
85 #define TC3589x_GPIODIR0 0xC6
86 #define TC3589x_GPIODIR1 0xC7
87 #define TC3589x_GPIODIR2 0xC8
88
89 #define TC3589x_GPIOSYNC0 0xE6
90 #define TC3589x_GPIOSYNC1 0xE7
91 #define TC3589x_GPIOSYNC2 0xE8
92
93 #define TC3589x_GPIOWAKE0 0xE9
94 #define TC3589x_GPIOWAKE1 0xEA
95 #define TC3589x_GPIOWAKE2 0xEB
96
97 #define TC3589x_GPIOODM0 0xE0
98 #define TC3589x_GPIOODE0 0xE1
99 #define TC3589x_GPIOODM1 0xE2
100 #define TC3589x_GPIOODE1 0xE3
101 #define TC3589x_GPIOODM2 0xE4
102 #define TC3589x_GPIOODE2 0xE5
103
104 #define TC3589x_INT_GPIIRQ 0
105 #define TC3589x_INT_TI0IRQ 1
106 #define TC3589x_INT_TI1IRQ 2
107 #define TC3589x_INT_TI2IRQ 3
108 #define TC3589x_INT_ROTIRQ 5
109 #define TC3589x_INT_KBDIRQ 6
110 #define TC3589x_INT_PORIRQ 7
111
112 #define TC3589x_NR_INTERNAL_IRQS 8
113
114 struct tc3589x {
115 struct mutex lock;
116 struct device *dev;
117 struct i2c_client *i2c;
118 struct irq_domain *domain;
119
120 int irq_base;
121 int num_gpio;
122 struct tc3589x_platform_data *pdata;
123 };
124
125 extern int tc3589x_reg_write(struct tc3589x *tc3589x, u8 reg, u8 data);
126 extern int tc3589x_reg_read(struct tc3589x *tc3589x, u8 reg);
127 extern int tc3589x_block_read(struct tc3589x *tc3589x, u8 reg, u8 length,
128 u8 *values);
129 extern int tc3589x_block_write(struct tc3589x *tc3589x, u8 reg, u8 length,
130 const u8 *values);
131 extern int tc3589x_set_bits(struct tc3589x *tc3589x, u8 reg, u8 mask, u8 val);
132
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135
136
137 #define TC_KPD_ROWS 0x8
138 #define TC_KPD_COLUMNS 0x8
139 #define TC_KPD_DEBOUNCE_PERIOD 0xA3
140 #define TC_KPD_SETTLE_TIME 0xA3
141
142
143
144
145
146
147 struct tc3589x_platform_data {
148 unsigned int block;
149 };
150
151 #endif