1
2
3
4
5
6
7
8
9 #ifndef __LINUX_MFD_PCF50633_MBC_H
10 #define __LINUX_MFD_PCF50633_MBC_H
11
12 #include <linux/mfd/pcf50633/core.h>
13 #include <linux/platform_device.h>
14
15 #define PCF50633_REG_MBCC1 0x43
16 #define PCF50633_REG_MBCC2 0x44
17 #define PCF50633_REG_MBCC3 0x45
18 #define PCF50633_REG_MBCC4 0x46
19 #define PCF50633_REG_MBCC5 0x47
20 #define PCF50633_REG_MBCC6 0x48
21 #define PCF50633_REG_MBCC7 0x49
22 #define PCF50633_REG_MBCC8 0x4a
23 #define PCF50633_REG_MBCS1 0x4b
24 #define PCF50633_REG_MBCS2 0x4c
25 #define PCF50633_REG_MBCS3 0x4d
26
27 enum pcf50633_reg_mbcc1 {
28 PCF50633_MBCC1_CHGENA = 0x01,
29 PCF50633_MBCC1_AUTOSTOP = 0x02,
30 PCF50633_MBCC1_AUTORES = 0x04,
31 PCF50633_MBCC1_RESUME = 0x08,
32 PCF50633_MBCC1_RESTART = 0x10,
33 PCF50633_MBCC1_PREWDTIME_60M = 0x20,
34 PCF50633_MBCC1_WDTIME_1H = 0x00,
35 PCF50633_MBCC1_WDTIME_2H = 0x40,
36 PCF50633_MBCC1_WDTIME_4H = 0x80,
37 PCF50633_MBCC1_WDTIME_6H = 0xc0,
38 };
39 #define PCF50633_MBCC1_WDTIME_MASK 0xc0
40
41 enum pcf50633_reg_mbcc2 {
42 PCF50633_MBCC2_VBATCOND_2V7 = 0x00,
43 PCF50633_MBCC2_VBATCOND_2V85 = 0x01,
44 PCF50633_MBCC2_VBATCOND_3V0 = 0x02,
45 PCF50633_MBCC2_VBATCOND_3V15 = 0x03,
46 PCF50633_MBCC2_VMAX_4V = 0x00,
47 PCF50633_MBCC2_VMAX_4V20 = 0x28,
48 PCF50633_MBCC2_VRESDEBTIME_64S = 0x80,
49 };
50
51 enum pcf50633_reg_mbcc7 {
52 PCF50633_MBCC7_USB_100mA = 0x00,
53 PCF50633_MBCC7_USB_500mA = 0x01,
54 PCF50633_MBCC7_USB_1000mA = 0x02,
55 PCF50633_MBCC7_USB_SUSPEND = 0x03,
56 PCF50633_MBCC7_BATTEMP_EN = 0x04,
57 PCF50633_MBCC7_BATSYSIMAX_1A6 = 0x00,
58 PCF50633_MBCC7_BATSYSIMAX_1A8 = 0x40,
59 PCF50633_MBCC7_BATSYSIMAX_2A0 = 0x80,
60 PCF50633_MBCC7_BATSYSIMAX_2A2 = 0xc0,
61 };
62 #define PCF50633_MBCC7_USB_MASK 0x03
63
64 enum pcf50633_reg_mbcc8 {
65 PCF50633_MBCC8_USBENASUS = 0x10,
66 };
67
68 enum pcf50633_reg_mbcs1 {
69 PCF50633_MBCS1_USBPRES = 0x01,
70 PCF50633_MBCS1_USBOK = 0x02,
71 PCF50633_MBCS1_ADAPTPRES = 0x04,
72 PCF50633_MBCS1_ADAPTOK = 0x08,
73 PCF50633_MBCS1_TBAT_OK = 0x00,
74 PCF50633_MBCS1_TBAT_ABOVE = 0x10,
75 PCF50633_MBCS1_TBAT_BELOW = 0x20,
76 PCF50633_MBCS1_TBAT_UNDEF = 0x30,
77 PCF50633_MBCS1_PREWDTEXP = 0x40,
78 PCF50633_MBCS1_WDTEXP = 0x80,
79 };
80
81 enum pcf50633_reg_mbcs2_mbcmod {
82 PCF50633_MBCS2_MBC_PLAY = 0x00,
83 PCF50633_MBCS2_MBC_USB_PRE = 0x01,
84 PCF50633_MBCS2_MBC_USB_PRE_WAIT = 0x02,
85 PCF50633_MBCS2_MBC_USB_FAST = 0x03,
86 PCF50633_MBCS2_MBC_USB_FAST_WAIT = 0x04,
87 PCF50633_MBCS2_MBC_USB_SUSPEND = 0x05,
88 PCF50633_MBCS2_MBC_ADP_PRE = 0x06,
89 PCF50633_MBCS2_MBC_ADP_PRE_WAIT = 0x07,
90 PCF50633_MBCS2_MBC_ADP_FAST = 0x08,
91 PCF50633_MBCS2_MBC_ADP_FAST_WAIT = 0x09,
92 PCF50633_MBCS2_MBC_BAT_FULL = 0x0a,
93 PCF50633_MBCS2_MBC_HALT = 0x0b,
94 };
95 #define PCF50633_MBCS2_MBC_MASK 0x0f
96 enum pcf50633_reg_mbcs2_chgstat {
97 PCF50633_MBCS2_CHGS_NONE = 0x00,
98 PCF50633_MBCS2_CHGS_ADAPTER = 0x10,
99 PCF50633_MBCS2_CHGS_USB = 0x20,
100 PCF50633_MBCS2_CHGS_BOTH = 0x30,
101 };
102 #define PCF50633_MBCS2_RESSTAT_AUTO 0x40
103
104 enum pcf50633_reg_mbcs3 {
105 PCF50633_MBCS3_USBLIM_PLAY = 0x01,
106 PCF50633_MBCS3_USBLIM_CGH = 0x02,
107 PCF50633_MBCS3_TLIM_PLAY = 0x04,
108 PCF50633_MBCS3_TLIM_CHG = 0x08,
109 PCF50633_MBCS3_ILIM = 0x10,
110 PCF50633_MBCS3_VLIM = 0x20,
111 PCF50633_MBCS3_VBATSTAT = 0x40,
112 PCF50633_MBCS3_VRES = 0x80,
113 };
114
115 #define PCF50633_MBCC2_VBATCOND_MASK 0x03
116 #define PCF50633_MBCC2_VMAX_MASK 0x3c
117
118
119 #define PCF50633_MBC_USB_ONLINE 0x01
120 #define PCF50633_MBC_USB_ACTIVE 0x02
121 #define PCF50633_MBC_ADAPTER_ONLINE 0x04
122 #define PCF50633_MBC_ADAPTER_ACTIVE 0x08
123
124 int pcf50633_mbc_usb_curlim_set(struct pcf50633 *pcf, int ma);
125
126 int pcf50633_mbc_get_status(struct pcf50633 *);
127 int pcf50633_mbc_get_usb_online_status(struct pcf50633 *);
128
129 #endif
130