root/include/linux/mfd/lp873x.h

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INCLUDED FROM

   1 /*
   2  * Functions to access LP873X power management chip.
   3  *
   4  * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License as
   8  * published by the Free Software Foundation version 2.
   9  *
  10  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  11  * kind, whether express or implied; without even the implied warranty
  12  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  */
  15 
  16 #ifndef __LINUX_MFD_LP873X_H
  17 #define __LINUX_MFD_LP873X_H
  18 
  19 #include <linux/i2c.h>
  20 #include <linux/regulator/driver.h>
  21 #include <linux/regulator/machine.h>
  22 
  23 /* LP873x chip id list */
  24 #define LP873X                  0x00
  25 
  26 /* All register addresses */
  27 #define LP873X_REG_DEV_REV              0X00
  28 #define LP873X_REG_OTP_REV              0X01
  29 #define LP873X_REG_BUCK0_CTRL_1         0X02
  30 #define LP873X_REG_BUCK0_CTRL_2         0X03
  31 #define LP873X_REG_BUCK1_CTRL_1         0X04
  32 #define LP873X_REG_BUCK1_CTRL_2         0X05
  33 #define LP873X_REG_BUCK0_VOUT           0X06
  34 #define LP873X_REG_BUCK1_VOUT           0X07
  35 #define LP873X_REG_LDO0_CTRL            0X08
  36 #define LP873X_REG_LDO1_CTRL            0X09
  37 #define LP873X_REG_LDO0_VOUT            0X0A
  38 #define LP873X_REG_LDO1_VOUT            0X0B
  39 #define LP873X_REG_BUCK0_DELAY          0X0C
  40 #define LP873X_REG_BUCK1_DELAY          0X0D
  41 #define LP873X_REG_LDO0_DELAY           0X0E
  42 #define LP873X_REG_LDO1_DELAY           0X0F
  43 #define LP873X_REG_GPO_DELAY            0X10
  44 #define LP873X_REG_GPO2_DELAY           0X11
  45 #define LP873X_REG_GPO_CTRL             0X12
  46 #define LP873X_REG_CONFIG               0X13
  47 #define LP873X_REG_PLL_CTRL             0X14
  48 #define LP873X_REG_PGOOD_CTRL1          0X15
  49 #define LP873X_REG_PGOOD_CTRL2          0X16
  50 #define LP873X_REG_PG_FAULT             0X17
  51 #define LP873X_REG_RESET                0X18
  52 #define LP873X_REG_INT_TOP_1            0X19
  53 #define LP873X_REG_INT_TOP_2            0X1A
  54 #define LP873X_REG_INT_BUCK             0X1B
  55 #define LP873X_REG_INT_LDO              0X1C
  56 #define LP873X_REG_TOP_STAT             0X1D
  57 #define LP873X_REG_BUCK_STAT            0X1E
  58 #define LP873X_REG_LDO_STAT             0x1F
  59 #define LP873X_REG_TOP_MASK_1           0x20
  60 #define LP873X_REG_TOP_MASK_2           0x21
  61 #define LP873X_REG_BUCK_MASK            0x22
  62 #define LP873X_REG_LDO_MASK             0x23
  63 #define LP873X_REG_SEL_I_LOAD           0x24
  64 #define LP873X_REG_I_LOAD_2             0x25
  65 #define LP873X_REG_I_LOAD_1             0x26
  66 
  67 #define LP873X_REG_MAX                  LP873X_REG_I_LOAD_1
  68 
  69 /* Register field definitions */
  70 #define LP873X_DEV_REV_DEV_ID                   0xC0
  71 #define LP873X_DEV_REV_ALL_LAYER                0x30
  72 #define LP873X_DEV_REV_METAL_LAYER              0x0F
  73 
  74 #define LP873X_OTP_REV_OTP_ID                   0xFF
  75 
  76 #define LP873X_BUCK0_CTRL_1_BUCK0_FPWM          BIT(3)
  77 #define LP873X_BUCK0_CTRL_1_BUCK0_RDIS_EN       BIT(2)
  78 #define LP873X_BUCK0_CTRL_1_BUCK0_EN_PIN_CTRL   BIT(1)
  79 #define LP873X_BUCK0_CTRL_1_BUCK0_EN            BIT(0)
  80 
  81 #define LP873X_BUCK0_CTRL_2_BUCK0_ILIM          0x38
  82 #define LP873X_BUCK0_CTRL_2_BUCK0_SLEW_RATE     0x07
  83 
  84 #define LP873X_BUCK1_CTRL_1_BUCK1_FPWM          BIT(3)
  85 #define LP873X_BUCK1_CTRL_1_BUCK1_RDIS_EN       BIT(2)
  86 #define LP873X_BUCK1_CTRL_1_BUCK1_EN_PIN_CTRL   BIT(1)
  87 #define LP873X_BUCK1_CTRL_1_BUCK1_EN            BIT(0)
  88 
  89 #define LP873X_BUCK1_CTRL_2_BUCK1_ILIM          0x38
  90 #define LP873X_BUCK1_CTRL_2_BUCK1_SLEW_RATE     0x07
  91 
  92 #define LP873X_BUCK0_VOUT_BUCK0_VSET            0xFF
  93 
  94 #define LP873X_BUCK1_VOUT_BUCK1_VSET            0xFF
  95 
  96 #define LP873X_LDO0_CTRL_LDO0_RDIS_EN           BIT(2)
  97 #define LP873X_LDO0_CTRL_LDO0_EN_PIN_CTRL       BIT(1)
  98 #define LP873X_LDO0_CTRL_LDO0_EN                BIT(0)
  99 
 100 #define LP873X_LDO1_CTRL_LDO1_RDIS_EN           BIT(2)
 101 #define LP873X_LDO1_CTRL_LDO1_EN_PIN_CTRL       BIT(1)
 102 #define LP873X_LDO1_CTRL_LDO1_EN                BIT(0)
 103 
 104 #define LP873X_LDO0_VOUT_LDO0_VSET              0x1F
 105 
 106 #define LP873X_LDO1_VOUT_LDO1_VSET              0x1F
 107 
 108 #define LP873X_BUCK0_DELAY_BUCK0_SD_DELAY       0xF0
 109 #define LP873X_BUCK0_DELAY_BUCK0_SU_DELAY       0x0F
 110 
 111 #define LP873X_BUCK1_DELAY_BUCK1_SD_DELAY       0xF0
 112 #define LP873X_BUCK1_DELAY_BUCK1_SU_DELAY       0x0F
 113 
 114 #define LP873X_LDO0_DELAY_LDO0_SD_DELAY 0xF0
 115 #define LP873X_LDO0_DELAY_LDO0_SU_DELAY 0x0F
 116 
 117 #define LP873X_LDO1_DELAY_LDO1_SD_DELAY 0xF0
 118 #define LP873X_LDO1_DELAY_LDO1_SU_DELAY 0x0F
 119 
 120 #define LP873X_GPO_DELAY_GPO_SD_DELAY           0xF0
 121 #define LP873X_GPO_DELAY_GPO_SU_DELAY           0x0F
 122 
 123 #define LP873X_GPO2_DELAY_GPO2_SD_DELAY 0xF0
 124 #define LP873X_GPO2_DELAY_GPO2_SU_DELAY 0x0F
 125 
 126 #define LP873X_GPO_CTRL_GPO2_OD         BIT(6)
 127 #define LP873X_GPO_CTRL_GPO2_EN_PIN_CTRL        BIT(5)
 128 #define LP873X_GPO_CTRL_GPO2_EN         BIT(4)
 129 #define LP873X_GPO_CTRL_GPO_OD                  BIT(2)
 130 #define LP873X_GPO_CTRL_GPO_EN_PIN_CTRL BIT(1)
 131 #define LP873X_GPO_CTRL_GPO_EN                  BIT(0)
 132 
 133 #define LP873X_CONFIG_SU_DELAY_SEL              BIT(6)
 134 #define LP873X_CONFIG_SD_DELAY_SEL              BIT(5)
 135 #define LP873X_CONFIG_CLKIN_PIN_SEL             BIT(4)
 136 #define LP873X_CONFIG_CLKIN_PD                  BIT(3)
 137 #define LP873X_CONFIG_EN_PD                     BIT(2)
 138 #define LP873X_CONFIG_TDIE_WARN_LEVEL           BIT(1)
 139 #define LP873X_EN_SPREAD_SPEC                   BIT(0)
 140 
 141 #define LP873X_PLL_CTRL_EN_PLL                  BIT(6)
 142 #define LP873X_EXT_CLK_FREQ                     0x1F
 143 
 144 #define LP873X_PGOOD_CTRL1_PGOOD_POL            BIT(7)
 145 #define LP873X_PGOOD_CTRL1_PGOOD_OD             BIT(6)
 146 #define LP873X_PGOOD_CTRL1_PGOOD_WINDOW_LDO     BIT(5)
 147 #define LP873X_PGOOD_CTRL1_PGOOD_WINDOWN_BUCK   BIT(4)
 148 #define LP873X_PGOOD_CTRL1_PGOOD_EN_PGOOD_LDO1  BIT(3)
 149 #define LP873X_PGOOD_CTRL1_PGOOD_EN_PGOOD_LDO0  BIT(2)
 150 #define LP873X_PGOOD_CTRL1_PGOOD_EN_PGOOD_BUCK1 BIT(1)
 151 #define LP873X_PGOOD_CTRL1_PGOOD_EN_PGOOD_BUCK0 BIT(0)
 152 
 153 #define LP873X_PGOOD_CTRL2_EN_PGOOD_TWARN       BIT(2)
 154 #define LP873X_PGOOD_CTRL2_EN_PG_FAULT_GATE     BIT(1)
 155 #define LP873X_PGOOD_CTRL2_PGOOD_MODE           BIT(0)
 156 
 157 #define LP873X_PG_FAULT_PG_FAULT_LDO1           BIT(3)
 158 #define LP873X_PG_FAULT_PG_FAULT_LDO0           BIT(2)
 159 #define LP873X_PG_FAULT_PG_FAULT_BUCK1          BIT(1)
 160 #define LP873X_PG_FAULT_PG_FAULT_BUCK0          BIT(0)
 161 
 162 #define LP873X_RESET_SW_RESET                   BIT(0)
 163 
 164 #define LP873X_INT_TOP_1_PGOOD_INT              BIT(7)
 165 #define LP873X_INT_TOP_1_LDO_INT                BIT(6)
 166 #define LP873X_INT_TOP_1_BUCK_INT               BIT(5)
 167 #define LP873X_INT_TOP_1_SYNC_CLK_INT           BIT(4)
 168 #define LP873X_INT_TOP_1_TDIE_SD_INT            BIT(3)
 169 #define LP873X_INT_TOP_1_TDIE_WARN_INT          BIT(2)
 170 #define LP873X_INT_TOP_1_OVP_INT                BIT(1)
 171 #define LP873X_INT_TOP_1_I_MEAS_INT             BIT(0)
 172 
 173 #define LP873X_INT_TOP_2_RESET_REG_INT          BIT(0)
 174 
 175 #define LP873X_INT_BUCK_BUCK1_PG_INT            BIT(6)
 176 #define LP873X_INT_BUCK_BUCK1_SC_INT            BIT(5)
 177 #define LP873X_INT_BUCK_BUCK1_ILIM_INT          BIT(4)
 178 #define LP873X_INT_BUCK_BUCK0_PG_INT            BIT(2)
 179 #define LP873X_INT_BUCK_BUCK0_SC_INT            BIT(1)
 180 #define LP873X_INT_BUCK_BUCK0_ILIM_INT          BIT(0)
 181 
 182 #define LP873X_INT_LDO_LDO1_PG_INT              BIT(6)
 183 #define LP873X_INT_LDO_LDO1_SC_INT              BIT(5)
 184 #define LP873X_INT_LDO_LDO1_ILIM_INT            BIT(4)
 185 #define LP873X_INT_LDO_LDO0_PG_INT              BIT(2)
 186 #define LP873X_INT_LDO_LDO0_SC_INT              BIT(1)
 187 #define LP873X_INT_LDO_LDO0_ILIM_INT            BIT(0)
 188 
 189 #define LP873X_TOP_STAT_PGOOD_STAT              BIT(7)
 190 #define LP873X_TOP_STAT_SYNC_CLK_STAT           BIT(4)
 191 #define LP873X_TOP_STAT_TDIE_SD_STAT            BIT(3)
 192 #define LP873X_TOP_STAT_TDIE_WARN_STAT          BIT(2)
 193 #define LP873X_TOP_STAT_OVP_STAT                BIT(1)
 194 
 195 #define LP873X_BUCK_STAT_BUCK1_STAT             BIT(7)
 196 #define LP873X_BUCK_STAT_BUCK1_PG_STAT          BIT(6)
 197 #define LP873X_BUCK_STAT_BUCK1_ILIM_STAT        BIT(4)
 198 #define LP873X_BUCK_STAT_BUCK0_STAT             BIT(3)
 199 #define LP873X_BUCK_STAT_BUCK0_PG_STAT          BIT(2)
 200 #define LP873X_BUCK_STAT_BUCK0_ILIM_STAT        BIT(0)
 201 
 202 #define LP873X_LDO_STAT_LDO1_STAT               BIT(7)
 203 #define LP873X_LDO_STAT_LDO1_PG_STAT            BIT(6)
 204 #define LP873X_LDO_STAT_LDO1_ILIM_STAT          BIT(4)
 205 #define LP873X_LDO_STAT_LDO0_STAT               BIT(3)
 206 #define LP873X_LDO_STAT_LDO0_PG_STAT            BIT(2)
 207 #define LP873X_LDO_STAT_LDO0_ILIM_STAT          BIT(0)
 208 
 209 #define LP873X_TOP_MASK_1_PGOOD_INT_MASK        BIT(7)
 210 #define LP873X_TOP_MASK_1_SYNC_CLK_MASK BIT(4)
 211 #define LP873X_TOP_MASK_1_TDIE_WARN_MASK        BIT(2)
 212 #define LP873X_TOP_MASK_1_I_MEAS_MASK           BIT(0)
 213 
 214 #define LP873X_TOP_MASK_2_RESET_REG_MASK        BIT(0)
 215 
 216 #define LP873X_BUCK_MASK_BUCK1_PGF_MASK BIT(7)
 217 #define LP873X_BUCK_MASK_BUCK1_PGR_MASK BIT(6)
 218 #define LP873X_BUCK_MASK_BUCK1_ILIM_MASK        BIT(4)
 219 #define LP873X_BUCK_MASK_BUCK0_PGF_MASK BIT(3)
 220 #define LP873X_BUCK_MASK_BUCK0_PGR_MASK BIT(2)
 221 #define LP873X_BUCK_MASK_BUCK0_ILIM_MASK        BIT(0)
 222 
 223 #define LP873X_LDO_MASK_LDO1_PGF_MASK           BIT(7)
 224 #define LP873X_LDO_MASK_LDO1_PGR_MASK           BIT(6)
 225 #define LP873X_LDO_MASK_LDO1_ILIM_MASK          BIT(4)
 226 #define LP873X_LDO_MASK_LDO0_PGF_MASK           BIT(3)
 227 #define LP873X_LDO_MASK_LDO0_PGR_MASK           BIT(2)
 228 #define LP873X_LDO_MASK_LDO0_ILIM_MASK          BIT(0)
 229 
 230 #define LP873X_SEL_I_LOAD_CURRENT_BUCK_SELECT   BIT(0)
 231 
 232 #define LP873X_I_LOAD_2_BUCK_LOAD_CURRENT       BIT(0)
 233 
 234 #define LP873X_I_LOAD_1_BUCK_LOAD_CURRENT       0xFF
 235 
 236 #define LP873X_MAX_REG_ID               LP873X_LDO_1
 237 
 238 /* Number of step-down converters available */
 239 #define LP873X_NUM_BUCK         2
 240 /* Number of LDO voltage regulators available */
 241 #define LP873X_NUM_LDO          2
 242 /* Number of total regulators available */
 243 #define LP873X_NUM_REGULATOR            (LP873X_NUM_BUCK + LP873X_NUM_LDO)
 244 
 245 enum lp873x_regulator_id {
 246         /* BUCK's */
 247         LP873X_BUCK_0,
 248         LP873X_BUCK_1,
 249         /* LDOs */
 250         LP873X_LDO_0,
 251         LP873X_LDO_1,
 252 };
 253 
 254 /**
 255  * struct lp873x - state holder for the lp873x driver
 256  * @dev: struct device pointer for MFD device
 257  * @rev: revision of the lp873x
 258  * @lock: lock guarding the data structure
 259  * @regmap: register map of the lp873x PMIC
 260  *
 261  * Device data may be used to access the LP873X chip
 262  */
 263 struct lp873x {
 264         struct device *dev;
 265         u8 rev;
 266         struct regmap *regmap;
 267 };
 268 #endif /* __LINUX_MFD_LP873X_H */
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