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35 #ifndef __PWM_OMAP_DMTIMER_PDATA_H
36 #define __PWM_OMAP_DMTIMER_PDATA_H
37
38
39 #define PWM_OMAP_DMTIMER_SRC_SYS_CLK 0x00
40 #define PWM_OMAP_DMTIMER_SRC_32_KHZ 0x01
41 #define PWM_OMAP_DMTIMER_SRC_EXT_CLK 0x02
42
43
44 #define PWM_OMAP_DMTIMER_INT_CAPTURE (1 << 2)
45 #define PWM_OMAP_DMTIMER_INT_OVERFLOW (1 << 1)
46 #define PWM_OMAP_DMTIMER_INT_MATCH (1 << 0)
47
48
49 #define PWM_OMAP_DMTIMER_TRIGGER_NONE 0x00
50 #define PWM_OMAP_DMTIMER_TRIGGER_OVERFLOW 0x01
51 #define PWM_OMAP_DMTIMER_TRIGGER_OVERFLOW_AND_COMPARE 0x02
52
53 struct omap_dm_timer;
54 typedef struct omap_dm_timer pwm_omap_dmtimer;
55
56 struct pwm_omap_dmtimer_pdata {
57 pwm_omap_dmtimer *(*request_by_node)(struct device_node *np);
58 pwm_omap_dmtimer *(*request_specific)(int timer_id);
59 pwm_omap_dmtimer *(*request)(void);
60
61 int (*free)(pwm_omap_dmtimer *timer);
62
63 void (*enable)(pwm_omap_dmtimer *timer);
64 void (*disable)(pwm_omap_dmtimer *timer);
65
66 int (*get_irq)(pwm_omap_dmtimer *timer);
67 int (*set_int_enable)(pwm_omap_dmtimer *timer, unsigned int value);
68 int (*set_int_disable)(pwm_omap_dmtimer *timer, u32 mask);
69
70 struct clk *(*get_fclk)(pwm_omap_dmtimer *timer);
71
72 int (*start)(pwm_omap_dmtimer *timer);
73 int (*stop)(pwm_omap_dmtimer *timer);
74 int (*set_source)(pwm_omap_dmtimer *timer, int source);
75
76 int (*set_load)(pwm_omap_dmtimer *timer, int autoreload,
77 unsigned int value);
78 int (*set_match)(pwm_omap_dmtimer *timer, int enable,
79 unsigned int match);
80 int (*set_pwm)(pwm_omap_dmtimer *timer, int def_on,
81 int toggle, int trigger);
82 int (*set_prescaler)(pwm_omap_dmtimer *timer, int prescaler);
83
84 unsigned int (*read_counter)(pwm_omap_dmtimer *timer);
85 int (*write_counter)(pwm_omap_dmtimer *timer, unsigned int value);
86 unsigned int (*read_status)(pwm_omap_dmtimer *timer);
87 int (*write_status)(pwm_omap_dmtimer *timer, unsigned int value);
88 };
89
90 #endif