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5 #ifndef __LINUX_PLATFORM_DATA_AD5755_H__
6 #define __LINUX_PLATFORM_DATA_AD5755_H__
7
8 enum ad5755_mode {
9 AD5755_MODE_VOLTAGE_0V_5V = 0,
10 AD5755_MODE_VOLTAGE_0V_10V = 1,
11 AD5755_MODE_VOLTAGE_PLUSMINUS_5V = 2,
12 AD5755_MODE_VOLTAGE_PLUSMINUS_10V = 3,
13 AD5755_MODE_CURRENT_4mA_20mA = 4,
14 AD5755_MODE_CURRENT_0mA_20mA = 5,
15 AD5755_MODE_CURRENT_0mA_24mA = 6,
16 };
17
18 enum ad5755_dc_dc_phase {
19 AD5755_DC_DC_PHASE_ALL_SAME_EDGE = 0,
20 AD5755_DC_DC_PHASE_A_B_SAME_EDGE_C_D_OPP_EDGE = 1,
21 AD5755_DC_DC_PHASE_A_C_SAME_EDGE_B_D_OPP_EDGE = 2,
22 AD5755_DC_DC_PHASE_90_DEGREE = 3,
23 };
24
25 enum ad5755_dc_dc_freq {
26 AD5755_DC_DC_FREQ_250kHZ = 0,
27 AD5755_DC_DC_FREQ_410kHZ = 1,
28 AD5755_DC_DC_FREQ_650kHZ = 2,
29 };
30
31 enum ad5755_dc_dc_maxv {
32 AD5755_DC_DC_MAXV_23V = 0,
33 AD5755_DC_DC_MAXV_24V5 = 1,
34 AD5755_DC_DC_MAXV_27V = 2,
35 AD5755_DC_DC_MAXV_29V5 = 3,
36 };
37
38 enum ad5755_slew_rate {
39 AD5755_SLEW_RATE_64k = 0,
40 AD5755_SLEW_RATE_32k = 1,
41 AD5755_SLEW_RATE_16k = 2,
42 AD5755_SLEW_RATE_8k = 3,
43 AD5755_SLEW_RATE_4k = 4,
44 AD5755_SLEW_RATE_2k = 5,
45 AD5755_SLEW_RATE_1k = 6,
46 AD5755_SLEW_RATE_500 = 7,
47 AD5755_SLEW_RATE_250 = 8,
48 AD5755_SLEW_RATE_125 = 9,
49 AD5755_SLEW_RATE_64 = 10,
50 AD5755_SLEW_RATE_32 = 11,
51 AD5755_SLEW_RATE_16 = 12,
52 AD5755_SLEW_RATE_8 = 13,
53 AD5755_SLEW_RATE_4 = 14,
54 AD5755_SLEW_RATE_0_5 = 15,
55 };
56
57 enum ad5755_slew_step_size {
58 AD5755_SLEW_STEP_SIZE_1 = 0,
59 AD5755_SLEW_STEP_SIZE_2 = 1,
60 AD5755_SLEW_STEP_SIZE_4 = 2,
61 AD5755_SLEW_STEP_SIZE_8 = 3,
62 AD5755_SLEW_STEP_SIZE_16 = 4,
63 AD5755_SLEW_STEP_SIZE_32 = 5,
64 AD5755_SLEW_STEP_SIZE_64 = 6,
65 AD5755_SLEW_STEP_SIZE_128 = 7,
66 AD5755_SLEW_STEP_SIZE_256 = 8,
67 };
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84 struct ad5755_platform_data {
85 bool ext_dc_dc_compenstation_resistor;
86 enum ad5755_dc_dc_phase dc_dc_phase;
87 enum ad5755_dc_dc_freq dc_dc_freq;
88 enum ad5755_dc_dc_maxv dc_dc_maxv;
89
90 struct {
91 enum ad5755_mode mode;
92 bool ext_current_sense_resistor;
93 bool enable_voltage_overrange;
94 struct {
95 bool enable;
96 enum ad5755_slew_rate rate;
97 enum ad5755_slew_step_size step_size;
98 } slew;
99 } dac[4];
100 };
101
102 #endif