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7 #ifndef AT_HDMAC_H
8 #define AT_HDMAC_H
9
10 #include <linux/dmaengine.h>
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17 struct at_dma_platform_data {
18 unsigned int nr_channels;
19 dma_cap_mask_t cap_mask;
20 };
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26
27 struct at_dma_slave {
28 struct device *dma_dev;
29 u32 cfg;
30 };
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33
34 #define ATC_PER_MSB(h) ((0x30U & (h)) >> 4)
35
36 #define ATC_SRC_PER(h) (0xFU & (h))
37 #define ATC_DST_PER(h) ((0xFU & (h)) << 4)
38 #define ATC_SRC_REP (0x1 << 8)
39 #define ATC_SRC_H2SEL (0x1 << 9)
40 #define ATC_SRC_H2SEL_SW (0x0 << 9)
41 #define ATC_SRC_H2SEL_HW (0x1 << 9)
42 #define ATC_SRC_PER_MSB(h) (ATC_PER_MSB(h) << 10)
43 #define ATC_DST_REP (0x1 << 12)
44 #define ATC_DST_H2SEL (0x1 << 13)
45 #define ATC_DST_H2SEL_SW (0x0 << 13)
46 #define ATC_DST_H2SEL_HW (0x1 << 13)
47 #define ATC_DST_PER_MSB(h) (ATC_PER_MSB(h) << 14)
48 #define ATC_SOD (0x1 << 16)
49 #define ATC_LOCK_IF (0x1 << 20)
50 #define ATC_LOCK_B (0x1 << 21)
51 #define ATC_LOCK_IF_L (0x1 << 22)
52 #define ATC_LOCK_IF_L_CHUNK (0x0 << 22)
53 #define ATC_LOCK_IF_L_BUFFER (0x1 << 22)
54 #define ATC_AHB_PROT_MASK (0x7 << 24)
55 #define ATC_FIFOCFG_MASK (0x3 << 28)
56 #define ATC_FIFOCFG_LARGESTBURST (0x0 << 28)
57 #define ATC_FIFOCFG_HALFFIFO (0x1 << 28)
58 #define ATC_FIFOCFG_ENOUGHSPACE (0x2 << 28)
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60
61 #endif