This source file includes following definitions.
- amd_iommu_detect
- amd_iommu_register_ga_log_notifier
- amd_iommu_update_ga
- amd_iommu_activate_guest_mode
- amd_iommu_deactivate_guest_mode
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8 #ifndef _ASM_X86_AMD_IOMMU_H
9 #define _ASM_X86_AMD_IOMMU_H
10
11 #include <linux/types.h>
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18 struct amd_iommu_pi_data {
19 u32 ga_tag;
20 u32 prev_ga_tag;
21 u64 base;
22 bool is_guest_mode;
23 struct vcpu_data *vcpu_data;
24 void *ir_data;
25 };
26
27 #ifdef CONFIG_AMD_IOMMU
28
29 struct task_struct;
30 struct pci_dev;
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32 extern int amd_iommu_detect(void);
33 extern int amd_iommu_init_hardware(void);
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48 #define AMD_PRI_DEV_ERRATUM_ENABLE_RESET 0
49 #define AMD_PRI_DEV_ERRATUM_LIMIT_REQ_ONE 1
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51 extern void amd_iommu_enable_device_erratum(struct pci_dev *pdev, u32 erratum);
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62 extern int amd_iommu_init_device(struct pci_dev *pdev, int pasids);
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69 extern void amd_iommu_free_device(struct pci_dev *pdev);
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79 extern int amd_iommu_bind_pasid(struct pci_dev *pdev, int pasid,
80 struct task_struct *task);
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91 extern void amd_iommu_unbind_pasid(struct pci_dev *pdev, int pasid);
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112 #define AMD_IOMMU_INV_PRI_RSP_SUCCESS 0
113 #define AMD_IOMMU_INV_PRI_RSP_INVALID 1
114 #define AMD_IOMMU_INV_PRI_RSP_FAIL 2
115
116 typedef int (*amd_iommu_invalid_ppr_cb)(struct pci_dev *pdev,
117 int pasid,
118 unsigned long address,
119 u16);
120
121 extern int amd_iommu_set_invalid_ppr_cb(struct pci_dev *pdev,
122 amd_iommu_invalid_ppr_cb cb);
123
124 #define PPR_FAULT_EXEC (1 << 1)
125 #define PPR_FAULT_READ (1 << 2)
126 #define PPR_FAULT_WRITE (1 << 5)
127 #define PPR_FAULT_USER (1 << 6)
128 #define PPR_FAULT_RSVD (1 << 7)
129 #define PPR_FAULT_GN (1 << 8)
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141 #define AMD_IOMMU_DEVICE_FLAG_ATS_SUP 0x1
142 #define AMD_IOMMU_DEVICE_FLAG_PRI_SUP 0x2
143 #define AMD_IOMMU_DEVICE_FLAG_PASID_SUP 0x4
144 #define AMD_IOMMU_DEVICE_FLAG_EXEC_SUP 0x8
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146 #define AMD_IOMMU_DEVICE_FLAG_PRIV_SUP 0x10
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149 struct amd_iommu_device_info {
150 int max_pasids;
151 u32 flags;
152 };
153
154 extern int amd_iommu_device_info(struct pci_dev *pdev,
155 struct amd_iommu_device_info *info);
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169 typedef void (*amd_iommu_invalidate_ctx)(struct pci_dev *pdev, int pasid);
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171 extern int amd_iommu_set_invalidate_ctx_cb(struct pci_dev *pdev,
172 amd_iommu_invalidate_ctx cb);
173 #else
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175 static inline int amd_iommu_detect(void) { return -ENODEV; }
176
177 #endif
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179 #if defined(CONFIG_AMD_IOMMU) && defined(CONFIG_IRQ_REMAP)
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182 extern int amd_iommu_register_ga_log_notifier(int (*notifier)(u32));
183
184 extern int
185 amd_iommu_update_ga(int cpu, bool is_run, void *data);
186
187 extern int amd_iommu_activate_guest_mode(void *data);
188 extern int amd_iommu_deactivate_guest_mode(void *data);
189
190 #else
191
192 static inline int
193 amd_iommu_register_ga_log_notifier(int (*notifier)(u32))
194 {
195 return 0;
196 }
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198 static inline int
199 amd_iommu_update_ga(int cpu, bool is_run, void *data)
200 {
201 return 0;
202 }
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204 static inline int amd_iommu_activate_guest_mode(void *data)
205 {
206 return 0;
207 }
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209 static inline int amd_iommu_deactivate_guest_mode(void *data)
210 {
211 return 0;
212 }
213 #endif
214
215 #endif