This source file includes following definitions.
- phy_modes
- mdiobus_alloc
- devm_mdiobus_alloc
- phy_is_started
- phy_read
- __phy_read
- phy_write
- __phy_write
- __phy_set_bits
- __phy_clear_bits
- phy_set_bits
- phy_clear_bits
- __phy_set_bits_mmd
- __phy_clear_bits_mmd
- phy_set_bits_mmd
- phy_clear_bits_mmd
- phy_interrupt_is_valid
- phy_polling_mode
- phy_is_internal
- phy_interface_mode_is_rgmii
- phy_interface_mode_is_8023z
- phy_interface_is_rgmii
- phy_is_pseudo_fixed_link
- get_phy_device
- phy_device_register
- phy_device_free
- phy_device_reset
- phydev_name
- phy_attached_print
- genphy_no_soft_reset
- genphy_no_ack_interrupt
- genphy_no_config_intr
- phy_read_status
- phy_ethtool_get_strings
- phy_ethtool_get_sset_count
- phy_ethtool_get_stats
- mdiobus_register_board_info
1
2
3
4
5
6
7
8
9
10
11 #ifndef __PHY_H
12 #define __PHY_H
13
14 #include <linux/compiler.h>
15 #include <linux/spinlock.h>
16 #include <linux/ethtool.h>
17 #include <linux/linkmode.h>
18 #include <linux/mdio.h>
19 #include <linux/mii.h>
20 #include <linux/module.h>
21 #include <linux/timer.h>
22 #include <linux/workqueue.h>
23 #include <linux/mod_devicetable.h>
24
25 #include <linux/atomic.h>
26
27 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
28 SUPPORTED_TP | \
29 SUPPORTED_MII)
30
31 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
32 SUPPORTED_10baseT_Full)
33
34 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
35 SUPPORTED_100baseT_Full)
36
37 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
38 SUPPORTED_1000baseT_Full)
39
40 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init;
41 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init;
42 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init;
43 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init;
44 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init;
45 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init;
46 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init;
47 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init;
48
49 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features)
50 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features)
51 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features)
52 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features)
53 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features)
54 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features)
55 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features)
56 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features)
57
58 extern const int phy_basic_ports_array[3];
59 extern const int phy_fibre_port_array[1];
60 extern const int phy_all_ports_features_array[7];
61 extern const int phy_10_100_features_array[4];
62 extern const int phy_basic_t1_features_array[2];
63 extern const int phy_gbit_features_array[2];
64 extern const int phy_10gbit_features_array[1];
65
66
67
68
69
70
71 #define PHY_POLL -1
72 #define PHY_IGNORE_INTERRUPT -2
73
74 #define PHY_IS_INTERNAL 0x00000001
75 #define PHY_RST_AFTER_CLK_EN 0x00000002
76 #define MDIO_DEVICE_IS_PHY 0x80000000
77
78
79 typedef enum {
80 PHY_INTERFACE_MODE_NA,
81 PHY_INTERFACE_MODE_INTERNAL,
82 PHY_INTERFACE_MODE_MII,
83 PHY_INTERFACE_MODE_GMII,
84 PHY_INTERFACE_MODE_SGMII,
85 PHY_INTERFACE_MODE_TBI,
86 PHY_INTERFACE_MODE_REVMII,
87 PHY_INTERFACE_MODE_RMII,
88 PHY_INTERFACE_MODE_RGMII,
89 PHY_INTERFACE_MODE_RGMII_ID,
90 PHY_INTERFACE_MODE_RGMII_RXID,
91 PHY_INTERFACE_MODE_RGMII_TXID,
92 PHY_INTERFACE_MODE_RTBI,
93 PHY_INTERFACE_MODE_SMII,
94 PHY_INTERFACE_MODE_XGMII,
95 PHY_INTERFACE_MODE_MOCA,
96 PHY_INTERFACE_MODE_QSGMII,
97 PHY_INTERFACE_MODE_TRGMII,
98 PHY_INTERFACE_MODE_1000BASEX,
99 PHY_INTERFACE_MODE_2500BASEX,
100 PHY_INTERFACE_MODE_RXAUI,
101 PHY_INTERFACE_MODE_XAUI,
102
103 PHY_INTERFACE_MODE_10GKR,
104 PHY_INTERFACE_MODE_USXGMII,
105 PHY_INTERFACE_MODE_MAX,
106 } phy_interface_t;
107
108
109
110
111
112
113
114
115
116
117
118
119 unsigned int phy_supported_speeds(struct phy_device *phy,
120 unsigned int *speeds,
121 unsigned int size);
122
123
124
125
126
127
128
129
130
131 static inline const char *phy_modes(phy_interface_t interface)
132 {
133 switch (interface) {
134 case PHY_INTERFACE_MODE_NA:
135 return "";
136 case PHY_INTERFACE_MODE_INTERNAL:
137 return "internal";
138 case PHY_INTERFACE_MODE_MII:
139 return "mii";
140 case PHY_INTERFACE_MODE_GMII:
141 return "gmii";
142 case PHY_INTERFACE_MODE_SGMII:
143 return "sgmii";
144 case PHY_INTERFACE_MODE_TBI:
145 return "tbi";
146 case PHY_INTERFACE_MODE_REVMII:
147 return "rev-mii";
148 case PHY_INTERFACE_MODE_RMII:
149 return "rmii";
150 case PHY_INTERFACE_MODE_RGMII:
151 return "rgmii";
152 case PHY_INTERFACE_MODE_RGMII_ID:
153 return "rgmii-id";
154 case PHY_INTERFACE_MODE_RGMII_RXID:
155 return "rgmii-rxid";
156 case PHY_INTERFACE_MODE_RGMII_TXID:
157 return "rgmii-txid";
158 case PHY_INTERFACE_MODE_RTBI:
159 return "rtbi";
160 case PHY_INTERFACE_MODE_SMII:
161 return "smii";
162 case PHY_INTERFACE_MODE_XGMII:
163 return "xgmii";
164 case PHY_INTERFACE_MODE_MOCA:
165 return "moca";
166 case PHY_INTERFACE_MODE_QSGMII:
167 return "qsgmii";
168 case PHY_INTERFACE_MODE_TRGMII:
169 return "trgmii";
170 case PHY_INTERFACE_MODE_1000BASEX:
171 return "1000base-x";
172 case PHY_INTERFACE_MODE_2500BASEX:
173 return "2500base-x";
174 case PHY_INTERFACE_MODE_RXAUI:
175 return "rxaui";
176 case PHY_INTERFACE_MODE_XAUI:
177 return "xaui";
178 case PHY_INTERFACE_MODE_10GKR:
179 return "10gbase-kr";
180 case PHY_INTERFACE_MODE_USXGMII:
181 return "usxgmii";
182 default:
183 return "unknown";
184 }
185 }
186
187
188 #define PHY_INIT_TIMEOUT 100000
189 #define PHY_FORCE_TIMEOUT 10
190
191 #define PHY_MAX_ADDR 32
192
193
194 #define PHY_ID_FMT "%s:%02x"
195
196 #define MII_BUS_ID_SIZE 61
197
198
199
200 #define MII_ADDR_C45 (1<<30)
201 #define MII_DEVADDR_C45_SHIFT 16
202 #define MII_REGADDR_C45_MASK GENMASK(15, 0)
203
204 struct device;
205 struct phylink;
206 struct sk_buff;
207
208
209
210
211
212 struct mii_bus {
213 struct module *owner;
214 const char *name;
215 char id[MII_BUS_ID_SIZE];
216 void *priv;
217 int (*read)(struct mii_bus *bus, int addr, int regnum);
218 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
219 int (*reset)(struct mii_bus *bus);
220
221
222
223
224
225 struct mutex mdio_lock;
226
227 struct device *parent;
228 enum {
229 MDIOBUS_ALLOCATED = 1,
230 MDIOBUS_REGISTERED,
231 MDIOBUS_UNREGISTERED,
232 MDIOBUS_RELEASED,
233 } state;
234 struct device dev;
235
236
237 struct mdio_device *mdio_map[PHY_MAX_ADDR];
238
239
240 u32 phy_mask;
241
242
243 u32 phy_ignore_ta_mask;
244
245
246
247
248
249 int irq[PHY_MAX_ADDR];
250
251
252 int reset_delay_us;
253
254 struct gpio_desc *reset_gpiod;
255 };
256 #define to_mii_bus(d) container_of(d, struct mii_bus, dev)
257
258 struct mii_bus *mdiobus_alloc_size(size_t);
259 static inline struct mii_bus *mdiobus_alloc(void)
260 {
261 return mdiobus_alloc_size(0);
262 }
263
264 int __mdiobus_register(struct mii_bus *bus, struct module *owner);
265 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
266 void mdiobus_unregister(struct mii_bus *bus);
267 void mdiobus_free(struct mii_bus *bus);
268 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
269 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
270 {
271 return devm_mdiobus_alloc_size(dev, 0);
272 }
273
274 void devm_mdiobus_free(struct device *dev, struct mii_bus *bus);
275 struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr);
276
277 #define PHY_INTERRUPT_DISABLED false
278 #define PHY_INTERRUPT_ENABLED true
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309 enum phy_state {
310 PHY_DOWN = 0,
311 PHY_READY,
312 PHY_HALTED,
313 PHY_UP,
314 PHY_RUNNING,
315 PHY_NOLINK,
316 };
317
318
319
320
321
322
323 struct phy_c45_device_ids {
324 u32 devices_in_package;
325 u32 device_ids[8];
326 };
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360 struct phy_device {
361 struct mdio_device mdio;
362
363
364
365 struct phy_driver *drv;
366
367 u32 phy_id;
368
369 struct phy_c45_device_ids c45_ids;
370 unsigned is_c45:1;
371 unsigned is_internal:1;
372 unsigned is_pseudo_fixed_link:1;
373 unsigned is_gigabit_capable:1;
374 unsigned has_fixups:1;
375 unsigned suspended:1;
376 unsigned suspended_by_mdio_bus:1;
377 unsigned sysfs_links:1;
378 unsigned loopback_enabled:1;
379
380 unsigned autoneg:1;
381
382 unsigned link:1;
383 unsigned autoneg_complete:1;
384
385
386 unsigned interrupts:1;
387
388 enum phy_state state;
389
390 u32 dev_flags;
391
392 phy_interface_t interface;
393
394
395
396
397
398 int speed;
399 int duplex;
400 int pause;
401 int asym_pause;
402
403
404
405 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
406 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);
407 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising);
408
409 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old);
410
411
412 u32 eee_broken_modes;
413
414 #ifdef CONFIG_LED_TRIGGER_PHY
415 struct phy_led_trigger *phy_led_triggers;
416 unsigned int phy_num_led_triggers;
417 struct phy_led_trigger *last_triggered;
418
419 struct phy_led_trigger *led_link_trigger;
420 #endif
421
422
423
424
425
426 int irq;
427
428
429
430 void *priv;
431
432
433 struct delayed_work state_queue;
434
435 struct mutex lock;
436
437 struct phylink *phylink;
438 struct net_device *attached_dev;
439
440 u8 mdix;
441 u8 mdix_ctrl;
442
443 void (*phy_link_change)(struct phy_device *, bool up, bool do_carrier);
444 void (*adjust_link)(struct net_device *dev);
445 };
446 #define to_phy_device(d) container_of(to_mdio_device(d), \
447 struct phy_device, mdio)
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470 struct phy_driver {
471 struct mdio_driver_common mdiodrv;
472 u32 phy_id;
473 char *name;
474 u32 phy_id_mask;
475 const unsigned long * const features;
476 u32 flags;
477 const void *driver_data;
478
479
480
481
482 int (*soft_reset)(struct phy_device *phydev);
483
484
485
486
487
488 int (*config_init)(struct phy_device *phydev);
489
490
491
492
493
494 int (*probe)(struct phy_device *phydev);
495
496
497
498
499
500 int (*get_features)(struct phy_device *phydev);
501
502
503 int (*suspend)(struct phy_device *phydev);
504 int (*resume)(struct phy_device *phydev);
505
506
507
508
509
510
511
512 int (*config_aneg)(struct phy_device *phydev);
513
514
515 int (*aneg_done)(struct phy_device *phydev);
516
517
518 int (*read_status)(struct phy_device *phydev);
519
520
521 int (*ack_interrupt)(struct phy_device *phydev);
522
523
524 int (*config_intr)(struct phy_device *phydev);
525
526
527
528
529
530
531 int (*did_interrupt)(struct phy_device *phydev);
532
533
534 int (*handle_interrupt)(struct phy_device *phydev);
535
536
537 void (*remove)(struct phy_device *phydev);
538
539
540
541
542
543 int (*match_phy_device)(struct phy_device *phydev);
544
545
546 int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti);
547
548
549 int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr);
550
551
552
553
554
555
556
557
558 bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
559
560
561
562
563
564
565
566 void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
567
568
569
570
571 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
572
573
574 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
575
576
577
578
579
580
581
582
583 void (*link_change_notify)(struct phy_device *dev);
584
585
586
587
588
589
590
591
592
593
594 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);
595
596
597
598
599
600
601
602
603
604
605
606 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
607 u16 val);
608
609 int (*read_page)(struct phy_device *dev);
610 int (*write_page)(struct phy_device *dev, int page);
611
612
613
614 int (*module_info)(struct phy_device *dev,
615 struct ethtool_modinfo *modinfo);
616
617
618 int (*module_eeprom)(struct phy_device *dev,
619 struct ethtool_eeprom *ee, u8 *data);
620
621
622 int (*get_sset_count)(struct phy_device *dev);
623 void (*get_strings)(struct phy_device *dev, u8 *data);
624 void (*get_stats)(struct phy_device *dev,
625 struct ethtool_stats *stats, u64 *data);
626
627
628 int (*get_tunable)(struct phy_device *dev,
629 struct ethtool_tunable *tuna, void *data);
630 int (*set_tunable)(struct phy_device *dev,
631 struct ethtool_tunable *tuna,
632 const void *data);
633 int (*set_loopback)(struct phy_device *dev, bool enable);
634 };
635 #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \
636 struct phy_driver, mdiodrv)
637
638 #define PHY_ANY_ID "MATCH ANY PHY"
639 #define PHY_ANY_UID 0xffffffff
640
641 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0)
642 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4)
643 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10)
644
645
646 struct phy_fixup {
647 struct list_head list;
648 char bus_id[MII_BUS_ID_SIZE + 3];
649 u32 phy_uid;
650 u32 phy_uid_mask;
651 int (*run)(struct phy_device *phydev);
652 };
653
654 const char *phy_speed_to_str(int speed);
655 const char *phy_duplex_to_str(unsigned int duplex);
656
657
658
659
660 struct phy_setting {
661 u32 speed;
662 u8 duplex;
663 u8 bit;
664 };
665
666 const struct phy_setting *
667 phy_lookup_setting(int speed, int duplex, const unsigned long *mask,
668 bool exact);
669 size_t phy_speeds(unsigned int *speeds, size_t size,
670 unsigned long *mask);
671 void of_set_phy_supported(struct phy_device *phydev);
672 void of_set_phy_eee_broken(struct phy_device *phydev);
673 int phy_speed_down_core(struct phy_device *phydev);
674
675
676
677
678
679 static inline bool phy_is_started(struct phy_device *phydev)
680 {
681 return phydev->state >= PHY_UP;
682 }
683
684 void phy_resolve_aneg_pause(struct phy_device *phydev);
685 void phy_resolve_aneg_linkmode(struct phy_device *phydev);
686
687
688
689
690
691
692
693
694
695
696 static inline int phy_read(struct phy_device *phydev, u32 regnum)
697 {
698 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
699 }
700
701
702
703
704
705
706
707
708 static inline int __phy_read(struct phy_device *phydev, u32 regnum)
709 {
710 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
711 }
712
713
714
715
716
717
718
719
720
721
722
723 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
724 {
725 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
726 }
727
728
729
730
731
732
733
734
735
736 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val)
737 {
738 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum,
739 val);
740 }
741
742
743
744
745
746
747
748
749
750
751 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
752
753
754
755
756
757
758
759
760
761
762 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
763
764
765
766
767
768
769
770
771
772
773
774 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
775
776
777
778
779
780
781
782
783
784
785
786 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
787
788 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
789 u16 set);
790 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
791 u16 set);
792 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
793 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
794
795 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
796 u16 mask, u16 set);
797 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
798 u16 mask, u16 set);
799 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
800 u16 mask, u16 set);
801 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
802 u16 mask, u16 set);
803
804
805
806
807
808
809
810
811
812 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
813 {
814 return __phy_modify(phydev, regnum, 0, val);
815 }
816
817
818
819
820
821
822
823
824
825 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum,
826 u16 val)
827 {
828 return __phy_modify(phydev, regnum, val, 0);
829 }
830
831
832
833
834
835
836
837 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
838 {
839 return phy_modify(phydev, regnum, 0, val);
840 }
841
842
843
844
845
846
847
848 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val)
849 {
850 return phy_modify(phydev, regnum, val, 0);
851 }
852
853
854
855
856
857
858
859
860
861
862
863 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad,
864 u32 regnum, u16 val)
865 {
866 return __phy_modify_mmd(phydev, devad, regnum, 0, val);
867 }
868
869
870
871
872
873
874
875
876
877
878
879 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad,
880 u32 regnum, u16 val)
881 {
882 return __phy_modify_mmd(phydev, devad, regnum, val, 0);
883 }
884
885
886
887
888
889
890
891
892
893 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad,
894 u32 regnum, u16 val)
895 {
896 return phy_modify_mmd(phydev, devad, regnum, 0, val);
897 }
898
899
900
901
902
903
904
905
906
907 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
908 u32 regnum, u16 val)
909 {
910 return phy_modify_mmd(phydev, devad, regnum, val, 0);
911 }
912
913
914
915
916
917
918
919
920 static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
921 {
922 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT;
923 }
924
925
926
927
928
929
930 static inline bool phy_polling_mode(struct phy_device *phydev)
931 {
932 return phydev->irq == PHY_POLL;
933 }
934
935
936
937
938
939 static inline bool phy_is_internal(struct phy_device *phydev)
940 {
941 return phydev->is_internal;
942 }
943
944
945
946
947
948
949 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
950 {
951 return mode >= PHY_INTERFACE_MODE_RGMII &&
952 mode <= PHY_INTERFACE_MODE_RGMII_TXID;
953 };
954
955
956
957
958
959
960
961
962
963 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode)
964 {
965 return mode == PHY_INTERFACE_MODE_1000BASEX ||
966 mode == PHY_INTERFACE_MODE_2500BASEX;
967 }
968
969
970
971
972
973
974 static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
975 {
976 return phy_interface_mode_is_rgmii(phydev->interface);
977 };
978
979
980
981
982
983
984 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
985 {
986 return phydev->is_pseudo_fixed_link;
987 }
988
989 int phy_save_page(struct phy_device *phydev);
990 int phy_select_page(struct phy_device *phydev, int page);
991 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret);
992 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum);
993 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val);
994 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum,
995 u16 mask, u16 set);
996 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
997 u16 mask, u16 set);
998
999 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id,
1000 bool is_c45,
1001 struct phy_c45_device_ids *c45_ids);
1002 #if IS_ENABLED(CONFIG_PHYLIB)
1003 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
1004 int phy_device_register(struct phy_device *phy);
1005 void phy_device_free(struct phy_device *phydev);
1006 #else
1007 static inline
1008 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
1009 {
1010 return NULL;
1011 }
1012
1013 static inline int phy_device_register(struct phy_device *phy)
1014 {
1015 return 0;
1016 }
1017
1018 static inline void phy_device_free(struct phy_device *phydev) { }
1019 #endif
1020 void phy_device_remove(struct phy_device *phydev);
1021 int phy_init_hw(struct phy_device *phydev);
1022 int phy_suspend(struct phy_device *phydev);
1023 int phy_resume(struct phy_device *phydev);
1024 int __phy_resume(struct phy_device *phydev);
1025 int phy_loopback(struct phy_device *phydev, bool enable);
1026 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
1027 phy_interface_t interface);
1028 struct phy_device *phy_find_first(struct mii_bus *bus);
1029 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
1030 u32 flags, phy_interface_t interface);
1031 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
1032 void (*handler)(struct net_device *),
1033 phy_interface_t interface);
1034 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
1035 void (*handler)(struct net_device *),
1036 phy_interface_t interface);
1037 void phy_disconnect(struct phy_device *phydev);
1038 void phy_detach(struct phy_device *phydev);
1039 void phy_start(struct phy_device *phydev);
1040 void phy_stop(struct phy_device *phydev);
1041 int phy_start_aneg(struct phy_device *phydev);
1042 int phy_aneg_done(struct phy_device *phydev);
1043 int phy_speed_down(struct phy_device *phydev, bool sync);
1044 int phy_speed_up(struct phy_device *phydev);
1045
1046 int phy_restart_aneg(struct phy_device *phydev);
1047 int phy_reset_after_clk_enable(struct phy_device *phydev);
1048
1049 static inline void phy_device_reset(struct phy_device *phydev, int value)
1050 {
1051 mdio_device_reset(&phydev->mdio, value);
1052 }
1053
1054 #define phydev_err(_phydev, format, args...) \
1055 dev_err(&_phydev->mdio.dev, format, ##args)
1056
1057 #define phydev_info(_phydev, format, args...) \
1058 dev_info(&_phydev->mdio.dev, format, ##args)
1059
1060 #define phydev_warn(_phydev, format, args...) \
1061 dev_warn(&_phydev->mdio.dev, format, ##args)
1062
1063 #define phydev_dbg(_phydev, format, args...) \
1064 dev_dbg(&_phydev->mdio.dev, format, ##args)
1065
1066 static inline const char *phydev_name(const struct phy_device *phydev)
1067 {
1068 return dev_name(&phydev->mdio.dev);
1069 }
1070
1071 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
1072 __printf(2, 3);
1073 void phy_attached_info(struct phy_device *phydev);
1074
1075
1076 int genphy_read_abilities(struct phy_device *phydev);
1077 int genphy_setup_forced(struct phy_device *phydev);
1078 int genphy_restart_aneg(struct phy_device *phydev);
1079 int genphy_config_eee_advert(struct phy_device *phydev);
1080 int __genphy_config_aneg(struct phy_device *phydev, bool changed);
1081 int genphy_aneg_done(struct phy_device *phydev);
1082 int genphy_update_link(struct phy_device *phydev);
1083 int genphy_read_lpa(struct phy_device *phydev);
1084 int genphy_read_status(struct phy_device *phydev);
1085 int genphy_suspend(struct phy_device *phydev);
1086 int genphy_resume(struct phy_device *phydev);
1087 int genphy_loopback(struct phy_device *phydev, bool enable);
1088 int genphy_soft_reset(struct phy_device *phydev);
1089
1090 static inline int genphy_config_aneg(struct phy_device *phydev)
1091 {
1092 return __genphy_config_aneg(phydev, false);
1093 }
1094
1095 static inline int genphy_no_soft_reset(struct phy_device *phydev)
1096 {
1097 return 0;
1098 }
1099 static inline int genphy_no_ack_interrupt(struct phy_device *phydev)
1100 {
1101 return 0;
1102 }
1103 static inline int genphy_no_config_intr(struct phy_device *phydev)
1104 {
1105 return 0;
1106 }
1107 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad,
1108 u16 regnum);
1109 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum,
1110 u16 regnum, u16 val);
1111
1112
1113 int genphy_c45_restart_aneg(struct phy_device *phydev);
1114 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart);
1115 int genphy_c45_aneg_done(struct phy_device *phydev);
1116 int genphy_c45_read_link(struct phy_device *phydev);
1117 int genphy_c45_read_lpa(struct phy_device *phydev);
1118 int genphy_c45_read_pma(struct phy_device *phydev);
1119 int genphy_c45_pma_setup_forced(struct phy_device *phydev);
1120 int genphy_c45_an_config_aneg(struct phy_device *phydev);
1121 int genphy_c45_an_disable_aneg(struct phy_device *phydev);
1122 int genphy_c45_read_mdix(struct phy_device *phydev);
1123 int genphy_c45_pma_read_abilities(struct phy_device *phydev);
1124 int genphy_c45_read_status(struct phy_device *phydev);
1125 int genphy_c45_config_aneg(struct phy_device *phydev);
1126
1127
1128 int gen10g_config_aneg(struct phy_device *phydev);
1129
1130 static inline int phy_read_status(struct phy_device *phydev)
1131 {
1132 if (!phydev->drv)
1133 return -EIO;
1134
1135 if (phydev->drv->read_status)
1136 return phydev->drv->read_status(phydev);
1137 else
1138 return genphy_read_status(phydev);
1139 }
1140
1141 void phy_driver_unregister(struct phy_driver *drv);
1142 void phy_drivers_unregister(struct phy_driver *drv, int n);
1143 int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
1144 int phy_drivers_register(struct phy_driver *new_driver, int n,
1145 struct module *owner);
1146 void phy_state_machine(struct work_struct *work);
1147 void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies);
1148 void phy_mac_interrupt(struct phy_device *phydev);
1149 void phy_start_machine(struct phy_device *phydev);
1150 void phy_stop_machine(struct phy_device *phydev);
1151 int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd);
1152 void phy_ethtool_ksettings_get(struct phy_device *phydev,
1153 struct ethtool_link_ksettings *cmd);
1154 int phy_ethtool_ksettings_set(struct phy_device *phydev,
1155 const struct ethtool_link_ksettings *cmd);
1156 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
1157 void phy_request_interrupt(struct phy_device *phydev);
1158 void phy_free_interrupt(struct phy_device *phydev);
1159 void phy_print_status(struct phy_device *phydev);
1160 int phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
1161 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode);
1162 void phy_advertise_supported(struct phy_device *phydev);
1163 void phy_support_sym_pause(struct phy_device *phydev);
1164 void phy_support_asym_pause(struct phy_device *phydev);
1165 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx,
1166 bool autoneg);
1167 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx);
1168 bool phy_validate_pause(struct phy_device *phydev,
1169 struct ethtool_pauseparam *pp);
1170
1171 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
1172 int (*run)(struct phy_device *));
1173 int phy_register_fixup_for_id(const char *bus_id,
1174 int (*run)(struct phy_device *));
1175 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
1176 int (*run)(struct phy_device *));
1177
1178 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
1179 int phy_unregister_fixup_for_id(const char *bus_id);
1180 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
1181
1182 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
1183 int phy_get_eee_err(struct phy_device *phydev);
1184 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
1185 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
1186 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
1187 void phy_ethtool_get_wol(struct phy_device *phydev,
1188 struct ethtool_wolinfo *wol);
1189 int phy_ethtool_get_link_ksettings(struct net_device *ndev,
1190 struct ethtool_link_ksettings *cmd);
1191 int phy_ethtool_set_link_ksettings(struct net_device *ndev,
1192 const struct ethtool_link_ksettings *cmd);
1193 int phy_ethtool_nway_reset(struct net_device *ndev);
1194
1195 #if IS_ENABLED(CONFIG_PHYLIB)
1196 int __init mdio_bus_init(void);
1197 void mdio_bus_exit(void);
1198 #endif
1199
1200
1201 static inline int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data)
1202 {
1203 if (!phydev->drv)
1204 return -EIO;
1205
1206 mutex_lock(&phydev->lock);
1207 phydev->drv->get_strings(phydev, data);
1208 mutex_unlock(&phydev->lock);
1209
1210 return 0;
1211 }
1212
1213 static inline int phy_ethtool_get_sset_count(struct phy_device *phydev)
1214 {
1215 int ret;
1216
1217 if (!phydev->drv)
1218 return -EIO;
1219
1220 if (phydev->drv->get_sset_count &&
1221 phydev->drv->get_strings &&
1222 phydev->drv->get_stats) {
1223 mutex_lock(&phydev->lock);
1224 ret = phydev->drv->get_sset_count(phydev);
1225 mutex_unlock(&phydev->lock);
1226
1227 return ret;
1228 }
1229
1230 return -EOPNOTSUPP;
1231 }
1232
1233 static inline int phy_ethtool_get_stats(struct phy_device *phydev,
1234 struct ethtool_stats *stats, u64 *data)
1235 {
1236 if (!phydev->drv)
1237 return -EIO;
1238
1239 mutex_lock(&phydev->lock);
1240 phydev->drv->get_stats(phydev, stats, data);
1241 mutex_unlock(&phydev->lock);
1242
1243 return 0;
1244 }
1245
1246 extern struct bus_type mdio_bus_type;
1247
1248 struct mdio_board_info {
1249 const char *bus_id;
1250 char modalias[MDIO_NAME_SIZE];
1251 int mdio_addr;
1252 const void *platform_data;
1253 };
1254
1255 #if IS_ENABLED(CONFIG_MDIO_DEVICE)
1256 int mdiobus_register_board_info(const struct mdio_board_info *info,
1257 unsigned int n);
1258 #else
1259 static inline int mdiobus_register_board_info(const struct mdio_board_info *i,
1260 unsigned int n)
1261 {
1262 return 0;
1263 }
1264 #endif
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275 #define phy_module_driver(__phy_drivers, __count) \
1276 static int __init phy_module_init(void) \
1277 { \
1278 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
1279 } \
1280 module_init(phy_module_init); \
1281 static void __exit phy_module_exit(void) \
1282 { \
1283 phy_drivers_unregister(__phy_drivers, __count); \
1284 } \
1285 module_exit(phy_module_exit)
1286
1287 #define module_phy_driver(__phy_drivers) \
1288 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
1289
1290 bool phy_driver_is_genphy(struct phy_device *phydev);
1291 bool phy_driver_is_genphy_10g(struct phy_device *phydev);
1292
1293 #endif