root/include/linux/iio/adc/ad_sigma_delta.h

INCLUDED FROM

DEFINITIONS

1. ad_sigma_delta_set_channel
2. ad_sigma_delta_set_mode
3. ad_sigma_delta_postprocess_sample

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * Support code for Analog Devices Sigma-Delta ADCs
   4  *
   5  * Copyright 2012 Analog Devices Inc.
   6  *  Author: Lars-Peter Clausen <lars@metafoo.de>
   7  */
   8 #ifndef __AD_SIGMA_DELTA_H__
   9 #define __AD_SIGMA_DELTA_H__
  10 
  11 enum ad_sigma_delta_mode {
  12         AD_SD_MODE_CONTINUOUS = 0,
  13         AD_SD_MODE_SINGLE = 1,
  14         AD_SD_MODE_IDLE = 2,
  15         AD_SD_MODE_POWERDOWN = 3,
  16 };
  17 
  18 /**
  19  * struct ad_sigma_delta_calib_data - Calibration data for Sigma Delta devices
  20  * @mode: Calibration mode.
  21  * @channel: Calibration channel.
  22  */
  23 struct ad_sd_calib_data {
  24         unsigned int mode;
  25         unsigned int channel;
  26 };
  27 
  28 struct ad_sigma_delta;
  29 struct iio_dev;
  30 
  31 /**
  32  * struct ad_sigma_delta_info - Sigma Delta driver specific callbacks and options
  33  * @set_channel: Will be called to select the current channel, may be NULL.
  34  * @set_mode: Will be called to select the current mode, may be NULL.
  35  * @postprocess_sample: Is called for each sampled data word, can be used to
  36  *              modify or drop the sample data, it, may be NULL.
  37  * @has_registers: true if the device has writable and readable registers, false
  38  *              if there is just one read-only sample data shift register.
  39  * @addr_shift: Shift of the register address in the communications register.
  40  * @read_mask: Mask for the communications register having the read bit set.
  41  * @data_reg: Address of the data register, if 0 the default address of 0x3 will
  42  *   be used.
  43  */
  44 struct ad_sigma_delta_info {
  45         int (*set_channel)(struct ad_sigma_delta *, unsigned int channel);
  46         int (*set_mode)(struct ad_sigma_delta *, enum ad_sigma_delta_mode mode);
  47         int (*postprocess_sample)(struct ad_sigma_delta *, unsigned int raw_sample);
  48         bool has_registers;
  49         unsigned int addr_shift;
  50         unsigned int read_mask;
  51         unsigned int data_reg;
  52 };
  53 
  54 /**
  55  * struct ad_sigma_delta - Sigma Delta device struct
  56  * @spi: The spi device associated with the Sigma Delta device.
  57  * @trig: The IIO trigger associated with the Sigma Delta device.
  58  *
  59  * Most of the fields are private to the sigma delta library code and should not
  60  * be accessed by individual drivers.
  61  */
  62 struct ad_sigma_delta {
  63         struct spi_device       *spi;
  64         struct iio_trigger      *trig;
  65 
  66 /* private: */
  67         struct completion       completion;
  68         bool                    irq_dis;
  69 
  70         bool                    bus_locked;
  71         bool                    keep_cs_asserted;
  72 
  73         uint8_t                 comm;
  74 
  75         const struct ad_sigma_delta_info *info;
  76 
  77         /*
  78          * DMA (thus cache coherency maintenance) requires the
  79          * transfer buffers to live in their own cache lines.
  80          */
  81         uint8_t                         data[4] ____cacheline_aligned;
  82 };
  83 
  84 static inline int ad_sigma_delta_set_channel(struct ad_sigma_delta *sd,
  85         unsigned int channel)
  86 {
  87         if (sd->info->set_channel)
  88                 return sd->info->set_channel(sd, channel);
  89 
  90         return 0;
  91 }
  92 
  93 static inline int ad_sigma_delta_set_mode(struct ad_sigma_delta *sd,
  94         unsigned int mode)
  95 {
  96         if (sd->info->set_mode)
  97                 return sd->info->set_mode(sd, mode);
  98 
  99         return 0;
 100 }
 101 
 102 static inline int ad_sigma_delta_postprocess_sample(struct ad_sigma_delta *sd,
 103         unsigned int raw_sample)
 104 {
 105         if (sd->info->postprocess_sample)
 106                 return sd->info->postprocess_sample(sd, raw_sample);
 107 
 108         return 0;
 109 }
 110 
 111 void ad_sd_set_comm(struct ad_sigma_delta *sigma_delta, uint8_t comm);
 112 int ad_sd_write_reg(struct ad_sigma_delta *sigma_delta, unsigned int reg,
 113         unsigned int size, unsigned int val);
 114 int ad_sd_read_reg(struct ad_sigma_delta *sigma_delta, unsigned int reg,
 115         unsigned int size, unsigned int *val);
 116 
 117 int ad_sd_reset(struct ad_sigma_delta *sigma_delta,
 118         unsigned int reset_length);
 119 
 120 int ad_sigma_delta_single_conversion(struct iio_dev *indio_dev,
 121         const struct iio_chan_spec *chan, int *val);
 122 int ad_sd_calibrate_all(struct ad_sigma_delta *sigma_delta,
 123         const struct ad_sd_calib_data *cd, unsigned int n);
 124 int ad_sd_init(struct ad_sigma_delta *sigma_delta, struct iio_dev *indio_dev,
 125         struct spi_device *spi, const struct ad_sigma_delta_info *info);
 126 
 127 int ad_sd_setup_buffer_and_trigger(struct iio_dev *indio_dev);
 128 void ad_sd_cleanup_buffer_and_trigger(struct iio_dev *indio_dev);
 129 
 130 int ad_sd_validate_trigger(struct iio_dev *indio_dev, struct iio_trigger *trig);
 131 
 132 #define __AD_SD_CHANNEL(_si, _channel1, _channel2, _address, _bits, \
 133         _storagebits, _shift, _extend_name, _type, _mask_all) \
 134         { \
 135                 .type = (_type), \
 136                 .differential = (_channel2 == -1 ? 0 : 1), \
 137                 .indexed = 1, \
 138                 .channel = (_channel1), \
 139                 .channel2 = (_channel2), \
 140                 .address = (_address), \
 141                 .extend_name = (_extend_name), \
 142                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
 143                         BIT(IIO_CHAN_INFO_OFFSET), \
 144                 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
 145                 .info_mask_shared_by_all = _mask_all, \
 146                 .scan_index = (_si), \
 147                 .scan_type = { \
 148                         .sign = 'u', \
 149                         .realbits = (_bits), \
 150                         .storagebits = (_storagebits), \
 151                         .shift = (_shift), \
 152                         .endianness = IIO_BE, \
 153                 }, \
 154         }
 155 
 156 #define AD_SD_DIFF_CHANNEL(_si, _channel1, _channel2, _address, _bits, \
 157         _storagebits, _shift) \
 158         __AD_SD_CHANNEL(_si, _channel1, _channel2, _address, _bits, \
 159                 _storagebits, _shift, NULL, IIO_VOLTAGE, \
 160                 BIT(IIO_CHAN_INFO_SAMP_FREQ))
 161 
 162 #define AD_SD_SHORTED_CHANNEL(_si, _channel, _address, _bits, \
 163         _storagebits, _shift) \
 164         __AD_SD_CHANNEL(_si, _channel, _channel, _address, _bits, \
 165                 _storagebits, _shift, "shorted", IIO_VOLTAGE, \
 166                 BIT(IIO_CHAN_INFO_SAMP_FREQ))
 167 
 168 #define AD_SD_CHANNEL(_si, _channel, _address, _bits, \
 169         _storagebits, _shift) \
 170         __AD_SD_CHANNEL(_si, _channel, -1, _address, _bits, \
 171                 _storagebits, _shift, NULL, IIO_VOLTAGE, \
 172                  BIT(IIO_CHAN_INFO_SAMP_FREQ))
 173 
 174 #define AD_SD_CHANNEL_NO_SAMP_FREQ(_si, _channel, _address, _bits, \
 175         _storagebits, _shift) \
 176         __AD_SD_CHANNEL(_si, _channel, -1, _address, _bits, \
 177                 _storagebits, _shift, NULL, IIO_VOLTAGE, 0)
 178 
 179 #define AD_SD_TEMP_CHANNEL(_si, _address, _bits, _storagebits, _shift) \
 180         __AD_SD_CHANNEL(_si, 0, -1, _address, _bits, \
 181                 _storagebits, _shift, NULL, IIO_TEMP, \
 182                 BIT(IIO_CHAN_INFO_SAMP_FREQ))
 183 
 184 #define AD_SD_SUPPLY_CHANNEL(_si, _channel, _address, _bits, _storagebits, \
 185         _shift) \
 186         __AD_SD_CHANNEL(_si, _channel, -1, _address, _bits, \
 187                 _storagebits, _shift, "supply", IIO_VOLTAGE, \
 188                 BIT(IIO_CHAN_INFO_SAMP_FREQ))
 189 
 190 #endif