root/include/linux/arm-cci.h

INCLUDED FROM

DEFINITIONS

1. cci_probed
2. cci_ace_get_port
3. cci_disable_port_by_cpu
4. __cci_control_port_by_device
5. __cci_control_port_by_index

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2 /*
   3  * CCI cache coherent interconnect support
   4  *
   5  * Copyright (C) 2013 ARM Ltd.
   6  */
   7 
   8 #ifndef __LINUX_ARM_CCI_H
   9 #define __LINUX_ARM_CCI_H
  10 
  11 #include <linux/errno.h>
  12 #include <linux/types.h>
  13 
  14 #include <asm/arm-cci.h>
  15 
  16 struct device_node;
  17 
  18 #ifdef CONFIG_ARM_CCI
  19 extern bool cci_probed(void);
  20 #else
  21 static inline bool cci_probed(void) { return false; }
  22 #endif
  23 
  24 #ifdef CONFIG_ARM_CCI400_PORT_CTRL
  25 extern int cci_ace_get_port(struct device_node *dn);
  26 extern int cci_disable_port_by_cpu(u64 mpidr);
  27 extern int __cci_control_port_by_device(struct device_node *dn, bool enable);
  28 extern int __cci_control_port_by_index(u32 port, bool enable);
  29 #else
  30 static inline int cci_ace_get_port(struct device_node *dn)
  31 {
  32         return -ENODEV;
  33 }
  34 static inline int cci_disable_port_by_cpu(u64 mpidr) { return -ENODEV; }
  35 static inline int __cci_control_port_by_device(struct device_node *dn,
  36                                                bool enable)
  37 {
  38         return -ENODEV;
  39 }
  40 static inline int __cci_control_port_by_index(u32 port, bool enable)
  41 {
  42         return -ENODEV;
  43 }
  44 #endif
  45 
  46 #define cci_disable_port_by_device(dev) \
  47         __cci_control_port_by_device(dev, false)
  48 #define cci_enable_port_by_device(dev) \
  49         __cci_control_port_by_device(dev, true)
  50 #define cci_disable_port_by_index(dev) \
  51         __cci_control_port_by_index(dev, false)
  52 #define cci_enable_port_by_index(dev) \
  53         __cci_control_port_by_index(dev, true)
  54 
  55 #endif