This source file includes following definitions.
- pd_header_cnt
- pd_header_cnt_le
- pd_header_type
- pd_header_type_le
- pd_header_msgid
- pd_header_msgid_le
- pd_header_rev
- pd_header_rev_le
- pd_ext_header_chunk_num
- pd_ext_header_data_size
- pd_ext_header_data_size_le
- pdo_fixed_voltage
- pdo_min_voltage
- pdo_max_voltage
- pdo_max_current
- pdo_max_power
- pdo_apdo_type
- pdo_pps_apdo_min_voltage
- pdo_pps_apdo_max_voltage
- pdo_pps_apdo_max_current
- rdo_index
- rdo_op_current
- rdo_max_current
- rdo_op_power
- rdo_max_power
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5
6 #ifndef __LINUX_USB_PD_H
7 #define __LINUX_USB_PD_H
8
9 #include <linux/kernel.h>
10 #include <linux/types.h>
11 #include <linux/usb/typec.h>
12
13
14 enum pd_ctrl_msg_type {
15
16 PD_CTRL_GOOD_CRC = 1,
17 PD_CTRL_GOTO_MIN = 2,
18 PD_CTRL_ACCEPT = 3,
19 PD_CTRL_REJECT = 4,
20 PD_CTRL_PING = 5,
21 PD_CTRL_PS_RDY = 6,
22 PD_CTRL_GET_SOURCE_CAP = 7,
23 PD_CTRL_GET_SINK_CAP = 8,
24 PD_CTRL_DR_SWAP = 9,
25 PD_CTRL_PR_SWAP = 10,
26 PD_CTRL_VCONN_SWAP = 11,
27 PD_CTRL_WAIT = 12,
28 PD_CTRL_SOFT_RESET = 13,
29
30 PD_CTRL_NOT_SUPP = 16,
31 PD_CTRL_GET_SOURCE_CAP_EXT = 17,
32 PD_CTRL_GET_STATUS = 18,
33 PD_CTRL_FR_SWAP = 19,
34 PD_CTRL_GET_PPS_STATUS = 20,
35 PD_CTRL_GET_COUNTRY_CODES = 21,
36
37 };
38
39 enum pd_data_msg_type {
40
41 PD_DATA_SOURCE_CAP = 1,
42 PD_DATA_REQUEST = 2,
43 PD_DATA_BIST = 3,
44 PD_DATA_SINK_CAP = 4,
45 PD_DATA_BATT_STATUS = 5,
46 PD_DATA_ALERT = 6,
47 PD_DATA_GET_COUNTRY_INFO = 7,
48
49 PD_DATA_VENDOR_DEF = 15,
50
51 };
52
53 enum pd_ext_msg_type {
54
55 PD_EXT_SOURCE_CAP_EXT = 1,
56 PD_EXT_STATUS = 2,
57 PD_EXT_GET_BATT_CAP = 3,
58 PD_EXT_GET_BATT_STATUS = 4,
59 PD_EXT_BATT_CAP = 5,
60 PD_EXT_GET_MANUFACTURER_INFO = 6,
61 PD_EXT_MANUFACTURER_INFO = 7,
62 PD_EXT_SECURITY_REQUEST = 8,
63 PD_EXT_SECURITY_RESPONSE = 9,
64 PD_EXT_FW_UPDATE_REQUEST = 10,
65 PD_EXT_FW_UPDATE_RESPONSE = 11,
66 PD_EXT_PPS_STATUS = 12,
67 PD_EXT_COUNTRY_INFO = 13,
68 PD_EXT_COUNTRY_CODES = 14,
69
70 };
71
72 #define PD_REV10 0x0
73 #define PD_REV20 0x1
74 #define PD_REV30 0x2
75 #define PD_MAX_REV PD_REV30
76
77 #define PD_HEADER_EXT_HDR BIT(15)
78 #define PD_HEADER_CNT_SHIFT 12
79 #define PD_HEADER_CNT_MASK 0x7
80 #define PD_HEADER_ID_SHIFT 9
81 #define PD_HEADER_ID_MASK 0x7
82 #define PD_HEADER_PWR_ROLE BIT(8)
83 #define PD_HEADER_REV_SHIFT 6
84 #define PD_HEADER_REV_MASK 0x3
85 #define PD_HEADER_DATA_ROLE BIT(5)
86 #define PD_HEADER_TYPE_SHIFT 0
87 #define PD_HEADER_TYPE_MASK 0x1f
88
89 #define PD_HEADER(type, pwr, data, rev, id, cnt, ext_hdr) \
90 ((((type) & PD_HEADER_TYPE_MASK) << PD_HEADER_TYPE_SHIFT) | \
91 ((pwr) == TYPEC_SOURCE ? PD_HEADER_PWR_ROLE : 0) | \
92 ((data) == TYPEC_HOST ? PD_HEADER_DATA_ROLE : 0) | \
93 (rev << PD_HEADER_REV_SHIFT) | \
94 (((id) & PD_HEADER_ID_MASK) << PD_HEADER_ID_SHIFT) | \
95 (((cnt) & PD_HEADER_CNT_MASK) << PD_HEADER_CNT_SHIFT) | \
96 ((ext_hdr) ? PD_HEADER_EXT_HDR : 0))
97
98 #define PD_HEADER_LE(type, pwr, data, rev, id, cnt) \
99 cpu_to_le16(PD_HEADER((type), (pwr), (data), (rev), (id), (cnt), (0)))
100
101 static inline unsigned int pd_header_cnt(u16 header)
102 {
103 return (header >> PD_HEADER_CNT_SHIFT) & PD_HEADER_CNT_MASK;
104 }
105
106 static inline unsigned int pd_header_cnt_le(__le16 header)
107 {
108 return pd_header_cnt(le16_to_cpu(header));
109 }
110
111 static inline unsigned int pd_header_type(u16 header)
112 {
113 return (header >> PD_HEADER_TYPE_SHIFT) & PD_HEADER_TYPE_MASK;
114 }
115
116 static inline unsigned int pd_header_type_le(__le16 header)
117 {
118 return pd_header_type(le16_to_cpu(header));
119 }
120
121 static inline unsigned int pd_header_msgid(u16 header)
122 {
123 return (header >> PD_HEADER_ID_SHIFT) & PD_HEADER_ID_MASK;
124 }
125
126 static inline unsigned int pd_header_msgid_le(__le16 header)
127 {
128 return pd_header_msgid(le16_to_cpu(header));
129 }
130
131 static inline unsigned int pd_header_rev(u16 header)
132 {
133 return (header >> PD_HEADER_REV_SHIFT) & PD_HEADER_REV_MASK;
134 }
135
136 static inline unsigned int pd_header_rev_le(__le16 header)
137 {
138 return pd_header_rev(le16_to_cpu(header));
139 }
140
141 #define PD_EXT_HDR_CHUNKED BIT(15)
142 #define PD_EXT_HDR_CHUNK_NUM_SHIFT 11
143 #define PD_EXT_HDR_CHUNK_NUM_MASK 0xf
144 #define PD_EXT_HDR_REQ_CHUNK BIT(10)
145 #define PD_EXT_HDR_DATA_SIZE_SHIFT 0
146 #define PD_EXT_HDR_DATA_SIZE_MASK 0x1ff
147
148 #define PD_EXT_HDR(data_size, req_chunk, chunk_num, chunked) \
149 ((((data_size) & PD_EXT_HDR_DATA_SIZE_MASK) << PD_EXT_HDR_DATA_SIZE_SHIFT) | \
150 ((req_chunk) ? PD_EXT_HDR_REQ_CHUNK : 0) | \
151 (((chunk_num) & PD_EXT_HDR_CHUNK_NUM_MASK) << PD_EXT_HDR_CHUNK_NUM_SHIFT) | \
152 ((chunked) ? PD_EXT_HDR_CHUNKED : 0))
153
154 #define PD_EXT_HDR_LE(data_size, req_chunk, chunk_num, chunked) \
155 cpu_to_le16(PD_EXT_HDR((data_size), (req_chunk), (chunk_num), (chunked)))
156
157 static inline unsigned int pd_ext_header_chunk_num(u16 ext_header)
158 {
159 return (ext_header >> PD_EXT_HDR_CHUNK_NUM_SHIFT) &
160 PD_EXT_HDR_CHUNK_NUM_MASK;
161 }
162
163 static inline unsigned int pd_ext_header_data_size(u16 ext_header)
164 {
165 return (ext_header >> PD_EXT_HDR_DATA_SIZE_SHIFT) &
166 PD_EXT_HDR_DATA_SIZE_MASK;
167 }
168
169 static inline unsigned int pd_ext_header_data_size_le(__le16 ext_header)
170 {
171 return pd_ext_header_data_size(le16_to_cpu(ext_header));
172 }
173
174 #define PD_MAX_PAYLOAD 7
175 #define PD_EXT_MAX_CHUNK_DATA 26
176
177
178
179
180
181
182
183 struct pd_chunked_ext_message_data {
184 __le16 header;
185 u8 data[PD_EXT_MAX_CHUNK_DATA];
186 } __packed;
187
188
189
190
191
192
193
194 struct pd_message {
195 __le16 header;
196 union {
197 __le32 payload[PD_MAX_PAYLOAD];
198 struct pd_chunked_ext_message_data ext_msg;
199 };
200 } __packed;
201
202
203 #define PDO_MAX_OBJECTS 7
204
205 enum pd_pdo_type {
206 PDO_TYPE_FIXED = 0,
207 PDO_TYPE_BATT = 1,
208 PDO_TYPE_VAR = 2,
209 PDO_TYPE_APDO = 3,
210 };
211
212 #define PDO_TYPE_SHIFT 30
213 #define PDO_TYPE_MASK 0x3
214
215 #define PDO_TYPE(t) ((t) << PDO_TYPE_SHIFT)
216
217 #define PDO_VOLT_MASK 0x3ff
218 #define PDO_CURR_MASK 0x3ff
219 #define PDO_PWR_MASK 0x3ff
220
221 #define PDO_FIXED_DUAL_ROLE BIT(29)
222 #define PDO_FIXED_SUSPEND BIT(28)
223 #define PDO_FIXED_HIGHER_CAP BIT(28)
224 #define PDO_FIXED_EXTPOWER BIT(27)
225 #define PDO_FIXED_USB_COMM BIT(26)
226 #define PDO_FIXED_DATA_SWAP BIT(25)
227 #define PDO_FIXED_VOLT_SHIFT 10
228 #define PDO_FIXED_CURR_SHIFT 0
229
230 #define PDO_FIXED_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_FIXED_VOLT_SHIFT)
231 #define PDO_FIXED_CURR(ma) ((((ma) / 10) & PDO_CURR_MASK) << PDO_FIXED_CURR_SHIFT)
232
233 #define PDO_FIXED(mv, ma, flags) \
234 (PDO_TYPE(PDO_TYPE_FIXED) | (flags) | \
235 PDO_FIXED_VOLT(mv) | PDO_FIXED_CURR(ma))
236
237 #define VSAFE5V 5000
238
239 #define PDO_BATT_MAX_VOLT_SHIFT 20
240 #define PDO_BATT_MIN_VOLT_SHIFT 10
241 #define PDO_BATT_MAX_PWR_SHIFT 0
242
243 #define PDO_BATT_MIN_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_BATT_MIN_VOLT_SHIFT)
244 #define PDO_BATT_MAX_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_BATT_MAX_VOLT_SHIFT)
245 #define PDO_BATT_MAX_POWER(mw) ((((mw) / 250) & PDO_PWR_MASK) << PDO_BATT_MAX_PWR_SHIFT)
246
247 #define PDO_BATT(min_mv, max_mv, max_mw) \
248 (PDO_TYPE(PDO_TYPE_BATT) | PDO_BATT_MIN_VOLT(min_mv) | \
249 PDO_BATT_MAX_VOLT(max_mv) | PDO_BATT_MAX_POWER(max_mw))
250
251 #define PDO_VAR_MAX_VOLT_SHIFT 20
252 #define PDO_VAR_MIN_VOLT_SHIFT 10
253 #define PDO_VAR_MAX_CURR_SHIFT 0
254
255 #define PDO_VAR_MIN_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_VAR_MIN_VOLT_SHIFT)
256 #define PDO_VAR_MAX_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_VAR_MAX_VOLT_SHIFT)
257 #define PDO_VAR_MAX_CURR(ma) ((((ma) / 10) & PDO_CURR_MASK) << PDO_VAR_MAX_CURR_SHIFT)
258
259 #define PDO_VAR(min_mv, max_mv, max_ma) \
260 (PDO_TYPE(PDO_TYPE_VAR) | PDO_VAR_MIN_VOLT(min_mv) | \
261 PDO_VAR_MAX_VOLT(max_mv) | PDO_VAR_MAX_CURR(max_ma))
262
263 enum pd_apdo_type {
264 APDO_TYPE_PPS = 0,
265 };
266
267 #define PDO_APDO_TYPE_SHIFT 28
268 #define PDO_APDO_TYPE_MASK 0x3
269
270 #define PDO_APDO_TYPE(t) ((t) << PDO_APDO_TYPE_SHIFT)
271
272 #define PDO_PPS_APDO_MAX_VOLT_SHIFT 17
273 #define PDO_PPS_APDO_MIN_VOLT_SHIFT 8
274 #define PDO_PPS_APDO_MAX_CURR_SHIFT 0
275
276 #define PDO_PPS_APDO_VOLT_MASK 0xff
277 #define PDO_PPS_APDO_CURR_MASK 0x7f
278
279 #define PDO_PPS_APDO_MIN_VOLT(mv) \
280 ((((mv) / 100) & PDO_PPS_APDO_VOLT_MASK) << PDO_PPS_APDO_MIN_VOLT_SHIFT)
281 #define PDO_PPS_APDO_MAX_VOLT(mv) \
282 ((((mv) / 100) & PDO_PPS_APDO_VOLT_MASK) << PDO_PPS_APDO_MAX_VOLT_SHIFT)
283 #define PDO_PPS_APDO_MAX_CURR(ma) \
284 ((((ma) / 50) & PDO_PPS_APDO_CURR_MASK) << PDO_PPS_APDO_MAX_CURR_SHIFT)
285
286 #define PDO_PPS_APDO(min_mv, max_mv, max_ma) \
287 (PDO_TYPE(PDO_TYPE_APDO) | PDO_APDO_TYPE(APDO_TYPE_PPS) | \
288 PDO_PPS_APDO_MIN_VOLT(min_mv) | PDO_PPS_APDO_MAX_VOLT(max_mv) | \
289 PDO_PPS_APDO_MAX_CURR(max_ma))
290
291 static inline enum pd_pdo_type pdo_type(u32 pdo)
292 {
293 return (pdo >> PDO_TYPE_SHIFT) & PDO_TYPE_MASK;
294 }
295
296 static inline unsigned int pdo_fixed_voltage(u32 pdo)
297 {
298 return ((pdo >> PDO_FIXED_VOLT_SHIFT) & PDO_VOLT_MASK) * 50;
299 }
300
301 static inline unsigned int pdo_min_voltage(u32 pdo)
302 {
303 return ((pdo >> PDO_VAR_MIN_VOLT_SHIFT) & PDO_VOLT_MASK) * 50;
304 }
305
306 static inline unsigned int pdo_max_voltage(u32 pdo)
307 {
308 return ((pdo >> PDO_VAR_MAX_VOLT_SHIFT) & PDO_VOLT_MASK) * 50;
309 }
310
311 static inline unsigned int pdo_max_current(u32 pdo)
312 {
313 return ((pdo >> PDO_VAR_MAX_CURR_SHIFT) & PDO_CURR_MASK) * 10;
314 }
315
316 static inline unsigned int pdo_max_power(u32 pdo)
317 {
318 return ((pdo >> PDO_BATT_MAX_PWR_SHIFT) & PDO_PWR_MASK) * 250;
319 }
320
321 static inline enum pd_apdo_type pdo_apdo_type(u32 pdo)
322 {
323 return (pdo >> PDO_APDO_TYPE_SHIFT) & PDO_APDO_TYPE_MASK;
324 }
325
326 static inline unsigned int pdo_pps_apdo_min_voltage(u32 pdo)
327 {
328 return ((pdo >> PDO_PPS_APDO_MIN_VOLT_SHIFT) &
329 PDO_PPS_APDO_VOLT_MASK) * 100;
330 }
331
332 static inline unsigned int pdo_pps_apdo_max_voltage(u32 pdo)
333 {
334 return ((pdo >> PDO_PPS_APDO_MAX_VOLT_SHIFT) &
335 PDO_PPS_APDO_VOLT_MASK) * 100;
336 }
337
338 static inline unsigned int pdo_pps_apdo_max_current(u32 pdo)
339 {
340 return ((pdo >> PDO_PPS_APDO_MAX_CURR_SHIFT) &
341 PDO_PPS_APDO_CURR_MASK) * 50;
342 }
343
344
345 #define RDO_OBJ_POS_SHIFT 28
346 #define RDO_OBJ_POS_MASK 0x7
347 #define RDO_GIVE_BACK BIT(27)
348 #define RDO_CAP_MISMATCH BIT(26)
349 #define RDO_USB_COMM BIT(25)
350 #define RDO_NO_SUSPEND BIT(24)
351
352 #define RDO_PWR_MASK 0x3ff
353 #define RDO_CURR_MASK 0x3ff
354
355 #define RDO_FIXED_OP_CURR_SHIFT 10
356 #define RDO_FIXED_MAX_CURR_SHIFT 0
357
358 #define RDO_OBJ(idx) (((idx) & RDO_OBJ_POS_MASK) << RDO_OBJ_POS_SHIFT)
359
360 #define PDO_FIXED_OP_CURR(ma) ((((ma) / 10) & RDO_CURR_MASK) << RDO_FIXED_OP_CURR_SHIFT)
361 #define PDO_FIXED_MAX_CURR(ma) ((((ma) / 10) & RDO_CURR_MASK) << RDO_FIXED_MAX_CURR_SHIFT)
362
363 #define RDO_FIXED(idx, op_ma, max_ma, flags) \
364 (RDO_OBJ(idx) | (flags) | \
365 PDO_FIXED_OP_CURR(op_ma) | PDO_FIXED_MAX_CURR(max_ma))
366
367 #define RDO_BATT_OP_PWR_SHIFT 10
368 #define RDO_BATT_MAX_PWR_SHIFT 0
369
370 #define RDO_BATT_OP_PWR(mw) ((((mw) / 250) & RDO_PWR_MASK) << RDO_BATT_OP_PWR_SHIFT)
371 #define RDO_BATT_MAX_PWR(mw) ((((mw) / 250) & RDO_PWR_MASK) << RDO_BATT_MAX_PWR_SHIFT)
372
373 #define RDO_BATT(idx, op_mw, max_mw, flags) \
374 (RDO_OBJ(idx) | (flags) | \
375 RDO_BATT_OP_PWR(op_mw) | RDO_BATT_MAX_PWR(max_mw))
376
377 #define RDO_PROG_VOLT_MASK 0x7ff
378 #define RDO_PROG_CURR_MASK 0x7f
379
380 #define RDO_PROG_VOLT_SHIFT 9
381 #define RDO_PROG_CURR_SHIFT 0
382
383 #define RDO_PROG_VOLT_MV_STEP 20
384 #define RDO_PROG_CURR_MA_STEP 50
385
386 #define PDO_PROG_OUT_VOLT(mv) \
387 ((((mv) / RDO_PROG_VOLT_MV_STEP) & RDO_PROG_VOLT_MASK) << RDO_PROG_VOLT_SHIFT)
388 #define PDO_PROG_OP_CURR(ma) \
389 ((((ma) / RDO_PROG_CURR_MA_STEP) & RDO_PROG_CURR_MASK) << RDO_PROG_CURR_SHIFT)
390
391 #define RDO_PROG(idx, out_mv, op_ma, flags) \
392 (RDO_OBJ(idx) | (flags) | \
393 PDO_PROG_OUT_VOLT(out_mv) | PDO_PROG_OP_CURR(op_ma))
394
395 static inline unsigned int rdo_index(u32 rdo)
396 {
397 return (rdo >> RDO_OBJ_POS_SHIFT) & RDO_OBJ_POS_MASK;
398 }
399
400 static inline unsigned int rdo_op_current(u32 rdo)
401 {
402 return ((rdo >> RDO_FIXED_OP_CURR_SHIFT) & RDO_CURR_MASK) * 10;
403 }
404
405 static inline unsigned int rdo_max_current(u32 rdo)
406 {
407 return ((rdo >> RDO_FIXED_MAX_CURR_SHIFT) &
408 RDO_CURR_MASK) * 10;
409 }
410
411 static inline unsigned int rdo_op_power(u32 rdo)
412 {
413 return ((rdo >> RDO_BATT_OP_PWR_SHIFT) & RDO_PWR_MASK) * 250;
414 }
415
416 static inline unsigned int rdo_max_power(u32 rdo)
417 {
418 return ((rdo >> RDO_BATT_MAX_PWR_SHIFT) & RDO_PWR_MASK) * 250;
419 }
420
421
422 #define PD_T_NO_RESPONSE 5000
423 #define PD_T_DB_DETECT 10000
424 #define PD_T_SEND_SOURCE_CAP 150
425 #define PD_T_SENDER_RESPONSE 60
426 #define PD_T_SOURCE_ACTIVITY 45
427 #define PD_T_SINK_ACTIVITY 135
428 #define PD_T_SINK_WAIT_CAP 240
429 #define PD_T_PS_TRANSITION 500
430 #define PD_T_SRC_TRANSITION 35
431 #define PD_T_DRP_SNK 40
432 #define PD_T_DRP_SRC 30
433 #define PD_T_PS_SOURCE_OFF 920
434 #define PD_T_PS_SOURCE_ON 480
435 #define PD_T_PS_HARD_RESET 30
436 #define PD_T_SRC_RECOVER 760
437 #define PD_T_SRC_RECOVER_MAX 1000
438 #define PD_T_SRC_TURN_ON 275
439 #define PD_T_SAFE_0V 650
440 #define PD_T_VCONN_SOURCE_ON 100
441 #define PD_T_SINK_REQUEST 100
442 #define PD_T_ERROR_RECOVERY 100
443 #define PD_T_SRCSWAPSTDBY 625
444 #define PD_T_NEWSRC 250
445
446 #define PD_T_DRP_TRY 100
447 #define PD_T_DRP_TRYWAIT 600
448
449 #define PD_T_CC_DEBOUNCE 200
450 #define PD_T_PD_DEBOUNCE 20
451
452 #define PD_N_CAPS_COUNT (PD_T_NO_RESPONSE / PD_T_SEND_SOURCE_CAP)
453 #define PD_N_HARD_RESET_COUNT 2
454
455 #endif